i8259.c 8.0 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Code to handle x86 style IRQs plus some generic interrupt stuff.
  7. *
  8. * Copyright (C) 1992 Linus Torvalds
  9. * Copyright (C) 1994 - 2000 Ralf Baechle
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/ioport.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/kernel.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/sysdev.h>
  18. #include <asm/i8259.h>
  19. #include <asm/io.h>
  20. void enable_8259A_irq(unsigned int irq);
  21. void disable_8259A_irq(unsigned int irq);
  22. /*
  23. * This is the 'legacy' 8259A Programmable Interrupt Controller,
  24. * present in the majority of PC/AT boxes.
  25. * plus some generic x86 specific things if generic specifics makes
  26. * any sense at all.
  27. * this file should become arch/i386/kernel/irq.c when the old irq.c
  28. * moves to arch independent land
  29. */
  30. spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
  31. static void end_8259A_irq (unsigned int irq)
  32. {
  33. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
  34. irq_desc[irq].action)
  35. enable_8259A_irq(irq);
  36. }
  37. #define shutdown_8259A_irq disable_8259A_irq
  38. void mask_and_ack_8259A(unsigned int);
  39. static unsigned int startup_8259A_irq(unsigned int irq)
  40. {
  41. enable_8259A_irq(irq);
  42. return 0; /* never anything pending */
  43. }
  44. static struct hw_interrupt_type i8259A_irq_type = {
  45. "XT-PIC",
  46. startup_8259A_irq,
  47. shutdown_8259A_irq,
  48. enable_8259A_irq,
  49. disable_8259A_irq,
  50. mask_and_ack_8259A,
  51. end_8259A_irq,
  52. NULL
  53. };
  54. /*
  55. * 8259A PIC functions to handle ISA devices:
  56. */
  57. /*
  58. * This contains the irq mask for both 8259A irq controllers,
  59. */
  60. static unsigned int cached_irq_mask = 0xffff;
  61. #define cached_21 (cached_irq_mask)
  62. #define cached_A1 (cached_irq_mask >> 8)
  63. void disable_8259A_irq(unsigned int irq)
  64. {
  65. unsigned int mask = 1 << irq;
  66. unsigned long flags;
  67. spin_lock_irqsave(&i8259A_lock, flags);
  68. cached_irq_mask |= mask;
  69. if (irq & 8)
  70. outb(cached_A1,0xA1);
  71. else
  72. outb(cached_21,0x21);
  73. spin_unlock_irqrestore(&i8259A_lock, flags);
  74. }
  75. void enable_8259A_irq(unsigned int irq)
  76. {
  77. unsigned int mask = ~(1 << irq);
  78. unsigned long flags;
  79. spin_lock_irqsave(&i8259A_lock, flags);
  80. cached_irq_mask &= mask;
  81. if (irq & 8)
  82. outb(cached_A1,0xA1);
  83. else
  84. outb(cached_21,0x21);
  85. spin_unlock_irqrestore(&i8259A_lock, flags);
  86. }
  87. int i8259A_irq_pending(unsigned int irq)
  88. {
  89. unsigned int mask = 1 << irq;
  90. unsigned long flags;
  91. int ret;
  92. spin_lock_irqsave(&i8259A_lock, flags);
  93. if (irq < 8)
  94. ret = inb(0x20) & mask;
  95. else
  96. ret = inb(0xA0) & (mask >> 8);
  97. spin_unlock_irqrestore(&i8259A_lock, flags);
  98. return ret;
  99. }
  100. void make_8259A_irq(unsigned int irq)
  101. {
  102. disable_irq_nosync(irq);
  103. irq_desc[irq].handler = &i8259A_irq_type;
  104. enable_irq(irq);
  105. }
  106. /*
  107. * This function assumes to be called rarely. Switching between
  108. * 8259A registers is slow.
  109. * This has to be protected by the irq controller spinlock
  110. * before being called.
  111. */
  112. static inline int i8259A_irq_real(unsigned int irq)
  113. {
  114. int value;
  115. int irqmask = 1 << irq;
  116. if (irq < 8) {
  117. outb(0x0B,0x20); /* ISR register */
  118. value = inb(0x20) & irqmask;
  119. outb(0x0A,0x20); /* back to the IRR register */
  120. return value;
  121. }
  122. outb(0x0B,0xA0); /* ISR register */
  123. value = inb(0xA0) & (irqmask >> 8);
  124. outb(0x0A,0xA0); /* back to the IRR register */
  125. return value;
  126. }
  127. /*
  128. * Careful! The 8259A is a fragile beast, it pretty
  129. * much _has_ to be done exactly like this (mask it
  130. * first, _then_ send the EOI, and the order of EOI
  131. * to the two 8259s is important!
  132. */
  133. void mask_and_ack_8259A(unsigned int irq)
  134. {
  135. unsigned int irqmask = 1 << irq;
  136. unsigned long flags;
  137. spin_lock_irqsave(&i8259A_lock, flags);
  138. /*
  139. * Lightweight spurious IRQ detection. We do not want to overdo
  140. * spurious IRQ handling - it's usually a sign of hardware problems, so
  141. * we only do the checks we can do without slowing down good hardware
  142. * nnecesserily.
  143. *
  144. * Note that IRQ7 and IRQ15 (the two spurious IRQs usually resulting
  145. * rom the 8259A-1|2 PICs) occur even if the IRQ is masked in the 8259A.
  146. * Thus we can check spurious 8259A IRQs without doing the quite slow
  147. * i8259A_irq_real() call for every IRQ. This does not cover 100% of
  148. * spurious interrupts, but should be enough to warn the user that
  149. * there is something bad going on ...
  150. */
  151. if (cached_irq_mask & irqmask)
  152. goto spurious_8259A_irq;
  153. cached_irq_mask |= irqmask;
  154. handle_real_irq:
  155. if (irq & 8) {
  156. inb(0xA1); /* DUMMY - (do we need this?) */
  157. outb(cached_A1,0xA1);
  158. outb(0x60+(irq&7),0xA0);/* 'Specific EOI' to slave */
  159. outb(0x62,0x20); /* 'Specific EOI' to master-IRQ2 */
  160. } else {
  161. inb(0x21); /* DUMMY - (do we need this?) */
  162. outb(cached_21,0x21);
  163. outb(0x60+irq,0x20); /* 'Specific EOI' to master */
  164. }
  165. spin_unlock_irqrestore(&i8259A_lock, flags);
  166. return;
  167. spurious_8259A_irq:
  168. /*
  169. * this is the slow path - should happen rarely.
  170. */
  171. if (i8259A_irq_real(irq))
  172. /*
  173. * oops, the IRQ _is_ in service according to the
  174. * 8259A - not spurious, go handle it.
  175. */
  176. goto handle_real_irq;
  177. {
  178. static int spurious_irq_mask = 0;
  179. /*
  180. * At this point we can be sure the IRQ is spurious,
  181. * lets ACK and report it. [once per IRQ]
  182. */
  183. if (!(spurious_irq_mask & irqmask)) {
  184. printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
  185. spurious_irq_mask |= irqmask;
  186. }
  187. atomic_inc(&irq_err_count);
  188. /*
  189. * Theoretically we do not have to handle this IRQ,
  190. * but in Linux this does not cause problems and is
  191. * simpler for us.
  192. */
  193. goto handle_real_irq;
  194. }
  195. }
  196. static int i8259A_resume(struct sys_device *dev)
  197. {
  198. init_8259A(0);
  199. return 0;
  200. }
  201. static struct sysdev_class i8259_sysdev_class = {
  202. set_kset_name("i8259"),
  203. .resume = i8259A_resume,
  204. };
  205. static struct sys_device device_i8259A = {
  206. .id = 0,
  207. .cls = &i8259_sysdev_class,
  208. };
  209. static int __init i8259A_init_sysfs(void)
  210. {
  211. int error = sysdev_class_register(&i8259_sysdev_class);
  212. if (!error)
  213. error = sysdev_register(&device_i8259A);
  214. return error;
  215. }
  216. device_initcall(i8259A_init_sysfs);
  217. void __init init_8259A(int auto_eoi)
  218. {
  219. unsigned long flags;
  220. spin_lock_irqsave(&i8259A_lock, flags);
  221. outb(0xff, 0x21); /* mask all of 8259A-1 */
  222. outb(0xff, 0xA1); /* mask all of 8259A-2 */
  223. /*
  224. * outb_p - this has to work on a wide range of PC hardware.
  225. */
  226. outb_p(0x11, 0x20); /* ICW1: select 8259A-1 init */
  227. outb_p(0x00, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x00-0x07 */
  228. outb_p(0x04, 0x21); /* 8259A-1 (the master) has a slave on IR2 */
  229. if (auto_eoi)
  230. outb_p(0x03, 0x21); /* master does Auto EOI */
  231. else
  232. outb_p(0x01, 0x21); /* master expects normal EOI */
  233. outb_p(0x11, 0xA0); /* ICW1: select 8259A-2 init */
  234. outb_p(0x08, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x08-0x0f */
  235. outb_p(0x02, 0xA1); /* 8259A-2 is a slave on master's IR2 */
  236. outb_p(0x01, 0xA1); /* (slave's support for AEOI in flat mode
  237. is to be investigated) */
  238. if (auto_eoi)
  239. /*
  240. * in AEOI mode we just have to mask the interrupt
  241. * when acking.
  242. */
  243. i8259A_irq_type.ack = disable_8259A_irq;
  244. else
  245. i8259A_irq_type.ack = mask_and_ack_8259A;
  246. udelay(100); /* wait for 8259A to initialize */
  247. outb(cached_21, 0x21); /* restore master IRQ mask */
  248. outb(cached_A1, 0xA1); /* restore slave IRQ mask */
  249. spin_unlock_irqrestore(&i8259A_lock, flags);
  250. }
  251. /*
  252. * IRQ2 is cascade interrupt to second interrupt controller
  253. */
  254. static struct irqaction irq2 = {
  255. no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
  256. };
  257. static struct resource pic1_io_resource = {
  258. "pic1", 0x20, 0x3f, IORESOURCE_BUSY
  259. };
  260. static struct resource pic2_io_resource = {
  261. "pic2", 0xa0, 0xbf, IORESOURCE_BUSY
  262. };
  263. /*
  264. * On systems with i8259-style interrupt controllers we assume for
  265. * driver compatibility reasons interrupts 0 - 15 to be the i8295
  266. * interrupts even if the hardware uses a different interrupt numbering.
  267. */
  268. void __init init_i8259_irqs (void)
  269. {
  270. int i;
  271. request_resource(&ioport_resource, &pic1_io_resource);
  272. request_resource(&ioport_resource, &pic2_io_resource);
  273. init_8259A(0);
  274. for (i = 0; i < 16; i++) {
  275. irq_desc[i].status = IRQ_DISABLED;
  276. irq_desc[i].action = 0;
  277. irq_desc[i].depth = 1;
  278. irq_desc[i].handler = &i8259A_irq_type;
  279. }
  280. setup_irq(2, &irq2);
  281. }