board_setup.c 3.8 KB

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  1. /*
  2. * Copyright 2002 MontaVista Software Inc.
  3. * Author: MontaVista Software, Inc.
  4. * ppopov@mvista.com or source@mvista.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  12. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  13. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  14. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  15. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  17. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  19. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21. *
  22. * You should have received a copy of the GNU General Public License along
  23. * with this program; if not, write to the Free Software Foundation, Inc.,
  24. * 675 Mass Ave, Cambridge, MA 02139, USA.
  25. */
  26. #include <linux/config.h>
  27. #include <linux/init.h>
  28. #include <linux/sched.h>
  29. #include <linux/ioport.h>
  30. #include <linux/mm.h>
  31. #include <linux/console.h>
  32. #include <linux/delay.h>
  33. #include <asm/cpu.h>
  34. #include <asm/bootinfo.h>
  35. #include <asm/irq.h>
  36. #include <asm/mipsregs.h>
  37. #include <asm/reboot.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/mach-au1x00/au1000.h>
  40. #include <asm/mach-pb1x00/pb1100.h>
  41. void board_reset (void)
  42. {
  43. /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
  44. au_writel(0x00000000, 0xAE00001C);
  45. }
  46. void __init board_setup(void)
  47. {
  48. u32 pin_func;
  49. u32 sys_freqctrl, sys_clksrc;
  50. // set AUX clock to 12MHz * 8 = 96 MHz
  51. au_writel(8, SYS_AUXPLL);
  52. au_writel(0, SYS_PININPUTEN);
  53. udelay(100);
  54. #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
  55. // configure pins GPIO[14:9] as GPIO
  56. pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
  57. /* zero and disable FREQ2 */
  58. sys_freqctrl = au_readl(SYS_FREQCTRL0);
  59. sys_freqctrl &= ~0xFFF00000;
  60. au_writel(sys_freqctrl, SYS_FREQCTRL0);
  61. /* zero and disable USBH/USBD/IrDA clock */
  62. sys_clksrc = au_readl(SYS_CLKSRC);
  63. sys_clksrc &= ~0x0000001F;
  64. au_writel(sys_clksrc, SYS_CLKSRC);
  65. sys_freqctrl = au_readl(SYS_FREQCTRL0);
  66. sys_freqctrl &= ~0xFFF00000;
  67. sys_clksrc = au_readl(SYS_CLKSRC);
  68. sys_clksrc &= ~0x0000001F;
  69. // FREQ2 = aux/2 = 48 MHz
  70. sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
  71. au_writel(sys_freqctrl, SYS_FREQCTRL0);
  72. /*
  73. * Route 48MHz FREQ2 into USBH/USBD/IrDA
  74. */
  75. sys_clksrc |= ((4<<2) | (0<<1) | 0 );
  76. au_writel(sys_clksrc, SYS_CLKSRC);
  77. /* setup the static bus controller */
  78. au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
  79. au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
  80. au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
  81. // get USB Functionality pin state (device vs host drive pins)
  82. pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
  83. #ifndef CONFIG_AU1X00_USB_DEVICE
  84. // 2nd USB port is USB host
  85. pin_func |= 0x8000;
  86. #endif
  87. au_writel(pin_func, SYS_PINFUNC);
  88. #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
  89. /* Enable sys bus clock divider when IDLE state or no bus activity. */
  90. au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
  91. // Enable the RTC if not already enabled
  92. if (!(readb(0xac000028) & 0x20)) {
  93. writeb(readb(0xac000028) | 0x20, 0xac000028);
  94. au_sync();
  95. }
  96. // Put the clock in BCD mode
  97. if (readb(0xac00002C) & 0x4) { /* reg B */
  98. writeb(readb(0xac00002c) & ~0x4, 0xac00002c);
  99. au_sync();
  100. }
  101. }