int-handler.S 1.5 KB

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  1. /*
  2. * Copyright 2001 MontaVista Software Inc.
  3. * Author: ppopov@mvista.com
  4. *
  5. * Interrupt dispatcher for Au1000 boards.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <asm/asm.h>
  13. #include <asm/mipsregs.h>
  14. #include <asm/addrspace.h>
  15. #include <asm/regdef.h>
  16. #include <asm/stackframe.h>
  17. .text
  18. .set macro
  19. .set noat
  20. .align 5
  21. NESTED(au1000_IRQ, PT_SIZE, sp)
  22. SAVE_ALL
  23. CLI # Important: mark KERNEL mode !
  24. mfc0 t0,CP0_CAUSE # get pending interrupts
  25. mfc0 t1,CP0_STATUS # get enabled interrupts
  26. and t0,t1 # isolate allowed ones
  27. andi t0,0xff00 # isolate pending bits
  28. beqz t0, 3f # spurious interrupt
  29. andi a0, t0, CAUSEF_IP7
  30. beq a0, zero, 1f
  31. move a0, sp
  32. jal mips_timer_interrupt
  33. j ret_from_irq
  34. 1:
  35. andi a0, t0, CAUSEF_IP2 # Interrupt Controller 0, Request 0
  36. beq a0, zero, 2f
  37. move a0,sp
  38. jal intc0_req0_irqdispatch
  39. j ret_from_irq
  40. 2:
  41. andi a0, t0, CAUSEF_IP3 # Interrupt Controller 0, Request 1
  42. beq a0, zero, 3f
  43. move a0,sp
  44. jal intc0_req1_irqdispatch
  45. j ret_from_irq
  46. 3:
  47. andi a0, t0, CAUSEF_IP4 # Interrupt Controller 1, Request 0
  48. beq a0, zero, 4f
  49. move a0,sp
  50. jal intc1_req0_irqdispatch
  51. j ret_from_irq
  52. 4:
  53. andi a0, t0, CAUSEF_IP5 # Interrupt Controller 1, Request 1
  54. beq a0, zero, 5f
  55. move a0, sp
  56. jal intc1_req1_irqdispatch
  57. j ret_from_irq
  58. 5:
  59. move a0, sp
  60. j spurious_interrupt
  61. END(au1000_IRQ)