config.c 5.2 KB

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  1. /*
  2. * linux/arch/m68knommu/platform/68360/config.c
  3. *
  4. * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
  5. * Copyright (C) 1993 Hamish Macdonald
  6. * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file COPYING in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <stdarg.h>
  13. #include <linux/config.h>
  14. #include <linux/types.h>
  15. #include <linux/kernel.h>
  16. #include <linux/mm.h>
  17. #include <linux/tty.h>
  18. #include <linux/console.h>
  19. #include <asm/setup.h>
  20. #include <asm/system.h>
  21. #include <asm/pgtable.h>
  22. #include <asm/irq.h>
  23. #include <asm/machdep.h>
  24. #include <asm/m68360.h>
  25. #ifdef CONFIG_UCQUICC
  26. #include <asm/bootstd.h>
  27. #endif
  28. extern void m360_cpm_reset(void);
  29. // Mask to select if the PLL prescaler is enabled.
  30. #define MCU_PREEN ((unsigned short)(0x0001 << 13))
  31. #if defined(CONFIG_UCQUICC)
  32. #define OSCILLATOR (unsigned long int)33000000
  33. #endif
  34. unsigned long int system_clock;
  35. void M68360_init_IRQ(void);
  36. extern QUICC *pquicc;
  37. /* TODO DON"T Hard Code this */
  38. /* calculate properly using the right PLL and prescaller */
  39. // unsigned int system_clock = 33000000l;
  40. extern unsigned long int system_clock; //In kernel setup.c
  41. extern void config_M68360_irq(void);
  42. void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
  43. {
  44. unsigned char prescaler;
  45. unsigned short tgcr_save;
  46. int return_value;
  47. #if 0
  48. /* Restart mode, Enable int, 32KHz, Enable timer */
  49. TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
  50. /* Set prescaler (Divide 32KHz by 32)*/
  51. TPRER = 31;
  52. /* Set compare register 32Khz / 32 / 10 = 100 */
  53. TCMP = 10;
  54. request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
  55. #endif
  56. /* General purpose quicc timers: MC68360UM p7-20 */
  57. /* Set up timer 1 (in [1..4]) to do 100Hz */
  58. tgcr_save = pquicc->timer_tgcr & 0xfff0;
  59. pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
  60. /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
  61. prescaler = 8;
  62. pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
  63. (unsigned short)((prescaler - 1) << 8);
  64. pquicc->timer_tcn1 = 0x0000; /* initial count */
  65. /* calculate interval for 100Hz based on the _system_clock: */
  66. pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
  67. pquicc->timer_ter1 = 0x0003; /* clear timer events */
  68. /* enable timer 1 interrupt in CIMR */
  69. // request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
  70. //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
  71. return_value = request_irq(CPMVEC_TIMER1 , timer_routine, IRQ_FLG_LOCK,
  72. "Timer", NULL);
  73. /* Start timer 1: */
  74. tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
  75. pquicc->timer_tgcr = tgcr_save;
  76. }
  77. void BSP_tick(void)
  78. {
  79. /* Reset Timer1 */
  80. /* TSTAT &= 0; */
  81. pquicc->timer_ter1 = 0x0002; /* clear timer event */
  82. }
  83. unsigned long BSP_gettimeoffset (void)
  84. {
  85. return 0;
  86. }
  87. void BSP_gettod (int *yearp, int *monp, int *dayp,
  88. int *hourp, int *minp, int *secp)
  89. {
  90. }
  91. int BSP_hwclk(int op, struct hwclk_time *t)
  92. {
  93. if (!op) {
  94. /* read */
  95. } else {
  96. /* write */
  97. }
  98. return 0;
  99. }
  100. int BSP_set_clock_mmss (unsigned long nowtime)
  101. {
  102. #if 0
  103. short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
  104. tod->second1 = real_seconds / 10;
  105. tod->second2 = real_seconds % 10;
  106. tod->minute1 = real_minutes / 10;
  107. tod->minute2 = real_minutes % 10;
  108. #endif
  109. return 0;
  110. }
  111. void BSP_reset (void)
  112. {
  113. local_irq_disable();
  114. asm volatile ("
  115. moveal #_start, %a0;
  116. moveb #0, 0xFFFFF300;
  117. moveal 0(%a0), %sp;
  118. moveal 4(%a0), %a0;
  119. jmp (%a0);
  120. ");
  121. }
  122. unsigned char *scc1_hwaddr;
  123. static int errno;
  124. #if defined (CONFIG_UCQUICC)
  125. _bsc0(char *, getserialnum)
  126. _bsc1(unsigned char *, gethwaddr, int, a)
  127. _bsc1(char *, getbenv, char *, a)
  128. #endif
  129. void config_BSP(char *command, int len)
  130. {
  131. unsigned char *p;
  132. m360_cpm_reset();
  133. /* Calculate the real system clock value. */
  134. {
  135. unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
  136. if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
  137. {
  138. int mf = (int)(pquicc->sim_pllcr & 0x0fff);
  139. system_clock = (OSCILLATOR / 128) * (mf + 1);
  140. }
  141. else
  142. {
  143. int mf = (int)(pquicc->sim_pllcr & 0x0fff);
  144. system_clock = (OSCILLATOR) * (mf + 1);
  145. }
  146. }
  147. printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
  148. #if defined(CONFIG_UCQUICC) && 0
  149. printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
  150. p = scc1_hwaddr = gethwaddr(0);
  151. printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
  152. p[0], p[1], p[2], p[3], p[4], p[5]);
  153. p = getbenv("APPEND");
  154. if (p)
  155. strcpy(p,command);
  156. else
  157. command[0] = 0;
  158. #else
  159. scc1_hwaddr = "\00\01\02\03\04\05";
  160. #endif
  161. mach_sched_init = BSP_sched_init;
  162. mach_tick = BSP_tick;
  163. mach_gettimeoffset = BSP_gettimeoffset;
  164. mach_gettod = BSP_gettod;
  165. mach_hwclk = NULL;
  166. mach_set_clock_mmss = NULL;
  167. mach_reset = BSP_reset;
  168. }