macints.c 18 KB

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  1. /*
  2. * Macintosh interrupts
  3. *
  4. * General design:
  5. * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
  6. * exclusively use the autovector interrupts (the 'generic level0-level7'
  7. * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
  8. * are used:
  9. * 1 - VIA1
  10. * - slot 0: one second interrupt (CA2)
  11. * - slot 1: VBlank (CA1)
  12. * - slot 2: ADB data ready (SR full)
  13. * - slot 3: ADB data (CB2)
  14. * - slot 4: ADB clock (CB1)
  15. * - slot 5: timer 2
  16. * - slot 6: timer 1
  17. * - slot 7: status of IRQ; signals 'any enabled int.'
  18. *
  19. * 2 - VIA2 or RBV
  20. * - slot 0: SCSI DRQ (CA2)
  21. * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
  22. * - slot 2: /EXP IRQ (only on IIci)
  23. * - slot 3: SCSI IRQ (CB2)
  24. * - slot 4: ASC IRQ (CB1)
  25. * - slot 5: timer 2 (not on IIci)
  26. * - slot 6: timer 1 (not on IIci)
  27. * - slot 7: status of IRQ; signals 'any enabled int.'
  28. *
  29. * 2 - OSS (IIfx only?)
  30. * - slot 0: SCSI interrupt
  31. * - slot 1: Sound interrupt
  32. *
  33. * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
  34. *
  35. * 3 - unused (?)
  36. *
  37. * 4 - SCC (slot number determined by reading RR3 on the SSC itself)
  38. * - slot 1: SCC channel A
  39. * - slot 2: SCC channel B
  40. *
  41. * 5 - unused (?)
  42. * [serial errors or special conditions seem to raise level 6
  43. * interrupts on some models (LC4xx?)]
  44. *
  45. * 6 - off switch (?)
  46. *
  47. * For OSS Macintoshes (IIfx only at this point):
  48. *
  49. * 3 - Nubus interrupt
  50. * - slot 0: Slot $9
  51. * - slot 1: Slot $A
  52. * - slot 2: Slot $B
  53. * - slot 3: Slot $C
  54. * - slot 4: Slot $D
  55. * - slot 5: Slot $E
  56. *
  57. * 4 - SCC IOP
  58. * - slot 1: SCC channel A
  59. * - slot 2: SCC channel B
  60. *
  61. * 5 - ISM IOP (ADB?)
  62. *
  63. * 6 - unused
  64. *
  65. * For PSC Macintoshes (660AV, 840AV):
  66. *
  67. * 3 - PSC level 3
  68. * - slot 0: MACE
  69. *
  70. * 4 - PSC level 4
  71. * - slot 1: SCC channel A interrupt
  72. * - slot 2: SCC channel B interrupt
  73. * - slot 3: MACE DMA
  74. *
  75. * 5 - PSC level 5
  76. *
  77. * 6 - PSC level 6
  78. *
  79. * Finally we have good 'ole level 7, the non-maskable interrupt:
  80. *
  81. * 7 - NMI (programmer's switch on the back of some Macs)
  82. * Also RAM parity error on models which support it (IIc, IIfx?)
  83. *
  84. * The current interrupt logic looks something like this:
  85. *
  86. * - We install dispatchers for the autovector interrupts (1-7). These
  87. * dispatchers are responsible for querying the hardware (the
  88. * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
  89. * this information a machspec interrupt number is generated by placing the
  90. * index of the interrupt hardware into the low three bits and the original
  91. * autovector interrupt number in the upper 5 bits. The handlers for the
  92. * resulting machspec interrupt are then called.
  93. *
  94. * - Nubus is a special case because its interrupts are hidden behind two
  95. * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
  96. * which translates to IRQ number 17. In this spot we install _another_
  97. * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
  98. * then forms a new machspec interrupt number as above with the slot number
  99. * minus 9 in the low three bits and the pseudo-level 7 in the upper five
  100. * bits. The handlers for this new machspec interrupt number are then
  101. * called. This puts Nubus interrupts into the range 56-62.
  102. *
  103. * - The Baboon interrupts (used on some PowerBooks) are an even more special
  104. * case. They're hidden behind the Nubus slot $C interrupt thus adding a
  105. * third layer of indirection. Why oh why did the Apple engineers do that?
  106. *
  107. * - We support "fast" and "slow" handlers, just like the Amiga port. The
  108. * fast handlers are called first and with all interrupts disabled. They
  109. * are expected to execute quickly (hence the name). The slow handlers are
  110. * called last with interrupts enabled and the interrupt level restored.
  111. * They must therefore be reentrant.
  112. *
  113. * TODO:
  114. *
  115. */
  116. #include <linux/types.h>
  117. #include <linux/kernel.h>
  118. #include <linux/sched.h>
  119. #include <linux/kernel_stat.h>
  120. #include <linux/interrupt.h> /* for intr_count */
  121. #include <linux/delay.h>
  122. #include <linux/seq_file.h>
  123. #include <asm/system.h>
  124. #include <asm/irq.h>
  125. #include <asm/traps.h>
  126. #include <asm/bootinfo.h>
  127. #include <asm/machw.h>
  128. #include <asm/macintosh.h>
  129. #include <asm/mac_via.h>
  130. #include <asm/mac_psc.h>
  131. #include <asm/hwtest.h>
  132. #include <asm/errno.h>
  133. #include <asm/macints.h>
  134. #define DEBUG_SPURIOUS
  135. #define SHUTUP_SONIC
  136. /*
  137. * The mac_irq_list array is an array of linked lists of irq_node_t nodes.
  138. * Each node contains one handler to be called whenever the interrupt
  139. * occurs, with fast handlers listed before slow handlers.
  140. */
  141. irq_node_t *mac_irq_list[NUM_MAC_SOURCES];
  142. /* SCC interrupt mask */
  143. static int scc_mask;
  144. /*
  145. * VIA/RBV hooks
  146. */
  147. extern void via_init(void);
  148. extern void via_register_interrupts(void);
  149. extern void via_irq_enable(int);
  150. extern void via_irq_disable(int);
  151. extern void via_irq_clear(int);
  152. extern int via_irq_pending(int);
  153. /*
  154. * OSS hooks
  155. */
  156. extern int oss_present;
  157. extern void oss_init(void);
  158. extern void oss_register_interrupts(void);
  159. extern void oss_irq_enable(int);
  160. extern void oss_irq_disable(int);
  161. extern void oss_irq_clear(int);
  162. extern int oss_irq_pending(int);
  163. /*
  164. * PSC hooks
  165. */
  166. extern int psc_present;
  167. extern void psc_init(void);
  168. extern void psc_register_interrupts(void);
  169. extern void psc_irq_enable(int);
  170. extern void psc_irq_disable(int);
  171. extern void psc_irq_clear(int);
  172. extern int psc_irq_pending(int);
  173. /*
  174. * IOP hooks
  175. */
  176. extern void iop_register_interrupts(void);
  177. /*
  178. * Baboon hooks
  179. */
  180. extern int baboon_present;
  181. extern void baboon_init(void);
  182. extern void baboon_register_interrupts(void);
  183. extern void baboon_irq_enable(int);
  184. extern void baboon_irq_disable(int);
  185. extern void baboon_irq_clear(int);
  186. extern int baboon_irq_pending(int);
  187. /*
  188. * SCC interrupt routines
  189. */
  190. static void scc_irq_enable(int);
  191. static void scc_irq_disable(int);
  192. /*
  193. * console_loglevel determines NMI handler function
  194. */
  195. extern irqreturn_t mac_bang(int, void *, struct pt_regs *);
  196. irqreturn_t mac_nmi_handler(int, void *, struct pt_regs *);
  197. irqreturn_t mac_debug_handler(int, void *, struct pt_regs *);
  198. /* #define DEBUG_MACINTS */
  199. void mac_init_IRQ(void)
  200. {
  201. int i;
  202. #ifdef DEBUG_MACINTS
  203. printk("mac_init_IRQ(): Setting things up...\n");
  204. #endif
  205. /* Initialize the IRQ handler lists. Initially each list is empty, */
  206. for (i = 0; i < NUM_MAC_SOURCES; i++) {
  207. mac_irq_list[i] = NULL;
  208. }
  209. scc_mask = 0;
  210. /* Make sure the SONIC interrupt is cleared or things get ugly */
  211. #ifdef SHUTUP_SONIC
  212. printk("Killing onboard sonic... ");
  213. /* This address should hopefully be mapped already */
  214. if (hwreg_present((void*)(0x50f0a000))) {
  215. *(long *)(0x50f0a014) = 0x7fffL;
  216. *(long *)(0x50f0a010) = 0L;
  217. }
  218. printk("Done.\n");
  219. #endif /* SHUTUP_SONIC */
  220. /*
  221. * Now register the handlers for the master IRQ handlers
  222. * at levels 1-7. Most of the work is done elsewhere.
  223. */
  224. if (oss_present) {
  225. oss_register_interrupts();
  226. } else {
  227. via_register_interrupts();
  228. }
  229. if (psc_present) psc_register_interrupts();
  230. if (baboon_present) baboon_register_interrupts();
  231. iop_register_interrupts();
  232. cpu_request_irq(7, mac_nmi_handler, IRQ_FLG_LOCK, "NMI",
  233. mac_nmi_handler);
  234. #ifdef DEBUG_MACINTS
  235. printk("mac_init_IRQ(): Done!\n");
  236. #endif
  237. }
  238. /*
  239. * Routines to work with irq_node_t's on linked lists lifted from
  240. * the Amiga code written by Roman Zippel.
  241. */
  242. static inline void mac_insert_irq(irq_node_t **list, irq_node_t *node)
  243. {
  244. unsigned long flags;
  245. irq_node_t *cur;
  246. if (!node->dev_id)
  247. printk("%s: Warning: dev_id of %s is zero\n",
  248. __FUNCTION__, node->devname);
  249. local_irq_save(flags);
  250. cur = *list;
  251. if (node->flags & IRQ_FLG_FAST) {
  252. node->flags &= ~IRQ_FLG_SLOW;
  253. while (cur && cur->flags & IRQ_FLG_FAST) {
  254. list = &cur->next;
  255. cur = cur->next;
  256. }
  257. } else if (node->flags & IRQ_FLG_SLOW) {
  258. while (cur) {
  259. list = &cur->next;
  260. cur = cur->next;
  261. }
  262. } else {
  263. while (cur && !(cur->flags & IRQ_FLG_SLOW)) {
  264. list = &cur->next;
  265. cur = cur->next;
  266. }
  267. }
  268. node->next = cur;
  269. *list = node;
  270. local_irq_restore(flags);
  271. }
  272. static inline void mac_delete_irq(irq_node_t **list, void *dev_id)
  273. {
  274. unsigned long flags;
  275. irq_node_t *node;
  276. local_irq_save(flags);
  277. for (node = *list; node; list = &node->next, node = *list) {
  278. if (node->dev_id == dev_id) {
  279. *list = node->next;
  280. /* Mark it as free. */
  281. node->handler = NULL;
  282. local_irq_restore(flags);
  283. return;
  284. }
  285. }
  286. local_irq_restore(flags);
  287. printk ("%s: tried to remove invalid irq\n", __FUNCTION__);
  288. }
  289. /*
  290. * Call all the handlers for a given interrupt. Fast handlers are called
  291. * first followed by slow handlers.
  292. *
  293. * This code taken from the original Amiga code written by Roman Zippel.
  294. */
  295. void mac_do_irq_list(int irq, struct pt_regs *fp)
  296. {
  297. irq_node_t *node, *slow_nodes;
  298. unsigned long flags;
  299. kstat_cpu(0).irqs[irq]++;
  300. #ifdef DEBUG_SPURIOUS
  301. if (!mac_irq_list[irq] && (console_loglevel > 7)) {
  302. printk("mac_do_irq_list: spurious interrupt %d!\n", irq);
  303. return;
  304. }
  305. #endif
  306. /* serve first fast and normal handlers */
  307. for (node = mac_irq_list[irq];
  308. node && (!(node->flags & IRQ_FLG_SLOW));
  309. node = node->next)
  310. node->handler(irq, node->dev_id, fp);
  311. if (!node) return;
  312. local_save_flags(flags);
  313. local_irq_restore((flags & ~0x0700) | (fp->sr & 0x0700));
  314. /* if slow handlers exists, serve them now */
  315. slow_nodes = node;
  316. for (; node; node = node->next) {
  317. node->handler(irq, node->dev_id, fp);
  318. }
  319. }
  320. /*
  321. * mac_enable_irq - enable an interrupt source
  322. * mac_disable_irq - disable an interrupt source
  323. * mac_clear_irq - clears a pending interrupt
  324. * mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending)
  325. *
  326. * These routines are just dispatchers to the VIA/OSS/PSC routines.
  327. */
  328. void mac_enable_irq (unsigned int irq)
  329. {
  330. int irq_src = IRQ_SRC(irq);
  331. switch(irq_src) {
  332. case 1: via_irq_enable(irq);
  333. break;
  334. case 2:
  335. case 7: if (oss_present) {
  336. oss_irq_enable(irq);
  337. } else {
  338. via_irq_enable(irq);
  339. }
  340. break;
  341. case 3:
  342. case 4:
  343. case 5:
  344. case 6: if (psc_present) {
  345. psc_irq_enable(irq);
  346. } else if (oss_present) {
  347. oss_irq_enable(irq);
  348. } else if (irq_src == 4) {
  349. scc_irq_enable(irq);
  350. }
  351. break;
  352. case 8: if (baboon_present) {
  353. baboon_irq_enable(irq);
  354. }
  355. break;
  356. }
  357. }
  358. void mac_disable_irq (unsigned int irq)
  359. {
  360. int irq_src = IRQ_SRC(irq);
  361. switch(irq_src) {
  362. case 1: via_irq_disable(irq);
  363. break;
  364. case 2:
  365. case 7: if (oss_present) {
  366. oss_irq_disable(irq);
  367. } else {
  368. via_irq_disable(irq);
  369. }
  370. break;
  371. case 3:
  372. case 4:
  373. case 5:
  374. case 6: if (psc_present) {
  375. psc_irq_disable(irq);
  376. } else if (oss_present) {
  377. oss_irq_disable(irq);
  378. } else if (irq_src == 4) {
  379. scc_irq_disable(irq);
  380. }
  381. break;
  382. case 8: if (baboon_present) {
  383. baboon_irq_disable(irq);
  384. }
  385. break;
  386. }
  387. }
  388. void mac_clear_irq( unsigned int irq )
  389. {
  390. switch(IRQ_SRC(irq)) {
  391. case 1: via_irq_clear(irq);
  392. break;
  393. case 2:
  394. case 7: if (oss_present) {
  395. oss_irq_clear(irq);
  396. } else {
  397. via_irq_clear(irq);
  398. }
  399. break;
  400. case 3:
  401. case 4:
  402. case 5:
  403. case 6: if (psc_present) {
  404. psc_irq_clear(irq);
  405. } else if (oss_present) {
  406. oss_irq_clear(irq);
  407. }
  408. break;
  409. case 8: if (baboon_present) {
  410. baboon_irq_clear(irq);
  411. }
  412. break;
  413. }
  414. }
  415. int mac_irq_pending( unsigned int irq )
  416. {
  417. switch(IRQ_SRC(irq)) {
  418. case 1: return via_irq_pending(irq);
  419. case 2:
  420. case 7: if (oss_present) {
  421. return oss_irq_pending(irq);
  422. } else {
  423. return via_irq_pending(irq);
  424. }
  425. case 3:
  426. case 4:
  427. case 5:
  428. case 6: if (psc_present) {
  429. return psc_irq_pending(irq);
  430. } else if (oss_present) {
  431. return oss_irq_pending(irq);
  432. }
  433. }
  434. return 0;
  435. }
  436. /*
  437. * Add an interrupt service routine to an interrupt source.
  438. * Returns 0 on success.
  439. *
  440. * FIXME: You can register interrupts on nonexistent source (ie PSC4 on a
  441. * non-PSC machine). We should return -EINVAL in those cases.
  442. */
  443. int mac_request_irq(unsigned int irq,
  444. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  445. unsigned long flags, const char *devname, void *dev_id)
  446. {
  447. irq_node_t *node;
  448. #ifdef DEBUG_MACINTS
  449. printk ("%s: irq %d requested for %s\n", __FUNCTION__, irq, devname);
  450. #endif
  451. if (irq < VIA1_SOURCE_BASE) {
  452. return cpu_request_irq(irq, handler, flags, devname, dev_id);
  453. }
  454. if (irq >= NUM_MAC_SOURCES) {
  455. printk ("%s: unknown irq %d requested by %s\n",
  456. __FUNCTION__, irq, devname);
  457. }
  458. /* Get a node and stick it onto the right list */
  459. if (!(node = new_irq_node())) return -ENOMEM;
  460. node->handler = handler;
  461. node->flags = flags;
  462. node->dev_id = dev_id;
  463. node->devname = devname;
  464. node->next = NULL;
  465. mac_insert_irq(&mac_irq_list[irq], node);
  466. /* Now enable the IRQ source */
  467. mac_enable_irq(irq);
  468. return 0;
  469. }
  470. /*
  471. * Removes an interrupt service routine from an interrupt source.
  472. */
  473. void mac_free_irq(unsigned int irq, void *dev_id)
  474. {
  475. #ifdef DEBUG_MACINTS
  476. printk ("%s: irq %d freed by %p\n", __FUNCTION__, irq, dev_id);
  477. #endif
  478. if (irq < VIA1_SOURCE_BASE) {
  479. cpu_free_irq(irq, dev_id);
  480. return;
  481. }
  482. if (irq >= NUM_MAC_SOURCES) {
  483. printk ("%s: unknown irq %d freed\n",
  484. __FUNCTION__, irq);
  485. return;
  486. }
  487. mac_delete_irq(&mac_irq_list[irq], dev_id);
  488. /* If the list for this interrupt is */
  489. /* empty then disable the source. */
  490. if (!mac_irq_list[irq]) {
  491. mac_disable_irq(irq);
  492. }
  493. }
  494. /*
  495. * Generate a pretty listing for /proc/interrupts
  496. *
  497. * By the time we're called the autovector interrupt list has already been
  498. * generated, so we just need to do the machspec interrupts.
  499. *
  500. * 990506 (jmt) - rewritten to handle chained machspec interrupt handlers.
  501. * Also removed display of num_spurious it is already
  502. * displayed for us as autovector irq 0.
  503. */
  504. int show_mac_interrupts(struct seq_file *p, void *v)
  505. {
  506. int i;
  507. irq_node_t *node;
  508. char *base;
  509. /* Don't do Nubus interrupts in this loop; we do them separately */
  510. /* below so that we can print slot numbers instead of IRQ numbers */
  511. for (i = VIA1_SOURCE_BASE ; i < NUM_MAC_SOURCES ; ++i) {
  512. /* Nonexistant interrupt or nothing registered; skip it. */
  513. if ((node = mac_irq_list[i]) == NULL) continue;
  514. if (node->flags & IRQ_FLG_STD) continue;
  515. base = "";
  516. switch(IRQ_SRC(i)) {
  517. case 1: base = "via1";
  518. break;
  519. case 2: if (oss_present) {
  520. base = "oss";
  521. } else {
  522. base = "via2";
  523. }
  524. break;
  525. case 3:
  526. case 4:
  527. case 5:
  528. case 6: if (psc_present) {
  529. base = "psc";
  530. } else if (oss_present) {
  531. base = "oss";
  532. } else {
  533. if (IRQ_SRC(i) == 4) base = "scc";
  534. }
  535. break;
  536. case 7: base = "nbus";
  537. break;
  538. case 8: base = "bbn";
  539. break;
  540. }
  541. seq_printf(p, "%4s %2d: %10u ", base, i, kstat_cpu(0).irqs[i]);
  542. do {
  543. if (node->flags & IRQ_FLG_FAST) {
  544. seq_puts(p, "F ");
  545. } else if (node->flags & IRQ_FLG_SLOW) {
  546. seq_puts(p, "S ");
  547. } else {
  548. seq_puts(p, " ");
  549. }
  550. seq_printf(p, "%s\n", node->devname);
  551. if ((node = node->next)) {
  552. seq_puts(p, " ");
  553. }
  554. } while(node);
  555. }
  556. return 0;
  557. }
  558. void mac_default_handler(int irq, void *dev_id, struct pt_regs *regs)
  559. {
  560. #ifdef DEBUG_SPURIOUS
  561. printk("Unexpected IRQ %d on device %p\n", irq, dev_id);
  562. #endif
  563. }
  564. static int num_debug[8];
  565. irqreturn_t mac_debug_handler(int irq, void *dev_id, struct pt_regs *regs)
  566. {
  567. if (num_debug[irq] < 10) {
  568. printk("DEBUG: Unexpected IRQ %d\n", irq);
  569. num_debug[irq]++;
  570. }
  571. return IRQ_HANDLED;
  572. }
  573. static int in_nmi;
  574. static volatile int nmi_hold;
  575. irqreturn_t mac_nmi_handler(int irq, void *dev_id, struct pt_regs *fp)
  576. {
  577. int i;
  578. /*
  579. * generate debug output on NMI switch if 'debug' kernel option given
  580. * (only works with Penguin!)
  581. */
  582. in_nmi++;
  583. for (i=0; i<100; i++)
  584. udelay(1000);
  585. if (in_nmi == 1) {
  586. nmi_hold = 1;
  587. printk("... pausing, press NMI to resume ...");
  588. } else {
  589. printk(" ok!\n");
  590. nmi_hold = 0;
  591. }
  592. barrier();
  593. while (nmi_hold == 1)
  594. udelay(1000);
  595. if ( console_loglevel >= 8 ) {
  596. #if 0
  597. show_state();
  598. printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
  599. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  600. fp->d0, fp->d1, fp->d2, fp->d3);
  601. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  602. fp->d4, fp->d5, fp->a0, fp->a1);
  603. if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
  604. printk("Corrupted stack page\n");
  605. printk("Process %s (pid: %d, stackpage=%08lx)\n",
  606. current->comm, current->pid, current->kernel_stack_page);
  607. if (intr_count == 1)
  608. dump_stack((struct frame *)fp);
  609. #else
  610. /* printk("NMI "); */
  611. #endif
  612. }
  613. in_nmi--;
  614. return IRQ_HANDLED;
  615. }
  616. /*
  617. * Simple routines for masking and unmasking
  618. * SCC interrupts in cases where this can't be
  619. * done in hardware (only the PSC can do that.)
  620. */
  621. static void scc_irq_enable(int irq) {
  622. int irq_idx = IRQ_IDX(irq);
  623. scc_mask |= (1 << irq_idx);
  624. }
  625. static void scc_irq_disable(int irq) {
  626. int irq_idx = IRQ_IDX(irq);
  627. scc_mask &= ~(1 << irq_idx);
  628. }
  629. /*
  630. * SCC master interrupt handler. We have to do a bit of magic here
  631. * to figure out what channel gave us the interrupt; putting this
  632. * here is cleaner than hacking it into drivers/char/macserial.c.
  633. */
  634. void mac_scc_dispatch(int irq, void *dev_id, struct pt_regs *regs)
  635. {
  636. volatile unsigned char *scc = (unsigned char *) mac_bi_data.sccbase + 2;
  637. unsigned char reg;
  638. unsigned long flags;
  639. /* Read RR3 from the chip. Always do this on channel A */
  640. /* This must be an atomic operation so disable irqs. */
  641. local_irq_save(flags);
  642. *scc = 3;
  643. reg = *scc;
  644. local_irq_restore(flags);
  645. /* Now dispatch. Bits 0-2 are for channel B and */
  646. /* bits 3-5 are for channel A. We can safely */
  647. /* ignore the remaining bits here. */
  648. /* */
  649. /* Note that we're ignoring scc_mask for now. */
  650. /* If we actually mask the ints then we tend to */
  651. /* get hammered by very persistent SCC irqs, */
  652. /* and since they're autovector interrupts they */
  653. /* pretty much kill the system. */
  654. if (reg & 0x38) mac_do_irq_list(IRQ_SCCA, regs);
  655. if (reg & 0x07) mac_do_irq_list(IRQ_SCCB, regs);
  656. }