swiotlb.c 18 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is for IA-64 platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. */
  16. #include <linux/cache.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/string.h>
  22. #include <linux/types.h>
  23. #include <linux/ctype.h>
  24. #include <asm/io.h>
  25. #include <asm/pci.h>
  26. #include <asm/dma.h>
  27. #include <linux/init.h>
  28. #include <linux/bootmem.h>
  29. #define OFFSET(val,align) ((unsigned long) \
  30. ( (val) & ( (align) - 1)))
  31. #define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
  32. #define SG_ENT_PHYS_ADDRESS(SG) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG))
  33. /*
  34. * Maximum allowable number of contiguous slabs to map,
  35. * must be a power of 2. What is the appropriate value ?
  36. * The complexity of {map,unmap}_single is linearly dependent on this value.
  37. */
  38. #define IO_TLB_SEGSIZE 128
  39. /*
  40. * log of the size of each IO TLB slab. The number of slabs is command line
  41. * controllable.
  42. */
  43. #define IO_TLB_SHIFT 11
  44. int swiotlb_force;
  45. /*
  46. * Used to do a quick range check in swiotlb_unmap_single and
  47. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  48. * API.
  49. */
  50. static char *io_tlb_start, *io_tlb_end;
  51. /*
  52. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  53. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  54. */
  55. static unsigned long io_tlb_nslabs;
  56. /*
  57. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  58. */
  59. static unsigned long io_tlb_overflow = 32*1024;
  60. void *io_tlb_overflow_buffer;
  61. /*
  62. * This is a free list describing the number of free entries available from
  63. * each index
  64. */
  65. static unsigned int *io_tlb_list;
  66. static unsigned int io_tlb_index;
  67. /*
  68. * We need to save away the original address corresponding to a mapped entry
  69. * for the sync operations.
  70. */
  71. static unsigned char **io_tlb_orig_addr;
  72. /*
  73. * Protect the above data structures in the map and unmap calls
  74. */
  75. static DEFINE_SPINLOCK(io_tlb_lock);
  76. static int __init
  77. setup_io_tlb_npages(char *str)
  78. {
  79. if (isdigit(*str)) {
  80. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  81. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  82. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  83. }
  84. if (*str == ',')
  85. ++str;
  86. if (!strcmp(str, "force"))
  87. swiotlb_force = 1;
  88. return 1;
  89. }
  90. __setup("swiotlb=", setup_io_tlb_npages);
  91. /* make io_tlb_overflow tunable too? */
  92. /*
  93. * Statically reserve bounce buffer space and initialize bounce buffer data
  94. * structures for the software IO TLB used to implement the PCI DMA API.
  95. */
  96. void
  97. swiotlb_init_with_default_size (size_t default_size)
  98. {
  99. unsigned long i;
  100. if (!io_tlb_nslabs) {
  101. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  102. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  103. }
  104. /*
  105. * Get IO TLB memory from the low pages
  106. */
  107. io_tlb_start = alloc_bootmem_low_pages(io_tlb_nslabs *
  108. (1 << IO_TLB_SHIFT));
  109. if (!io_tlb_start)
  110. panic("Cannot allocate SWIOTLB buffer");
  111. io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT);
  112. /*
  113. * Allocate and initialize the free list array. This array is used
  114. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  115. * between io_tlb_start and io_tlb_end.
  116. */
  117. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  118. for (i = 0; i < io_tlb_nslabs; i++)
  119. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  120. io_tlb_index = 0;
  121. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
  122. /*
  123. * Get the overflow emergency buffer
  124. */
  125. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  126. printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
  127. virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end));
  128. }
  129. void
  130. swiotlb_init (void)
  131. {
  132. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  133. }
  134. static inline int
  135. address_needs_mapping(struct device *hwdev, dma_addr_t addr)
  136. {
  137. dma_addr_t mask = 0xffffffff;
  138. /* If the device has a mask, use it, otherwise default to 32 bits */
  139. if (hwdev && hwdev->dma_mask)
  140. mask = *hwdev->dma_mask;
  141. return (addr & ~mask) != 0;
  142. }
  143. /*
  144. * Allocates bounce buffer and returns its kernel virtual address.
  145. */
  146. static void *
  147. map_single(struct device *hwdev, char *buffer, size_t size, int dir)
  148. {
  149. unsigned long flags;
  150. char *dma_addr;
  151. unsigned int nslots, stride, index, wrap;
  152. int i;
  153. /*
  154. * For mappings greater than a page, we limit the stride (and
  155. * hence alignment) to a page size.
  156. */
  157. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  158. if (size > PAGE_SIZE)
  159. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  160. else
  161. stride = 1;
  162. if (!nslots)
  163. BUG();
  164. /*
  165. * Find suitable number of IO TLB entries size that will fit this
  166. * request and allocate a buffer from that IO TLB pool.
  167. */
  168. spin_lock_irqsave(&io_tlb_lock, flags);
  169. {
  170. wrap = index = ALIGN(io_tlb_index, stride);
  171. if (index >= io_tlb_nslabs)
  172. wrap = index = 0;
  173. do {
  174. /*
  175. * If we find a slot that indicates we have 'nslots'
  176. * number of contiguous buffers, we allocate the
  177. * buffers from that slot and mark the entries as '0'
  178. * indicating unavailable.
  179. */
  180. if (io_tlb_list[index] >= nslots) {
  181. int count = 0;
  182. for (i = index; i < (int) (index + nslots); i++)
  183. io_tlb_list[i] = 0;
  184. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  185. io_tlb_list[i] = ++count;
  186. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  187. /*
  188. * Update the indices to avoid searching in
  189. * the next round.
  190. */
  191. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  192. ? (index + nslots) : 0);
  193. goto found;
  194. }
  195. index += stride;
  196. if (index >= io_tlb_nslabs)
  197. index = 0;
  198. } while (index != wrap);
  199. spin_unlock_irqrestore(&io_tlb_lock, flags);
  200. return NULL;
  201. }
  202. found:
  203. spin_unlock_irqrestore(&io_tlb_lock, flags);
  204. /*
  205. * Save away the mapping from the original address to the DMA address.
  206. * This is needed when we sync the memory. Then we sync the buffer if
  207. * needed.
  208. */
  209. io_tlb_orig_addr[index] = buffer;
  210. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  211. memcpy(dma_addr, buffer, size);
  212. return dma_addr;
  213. }
  214. /*
  215. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  216. */
  217. static void
  218. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  219. {
  220. unsigned long flags;
  221. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  222. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  223. char *buffer = io_tlb_orig_addr[index];
  224. /*
  225. * First, sync the memory before unmapping the entry
  226. */
  227. if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  228. /*
  229. * bounce... copy the data back into the original buffer * and
  230. * delete the bounce buffer.
  231. */
  232. memcpy(buffer, dma_addr, size);
  233. /*
  234. * Return the buffer to the free list by setting the corresponding
  235. * entries to indicate the number of contigous entries available.
  236. * While returning the entries to the free list, we merge the entries
  237. * with slots below and above the pool being returned.
  238. */
  239. spin_lock_irqsave(&io_tlb_lock, flags);
  240. {
  241. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  242. io_tlb_list[index + nslots] : 0);
  243. /*
  244. * Step 1: return the slots to the free list, merging the
  245. * slots with superceeding slots
  246. */
  247. for (i = index + nslots - 1; i >= index; i--)
  248. io_tlb_list[i] = ++count;
  249. /*
  250. * Step 2: merge the returned slots with the preceding slots,
  251. * if available (non zero)
  252. */
  253. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  254. io_tlb_list[i] = ++count;
  255. }
  256. spin_unlock_irqrestore(&io_tlb_lock, flags);
  257. }
  258. static void
  259. sync_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  260. {
  261. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  262. char *buffer = io_tlb_orig_addr[index];
  263. /*
  264. * bounce... copy the data back into/from the original buffer
  265. * XXX How do you handle DMA_BIDIRECTIONAL here ?
  266. */
  267. if (dir == DMA_FROM_DEVICE)
  268. memcpy(buffer, dma_addr, size);
  269. else if (dir == DMA_TO_DEVICE)
  270. memcpy(dma_addr, buffer, size);
  271. else
  272. BUG();
  273. }
  274. void *
  275. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  276. dma_addr_t *dma_handle, int flags)
  277. {
  278. unsigned long dev_addr;
  279. void *ret;
  280. int order = get_order(size);
  281. /*
  282. * XXX fix me: the DMA API should pass us an explicit DMA mask
  283. * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
  284. * bit range instead of a 16MB one).
  285. */
  286. flags |= GFP_DMA;
  287. ret = (void *)__get_free_pages(flags, order);
  288. if (ret && address_needs_mapping(hwdev, virt_to_phys(ret))) {
  289. /*
  290. * The allocated memory isn't reachable by the device.
  291. * Fall back on swiotlb_map_single().
  292. */
  293. free_pages((unsigned long) ret, order);
  294. ret = NULL;
  295. }
  296. if (!ret) {
  297. /*
  298. * We are either out of memory or the device can't DMA
  299. * to GFP_DMA memory; fall back on
  300. * swiotlb_map_single(), which will grab memory from
  301. * the lowest available address range.
  302. */
  303. dma_addr_t handle;
  304. handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
  305. if (dma_mapping_error(handle))
  306. return NULL;
  307. ret = phys_to_virt(handle);
  308. }
  309. memset(ret, 0, size);
  310. dev_addr = virt_to_phys(ret);
  311. /* Confirm address can be DMA'd by device */
  312. if (address_needs_mapping(hwdev, dev_addr)) {
  313. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016lx\n",
  314. (unsigned long long)*hwdev->dma_mask, dev_addr);
  315. panic("swiotlb_alloc_coherent: allocated memory is out of "
  316. "range for device");
  317. }
  318. *dma_handle = dev_addr;
  319. return ret;
  320. }
  321. void
  322. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  323. dma_addr_t dma_handle)
  324. {
  325. if (!(vaddr >= (void *)io_tlb_start
  326. && vaddr < (void *)io_tlb_end))
  327. free_pages((unsigned long) vaddr, get_order(size));
  328. else
  329. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  330. swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
  331. }
  332. static void
  333. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  334. {
  335. /*
  336. * Ran out of IOMMU space for this operation. This is very bad.
  337. * Unfortunately the drivers cannot handle this operation properly.
  338. * unless they check for pci_dma_mapping_error (most don't)
  339. * When the mapping is small enough return a static buffer to limit
  340. * the damage, or panic when the transfer is too big.
  341. */
  342. printk(KERN_ERR "PCI-DMA: Out of SW-IOMMU space for %lu bytes at "
  343. "device %s\n", size, dev ? dev->bus_id : "?");
  344. if (size > io_tlb_overflow && do_panic) {
  345. if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL)
  346. panic("PCI-DMA: Memory would be corrupted\n");
  347. if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL)
  348. panic("PCI-DMA: Random memory would be DMAed\n");
  349. }
  350. }
  351. /*
  352. * Map a single buffer of the indicated size for DMA in streaming mode. The
  353. * PCI address to use is returned.
  354. *
  355. * Once the device is given the dma address, the device owns this memory until
  356. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  357. */
  358. dma_addr_t
  359. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  360. {
  361. unsigned long dev_addr = virt_to_phys(ptr);
  362. void *map;
  363. if (dir == DMA_NONE)
  364. BUG();
  365. /*
  366. * If the pointer passed in happens to be in the device's DMA window,
  367. * we can safely return the device addr and not worry about bounce
  368. * buffering it.
  369. */
  370. if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
  371. return dev_addr;
  372. /*
  373. * Oh well, have to allocate and map a bounce buffer.
  374. */
  375. map = map_single(hwdev, ptr, size, dir);
  376. if (!map) {
  377. swiotlb_full(hwdev, size, dir, 1);
  378. map = io_tlb_overflow_buffer;
  379. }
  380. dev_addr = virt_to_phys(map);
  381. /*
  382. * Ensure that the address returned is DMA'ble
  383. */
  384. if (address_needs_mapping(hwdev, dev_addr))
  385. panic("map_single: bounce buffer is not DMA'ble");
  386. return dev_addr;
  387. }
  388. /*
  389. * Since DMA is i-cache coherent, any (complete) pages that were written via
  390. * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
  391. * flush them when they get mapped into an executable vm-area.
  392. */
  393. static void
  394. mark_clean(void *addr, size_t size)
  395. {
  396. unsigned long pg_addr, end;
  397. pg_addr = PAGE_ALIGN((unsigned long) addr);
  398. end = (unsigned long) addr + size;
  399. while (pg_addr + PAGE_SIZE <= end) {
  400. struct page *page = virt_to_page(pg_addr);
  401. set_bit(PG_arch_1, &page->flags);
  402. pg_addr += PAGE_SIZE;
  403. }
  404. }
  405. /*
  406. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  407. * match what was provided for in a previous swiotlb_map_single call. All
  408. * other usages are undefined.
  409. *
  410. * After this call, reads by the cpu to the buffer are guaranteed to see
  411. * whatever the device wrote there.
  412. */
  413. void
  414. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  415. int dir)
  416. {
  417. char *dma_addr = phys_to_virt(dev_addr);
  418. if (dir == DMA_NONE)
  419. BUG();
  420. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  421. unmap_single(hwdev, dma_addr, size, dir);
  422. else if (dir == DMA_FROM_DEVICE)
  423. mark_clean(dma_addr, size);
  424. }
  425. /*
  426. * Make physical memory consistent for a single streaming mode DMA translation
  427. * after a transfer.
  428. *
  429. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  430. * using the cpu, yet do not wish to teardown the PCI dma mapping, you must
  431. * call this function before doing so. At the next point you give the PCI dma
  432. * address back to the card, you must first perform a
  433. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  434. */
  435. void
  436. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  437. size_t size, int dir)
  438. {
  439. char *dma_addr = phys_to_virt(dev_addr);
  440. if (dir == DMA_NONE)
  441. BUG();
  442. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  443. sync_single(hwdev, dma_addr, size, dir);
  444. else if (dir == DMA_FROM_DEVICE)
  445. mark_clean(dma_addr, size);
  446. }
  447. void
  448. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  449. size_t size, int dir)
  450. {
  451. char *dma_addr = phys_to_virt(dev_addr);
  452. if (dir == DMA_NONE)
  453. BUG();
  454. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  455. sync_single(hwdev, dma_addr, size, dir);
  456. else if (dir == DMA_FROM_DEVICE)
  457. mark_clean(dma_addr, size);
  458. }
  459. /*
  460. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  461. * This is the scatter-gather version of the above swiotlb_map_single
  462. * interface. Here the scatter gather list elements are each tagged with the
  463. * appropriate dma address and length. They are obtained via
  464. * sg_dma_{address,length}(SG).
  465. *
  466. * NOTE: An implementation may be able to use a smaller number of
  467. * DMA address/length pairs than there are SG table elements.
  468. * (for example via virtual mapping capabilities)
  469. * The routine returns the number of addr/length pairs actually
  470. * used, at most nents.
  471. *
  472. * Device ownership issues as mentioned above for swiotlb_map_single are the
  473. * same here.
  474. */
  475. int
  476. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
  477. int dir)
  478. {
  479. void *addr;
  480. unsigned long dev_addr;
  481. int i;
  482. if (dir == DMA_NONE)
  483. BUG();
  484. for (i = 0; i < nelems; i++, sg++) {
  485. addr = SG_ENT_VIRT_ADDRESS(sg);
  486. dev_addr = virt_to_phys(addr);
  487. if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
  488. sg->dma_address = (dma_addr_t) virt_to_phys(map_single(hwdev, addr, sg->length, dir));
  489. if (!sg->dma_address) {
  490. /* Don't panic here, we expect map_sg users
  491. to do proper error handling. */
  492. swiotlb_full(hwdev, sg->length, dir, 0);
  493. swiotlb_unmap_sg(hwdev, sg - i, i, dir);
  494. sg[0].dma_length = 0;
  495. return 0;
  496. }
  497. } else
  498. sg->dma_address = dev_addr;
  499. sg->dma_length = sg->length;
  500. }
  501. return nelems;
  502. }
  503. /*
  504. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  505. * concerning calls here are the same as for swiotlb_unmap_single() above.
  506. */
  507. void
  508. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
  509. int dir)
  510. {
  511. int i;
  512. if (dir == DMA_NONE)
  513. BUG();
  514. for (i = 0; i < nelems; i++, sg++)
  515. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  516. unmap_single(hwdev, (void *) phys_to_virt(sg->dma_address), sg->dma_length, dir);
  517. else if (dir == DMA_FROM_DEVICE)
  518. mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  519. }
  520. /*
  521. * Make physical memory consistent for a set of streaming mode DMA translations
  522. * after a transfer.
  523. *
  524. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  525. * and usage.
  526. */
  527. void
  528. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  529. int nelems, int dir)
  530. {
  531. int i;
  532. if (dir == DMA_NONE)
  533. BUG();
  534. for (i = 0; i < nelems; i++, sg++)
  535. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  536. sync_single(hwdev, (void *) sg->dma_address,
  537. sg->dma_length, dir);
  538. }
  539. void
  540. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  541. int nelems, int dir)
  542. {
  543. int i;
  544. if (dir == DMA_NONE)
  545. BUG();
  546. for (i = 0; i < nelems; i++, sg++)
  547. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  548. sync_single(hwdev, (void *) sg->dma_address,
  549. sg->dma_length, dir);
  550. }
  551. int
  552. swiotlb_dma_mapping_error(dma_addr_t dma_addr)
  553. {
  554. return (dma_addr == virt_to_phys(io_tlb_overflow_buffer));
  555. }
  556. /*
  557. * Return whether the given PCI device DMA address mask can be supported
  558. * properly. For example, if your device can only drive the low 24-bits
  559. * during PCI bus mastering, then you would pass 0x00ffffff as the mask to
  560. * this function.
  561. */
  562. int
  563. swiotlb_dma_supported (struct device *hwdev, u64 mask)
  564. {
  565. return (virt_to_phys (io_tlb_end) - 1) <= mask;
  566. }
  567. EXPORT_SYMBOL(swiotlb_init);
  568. EXPORT_SYMBOL(swiotlb_map_single);
  569. EXPORT_SYMBOL(swiotlb_unmap_single);
  570. EXPORT_SYMBOL(swiotlb_map_sg);
  571. EXPORT_SYMBOL(swiotlb_unmap_sg);
  572. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  573. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  574. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  575. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  576. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  577. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  578. EXPORT_SYMBOL(swiotlb_free_coherent);
  579. EXPORT_SYMBOL(swiotlb_dma_supported);