common.c 6.0 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <asm/acpi.h>
  11. #include <asm/segment.h>
  12. #include <asm/io.h>
  13. #include <asm/smp.h>
  14. #include "pci.h"
  15. #ifdef CONFIG_PCI_BIOS
  16. extern void pcibios_sort(void);
  17. #endif
  18. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  19. PCI_PROBE_MMCONF;
  20. int pci_routeirq;
  21. int pcibios_last_bus = -1;
  22. unsigned long pirq_table_addr;
  23. struct pci_bus *pci_root_bus;
  24. struct pci_raw_ops *raw_pci_ops;
  25. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  26. {
  27. return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
  28. }
  29. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  30. {
  31. return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
  32. }
  33. struct pci_ops pci_root_ops = {
  34. .read = pci_read,
  35. .write = pci_write,
  36. };
  37. /*
  38. * legacy, numa, and acpi all want to call pcibios_scan_root
  39. * from their initcalls. This flag prevents that.
  40. */
  41. int pcibios_scanned;
  42. /*
  43. * This interrupt-safe spinlock protects all accesses to PCI
  44. * configuration space.
  45. */
  46. DEFINE_SPINLOCK(pci_config_lock);
  47. /*
  48. * Several buggy motherboards address only 16 devices and mirror
  49. * them to next 16 IDs. We try to detect this `feature' on all
  50. * primary buses (those containing host bridges as they are
  51. * expected to be unique) and remove the ghost devices.
  52. */
  53. static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
  54. {
  55. struct list_head *ln, *mn;
  56. struct pci_dev *d, *e;
  57. int mirror = PCI_DEVFN(16,0);
  58. int seen_host_bridge = 0;
  59. int i;
  60. DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
  61. list_for_each(ln, &b->devices) {
  62. d = pci_dev_b(ln);
  63. if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
  64. seen_host_bridge++;
  65. for (mn=ln->next; mn != &b->devices; mn=mn->next) {
  66. e = pci_dev_b(mn);
  67. if (e->devfn != d->devfn + mirror ||
  68. e->vendor != d->vendor ||
  69. e->device != d->device ||
  70. e->class != d->class)
  71. continue;
  72. for(i=0; i<PCI_NUM_RESOURCES; i++)
  73. if (e->resource[i].start != d->resource[i].start ||
  74. e->resource[i].end != d->resource[i].end ||
  75. e->resource[i].flags != d->resource[i].flags)
  76. continue;
  77. break;
  78. }
  79. if (mn == &b->devices)
  80. return;
  81. }
  82. if (!seen_host_bridge)
  83. return;
  84. printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
  85. ln = &b->devices;
  86. while (ln->next != &b->devices) {
  87. d = pci_dev_b(ln->next);
  88. if (d->devfn >= mirror) {
  89. list_del(&d->global_list);
  90. list_del(&d->bus_list);
  91. kfree(d);
  92. } else
  93. ln = ln->next;
  94. }
  95. }
  96. /*
  97. * Called after each bus is probed, but before its children
  98. * are examined.
  99. */
  100. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  101. {
  102. pcibios_fixup_ghosts(b);
  103. pci_read_bridge_bases(b);
  104. }
  105. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  106. {
  107. struct pci_bus *bus = NULL;
  108. while ((bus = pci_find_next_bus(bus)) != NULL) {
  109. if (bus->number == busnum) {
  110. /* Already scanned */
  111. return bus;
  112. }
  113. }
  114. printk("PCI: Probing PCI hardware (bus %02x)\n", busnum);
  115. return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, NULL);
  116. }
  117. extern u8 pci_cache_line_size;
  118. static int __init pcibios_init(void)
  119. {
  120. struct cpuinfo_x86 *c = &boot_cpu_data;
  121. if (!raw_pci_ops) {
  122. printk("PCI: System does not support PCI\n");
  123. return 0;
  124. }
  125. /*
  126. * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
  127. * and P4. It's also good for 386/486s (which actually have 16)
  128. * as quite a few PCI devices do not support smaller values.
  129. */
  130. pci_cache_line_size = 32 >> 2;
  131. if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
  132. pci_cache_line_size = 64 >> 2; /* K7 & K8 */
  133. else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
  134. pci_cache_line_size = 128 >> 2; /* P4 */
  135. pcibios_resource_survey();
  136. #ifdef CONFIG_PCI_BIOS
  137. if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
  138. pcibios_sort();
  139. #endif
  140. return 0;
  141. }
  142. subsys_initcall(pcibios_init);
  143. char * __devinit pcibios_setup(char *str)
  144. {
  145. if (!strcmp(str, "off")) {
  146. pci_probe = 0;
  147. return NULL;
  148. }
  149. #ifdef CONFIG_PCI_BIOS
  150. else if (!strcmp(str, "bios")) {
  151. pci_probe = PCI_PROBE_BIOS;
  152. return NULL;
  153. } else if (!strcmp(str, "nobios")) {
  154. pci_probe &= ~PCI_PROBE_BIOS;
  155. return NULL;
  156. } else if (!strcmp(str, "nosort")) {
  157. pci_probe |= PCI_NO_SORT;
  158. return NULL;
  159. } else if (!strcmp(str, "biosirq")) {
  160. pci_probe |= PCI_BIOS_IRQ_SCAN;
  161. return NULL;
  162. } else if (!strncmp(str, "pirqaddr=", 9)) {
  163. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  164. return NULL;
  165. }
  166. #endif
  167. #ifdef CONFIG_PCI_DIRECT
  168. else if (!strcmp(str, "conf1")) {
  169. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  170. return NULL;
  171. }
  172. else if (!strcmp(str, "conf2")) {
  173. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  174. return NULL;
  175. }
  176. #endif
  177. #ifdef CONFIG_PCI_MMCONFIG
  178. else if (!strcmp(str, "nommconf")) {
  179. pci_probe &= ~PCI_PROBE_MMCONF;
  180. return NULL;
  181. }
  182. #endif
  183. else if (!strcmp(str, "noacpi")) {
  184. acpi_noirq_set();
  185. return NULL;
  186. }
  187. #ifndef CONFIG_X86_VISWS
  188. else if (!strcmp(str, "usepirqmask")) {
  189. pci_probe |= PCI_USE_PIRQ_MASK;
  190. return NULL;
  191. } else if (!strncmp(str, "irqmask=", 8)) {
  192. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  193. return NULL;
  194. } else if (!strncmp(str, "lastbus=", 8)) {
  195. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  196. return NULL;
  197. }
  198. #endif
  199. else if (!strcmp(str, "rom")) {
  200. pci_probe |= PCI_ASSIGN_ROMS;
  201. return NULL;
  202. } else if (!strcmp(str, "assign-busses")) {
  203. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  204. return NULL;
  205. } else if (!strcmp(str, "routeirq")) {
  206. pci_routeirq = 1;
  207. return NULL;
  208. }
  209. return str;
  210. }
  211. unsigned int pcibios_assign_all_busses(void)
  212. {
  213. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  214. }
  215. int pcibios_enable_device(struct pci_dev *dev, int mask)
  216. {
  217. int err;
  218. if ((err = pcibios_enable_resources(dev, mask)) < 0)
  219. return err;
  220. return pcibios_enable_irq(dev);
  221. }
  222. void pcibios_disable_device (struct pci_dev *dev)
  223. {
  224. if (pcibios_disable_irq)
  225. pcibios_disable_irq(dev);
  226. }