time_hpet.c 11 KB

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  1. /*
  2. * linux/arch/i386/kernel/time_hpet.c
  3. * This code largely copied from arch/x86_64/kernel/time.c
  4. * See that file for credits.
  5. *
  6. * 2003-06-30 Venkatesh Pallipadi - Additional changes for HPET support
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/string.h>
  12. #include <linux/init.h>
  13. #include <linux/smp.h>
  14. #include <asm/timer.h>
  15. #include <asm/fixmap.h>
  16. #include <asm/apic.h>
  17. #include <linux/timex.h>
  18. #include <linux/config.h>
  19. #include <asm/hpet.h>
  20. #include <linux/hpet.h>
  21. static unsigned long hpet_period; /* fsecs / HPET clock */
  22. unsigned long hpet_tick; /* hpet clks count per tick */
  23. unsigned long hpet_address; /* hpet memory map physical address */
  24. int hpet_use_timer;
  25. static int use_hpet; /* can be used for runtime check of hpet */
  26. static int boot_hpet_disable; /* boottime override for HPET timer */
  27. static void __iomem * hpet_virt_address; /* hpet kernel virtual address */
  28. #define FSEC_TO_USEC (1000000000UL)
  29. int hpet_readl(unsigned long a)
  30. {
  31. return readl(hpet_virt_address + a);
  32. }
  33. static void hpet_writel(unsigned long d, unsigned long a)
  34. {
  35. writel(d, hpet_virt_address + a);
  36. }
  37. #ifdef CONFIG_X86_LOCAL_APIC
  38. /*
  39. * HPET counters dont wrap around on every tick. They just change the
  40. * comparator value and continue. Next tick can be caught by checking
  41. * for a change in the comparator value. Used in apic.c.
  42. */
  43. static void __devinit wait_hpet_tick(void)
  44. {
  45. unsigned int start_cmp_val, end_cmp_val;
  46. start_cmp_val = hpet_readl(HPET_T0_CMP);
  47. do {
  48. end_cmp_val = hpet_readl(HPET_T0_CMP);
  49. } while (start_cmp_val == end_cmp_val);
  50. }
  51. #endif
  52. static int hpet_timer_stop_set_go(unsigned long tick)
  53. {
  54. unsigned int cfg;
  55. /*
  56. * Stop the timers and reset the main counter.
  57. */
  58. cfg = hpet_readl(HPET_CFG);
  59. cfg &= ~HPET_CFG_ENABLE;
  60. hpet_writel(cfg, HPET_CFG);
  61. hpet_writel(0, HPET_COUNTER);
  62. hpet_writel(0, HPET_COUNTER + 4);
  63. if (hpet_use_timer) {
  64. /*
  65. * Set up timer 0, as periodic with first interrupt to happen at
  66. * hpet_tick, and period also hpet_tick.
  67. */
  68. cfg = hpet_readl(HPET_T0_CFG);
  69. cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
  70. HPET_TN_SETVAL | HPET_TN_32BIT;
  71. hpet_writel(cfg, HPET_T0_CFG);
  72. /*
  73. * The first write after writing TN_SETVAL to the config register sets
  74. * the counter value, the second write sets the threshold.
  75. */
  76. hpet_writel(tick, HPET_T0_CMP);
  77. hpet_writel(tick, HPET_T0_CMP);
  78. }
  79. /*
  80. * Go!
  81. */
  82. cfg = hpet_readl(HPET_CFG);
  83. if (hpet_use_timer)
  84. cfg |= HPET_CFG_LEGACY;
  85. cfg |= HPET_CFG_ENABLE;
  86. hpet_writel(cfg, HPET_CFG);
  87. return 0;
  88. }
  89. /*
  90. * Check whether HPET was found by ACPI boot parse. If yes setup HPET
  91. * counter 0 for kernel base timer.
  92. */
  93. int __init hpet_enable(void)
  94. {
  95. unsigned int id;
  96. unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
  97. unsigned long hpet_tick_rem;
  98. if (boot_hpet_disable)
  99. return -1;
  100. if (!hpet_address) {
  101. return -1;
  102. }
  103. hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
  104. /*
  105. * Read the period, compute tick and quotient.
  106. */
  107. id = hpet_readl(HPET_ID);
  108. /*
  109. * We are checking for value '1' or more in number field if
  110. * CONFIG_HPET_EMULATE_RTC is set because we will need an
  111. * additional timer for RTC emulation.
  112. * However, we can do with one timer otherwise using the
  113. * the single HPET timer for system time.
  114. */
  115. #ifdef CONFIG_HPET_EMULATE_RTC
  116. if (!(id & HPET_ID_NUMBER))
  117. return -1;
  118. #endif
  119. hpet_period = hpet_readl(HPET_PERIOD);
  120. if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
  121. return -1;
  122. /*
  123. * 64 bit math
  124. * First changing tick into fsec
  125. * Then 64 bit div to find number of hpet clk per tick
  126. */
  127. ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
  128. KERNEL_TICK_USEC, FSEC_TO_USEC);
  129. ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
  130. hpet_period, tick_fsec_low, tick_fsec_high);
  131. if (hpet_tick_rem > (hpet_period >> 1))
  132. hpet_tick++; /* rounding the result */
  133. hpet_use_timer = id & HPET_ID_LEGSUP;
  134. if (hpet_timer_stop_set_go(hpet_tick))
  135. return -1;
  136. use_hpet = 1;
  137. #ifdef CONFIG_HPET
  138. {
  139. struct hpet_data hd;
  140. unsigned int ntimer;
  141. memset(&hd, 0, sizeof (hd));
  142. ntimer = hpet_readl(HPET_ID);
  143. ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
  144. ntimer++;
  145. /*
  146. * Register with driver.
  147. * Timer0 and Timer1 is used by platform.
  148. */
  149. hd.hd_phys_address = hpet_address;
  150. hd.hd_address = hpet_virt_address;
  151. hd.hd_nirqs = ntimer;
  152. hd.hd_flags = HPET_DATA_PLATFORM;
  153. hpet_reserve_timer(&hd, 0);
  154. #ifdef CONFIG_HPET_EMULATE_RTC
  155. hpet_reserve_timer(&hd, 1);
  156. #endif
  157. hd.hd_irq[0] = HPET_LEGACY_8254;
  158. hd.hd_irq[1] = HPET_LEGACY_RTC;
  159. if (ntimer > 2) {
  160. struct hpet __iomem *hpet;
  161. struct hpet_timer __iomem *timer;
  162. int i;
  163. hpet = hpet_virt_address;
  164. for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
  165. timer++, i++)
  166. hd.hd_irq[i] = (timer->hpet_config &
  167. Tn_INT_ROUTE_CNF_MASK) >>
  168. Tn_INT_ROUTE_CNF_SHIFT;
  169. }
  170. hpet_alloc(&hd);
  171. }
  172. #endif
  173. #ifdef CONFIG_X86_LOCAL_APIC
  174. if (hpet_use_timer)
  175. wait_timer_tick = wait_hpet_tick;
  176. #endif
  177. return 0;
  178. }
  179. int hpet_reenable(void)
  180. {
  181. return hpet_timer_stop_set_go(hpet_tick);
  182. }
  183. int is_hpet_enabled(void)
  184. {
  185. return use_hpet;
  186. }
  187. int is_hpet_capable(void)
  188. {
  189. if (!boot_hpet_disable && hpet_address)
  190. return 1;
  191. return 0;
  192. }
  193. static int __init hpet_setup(char* str)
  194. {
  195. if (str) {
  196. if (!strncmp("disable", str, 7))
  197. boot_hpet_disable = 1;
  198. }
  199. return 1;
  200. }
  201. __setup("hpet=", hpet_setup);
  202. #ifdef CONFIG_HPET_EMULATE_RTC
  203. /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
  204. * is enabled, we support RTC interrupt functionality in software.
  205. * RTC has 3 kinds of interrupts:
  206. * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
  207. * is updated
  208. * 2) Alarm Interrupt - generate an interrupt at a specific time of day
  209. * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
  210. * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
  211. * (1) and (2) above are implemented using polling at a frequency of
  212. * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
  213. * overhead. (DEFAULT_RTC_INT_FREQ)
  214. * For (3), we use interrupts at 64Hz or user specified periodic
  215. * frequency, whichever is higher.
  216. */
  217. #include <linux/mc146818rtc.h>
  218. #include <linux/rtc.h>
  219. extern irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  220. #define DEFAULT_RTC_INT_FREQ 64
  221. #define RTC_NUM_INTS 1
  222. static unsigned long UIE_on;
  223. static unsigned long prev_update_sec;
  224. static unsigned long AIE_on;
  225. static struct rtc_time alarm_time;
  226. static unsigned long PIE_on;
  227. static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
  228. static unsigned long PIE_count;
  229. static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
  230. /*
  231. * Timer 1 for RTC, we do not use periodic interrupt feature,
  232. * even if HPET supports periodic interrupts on Timer 1.
  233. * The reason being, to set up a periodic interrupt in HPET, we need to
  234. * stop the main counter. And if we do that everytime someone diables/enables
  235. * RTC, we will have adverse effect on main kernel timer running on Timer 0.
  236. * So, for the time being, simulate the periodic interrupt in software.
  237. *
  238. * hpet_rtc_timer_init() is called for the first time and during subsequent
  239. * interuppts reinit happens through hpet_rtc_timer_reinit().
  240. */
  241. int hpet_rtc_timer_init(void)
  242. {
  243. unsigned int cfg, cnt;
  244. unsigned long flags;
  245. if (!is_hpet_enabled())
  246. return 0;
  247. /*
  248. * Set the counter 1 and enable the interrupts.
  249. */
  250. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  251. hpet_rtc_int_freq = PIE_freq;
  252. else
  253. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  254. local_irq_save(flags);
  255. cnt = hpet_readl(HPET_COUNTER);
  256. cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
  257. hpet_writel(cnt, HPET_T1_CMP);
  258. local_irq_restore(flags);
  259. cfg = hpet_readl(HPET_T1_CFG);
  260. cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
  261. hpet_writel(cfg, HPET_T1_CFG);
  262. return 1;
  263. }
  264. static void hpet_rtc_timer_reinit(void)
  265. {
  266. unsigned int cfg, cnt;
  267. if (!(PIE_on | AIE_on | UIE_on))
  268. return;
  269. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  270. hpet_rtc_int_freq = PIE_freq;
  271. else
  272. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  273. /* It is more accurate to use the comparator value than current count.*/
  274. cnt = hpet_readl(HPET_T1_CMP);
  275. cnt += hpet_tick*HZ/hpet_rtc_int_freq;
  276. hpet_writel(cnt, HPET_T1_CMP);
  277. cfg = hpet_readl(HPET_T1_CFG);
  278. cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
  279. hpet_writel(cfg, HPET_T1_CFG);
  280. return;
  281. }
  282. /*
  283. * The functions below are called from rtc driver.
  284. * Return 0 if HPET is not being used.
  285. * Otherwise do the necessary changes and return 1.
  286. */
  287. int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
  288. {
  289. if (!is_hpet_enabled())
  290. return 0;
  291. if (bit_mask & RTC_UIE)
  292. UIE_on = 0;
  293. if (bit_mask & RTC_PIE)
  294. PIE_on = 0;
  295. if (bit_mask & RTC_AIE)
  296. AIE_on = 0;
  297. return 1;
  298. }
  299. int hpet_set_rtc_irq_bit(unsigned long bit_mask)
  300. {
  301. int timer_init_reqd = 0;
  302. if (!is_hpet_enabled())
  303. return 0;
  304. if (!(PIE_on | AIE_on | UIE_on))
  305. timer_init_reqd = 1;
  306. if (bit_mask & RTC_UIE) {
  307. UIE_on = 1;
  308. }
  309. if (bit_mask & RTC_PIE) {
  310. PIE_on = 1;
  311. PIE_count = 0;
  312. }
  313. if (bit_mask & RTC_AIE) {
  314. AIE_on = 1;
  315. }
  316. if (timer_init_reqd)
  317. hpet_rtc_timer_init();
  318. return 1;
  319. }
  320. int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  321. {
  322. if (!is_hpet_enabled())
  323. return 0;
  324. alarm_time.tm_hour = hrs;
  325. alarm_time.tm_min = min;
  326. alarm_time.tm_sec = sec;
  327. return 1;
  328. }
  329. int hpet_set_periodic_freq(unsigned long freq)
  330. {
  331. if (!is_hpet_enabled())
  332. return 0;
  333. PIE_freq = freq;
  334. PIE_count = 0;
  335. return 1;
  336. }
  337. int hpet_rtc_dropped_irq(void)
  338. {
  339. if (!is_hpet_enabled())
  340. return 0;
  341. return 1;
  342. }
  343. irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  344. {
  345. struct rtc_time curr_time;
  346. unsigned long rtc_int_flag = 0;
  347. int call_rtc_interrupt = 0;
  348. hpet_rtc_timer_reinit();
  349. if (UIE_on | AIE_on) {
  350. rtc_get_rtc_time(&curr_time);
  351. }
  352. if (UIE_on) {
  353. if (curr_time.tm_sec != prev_update_sec) {
  354. /* Set update int info, call real rtc int routine */
  355. call_rtc_interrupt = 1;
  356. rtc_int_flag = RTC_UF;
  357. prev_update_sec = curr_time.tm_sec;
  358. }
  359. }
  360. if (PIE_on) {
  361. PIE_count++;
  362. if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
  363. /* Set periodic int info, call real rtc int routine */
  364. call_rtc_interrupt = 1;
  365. rtc_int_flag |= RTC_PF;
  366. PIE_count = 0;
  367. }
  368. }
  369. if (AIE_on) {
  370. if ((curr_time.tm_sec == alarm_time.tm_sec) &&
  371. (curr_time.tm_min == alarm_time.tm_min) &&
  372. (curr_time.tm_hour == alarm_time.tm_hour)) {
  373. /* Set alarm int info, call real rtc int routine */
  374. call_rtc_interrupt = 1;
  375. rtc_int_flag |= RTC_AF;
  376. }
  377. }
  378. if (call_rtc_interrupt) {
  379. rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
  380. rtc_interrupt(rtc_int_flag, dev_id, regs);
  381. }
  382. return IRQ_HANDLED;
  383. }
  384. #endif