quirks.c 1.5 KB

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  1. /*
  2. * This file contains work-arounds for x86 and x86_64 platform bugs.
  3. */
  4. #include <linux/config.h>
  5. #include <linux/pci.h>
  6. #include <linux/irq.h>
  7. #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
  8. static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
  9. {
  10. u8 config, rev;
  11. u32 word;
  12. /* BIOS may enable hardware IRQ balancing for
  13. * E7520/E7320/E7525(revision ID 0x9 and below)
  14. * based platforms.
  15. * Disable SW irqbalance/affinity on those platforms.
  16. */
  17. pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
  18. if (rev > 0x9)
  19. return;
  20. printk(KERN_INFO "Intel E7520/7320/7525 detected.");
  21. /* enable access to config space*/
  22. pci_read_config_byte(dev, 0xf4, &config);
  23. config |= 0x2;
  24. pci_write_config_byte(dev, 0xf4, config);
  25. /* read xTPR register */
  26. raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
  27. if (!(word & (1 << 13))) {
  28. printk(KERN_INFO "Disabling irq balancing and affinity\n");
  29. #ifdef CONFIG_IRQBALANCE
  30. irqbalance_disable("");
  31. #endif
  32. noirqdebug_setup("");
  33. #ifdef CONFIG_PROC_FS
  34. no_irq_affinity = 1;
  35. #endif
  36. }
  37. config &= ~0x2;
  38. /* disable access to config space*/
  39. pci_write_config_byte(dev, 0xf4, config);
  40. }
  41. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_intel_irqbalance);
  42. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_intel_irqbalance);
  43. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_intel_irqbalance);
  44. #endif