crt0_rom.S 2.0 KB

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  1. /*
  2. * linux/arch/h8300/platform/h8s/generic/crt0_rom.S
  3. *
  4. * Yoshinori Sato <ysato@users.sourceforge.jp>
  5. *
  6. * Platform depend startup
  7. * Target Archtecture: generic
  8. * Memory Layout : ROM
  9. */
  10. #define ASSEMBLY
  11. #include <linux/config.h>
  12. #include <asm/linkage.h>
  13. #include <asm/regs267x.h>
  14. .global SYMBOL_NAME(_start)
  15. .global SYMBOL_NAME(_command_line)
  16. .global SYMBOL_NAME(_platform_gpio_table)
  17. .global SYMBOL_NAME(_target_name)
  18. .h8300s
  19. .section .text
  20. .file "crt0_rom.S"
  21. /* CPU Reset entry */
  22. SYMBOL_NAME_LABEL(_start)
  23. mov.l #__ramend,sp
  24. ldc #0x80,ccr
  25. ldc #0,exr
  26. bclr #4,@INTCR:8
  27. bset #5,@INTCR:8 /* Interrupt mode 2 */
  28. /* Peripheral Setup */
  29. /* copy .data */
  30. #if !defined(CONFIG_H8S_SIM)
  31. mov.l #__begin_data,er5
  32. mov.l #__sdata,er6
  33. mov.l #__edata,er4
  34. sub.l er6,er4
  35. shlr.l #2,er4
  36. 1:
  37. mov.l @er5+,er0
  38. mov.l er0,@er6
  39. adds #4,er6
  40. dec.l #1,er4
  41. bne 1b
  42. #endif
  43. /* .bss clear */
  44. mov.l #__sbss,er5
  45. mov.l #__ebss,er4
  46. sub.l er5,er4
  47. shlr.l #2,er4
  48. sub.l er0,er0
  49. 1:
  50. mov.l er0,@er5
  51. adds #4,er5
  52. dec.l #1,er4
  53. bne 1b
  54. /* linux kernel start */
  55. ldc #0x90,ccr /* running kernel */
  56. mov.l #SYMBOL_NAME(init_thread_union),sp
  57. add.l #0x2000,sp
  58. jsr @_start_kernel
  59. _exit:
  60. jmp _exit
  61. rts
  62. /* I/O port assign information */
  63. __platform_gpio_table:
  64. mov.l #gpio_table,er0
  65. rts
  66. gpio_table:
  67. ;; P1DDR
  68. .byte 0x00,0x00
  69. ;; P2DDR
  70. .byte 0x00,0x00
  71. ;; P3DDR
  72. .byte 0x00,0x00
  73. ;; P4DDR
  74. .byte 0x00,0x00
  75. ;; P5DDR
  76. .byte 0x00,0x00
  77. ;; P6DDR
  78. .byte 0x00,0x00
  79. ;; dummy
  80. .byte 0x00,0x00
  81. ;; P8DDR
  82. .byte 0x00,0x00
  83. ;; PADDR
  84. .byte 0x00,0x00
  85. ;; PBDDR
  86. .byte 0x00,0x00
  87. ;; PCDDR
  88. .byte 0x00,0x00
  89. ;; PDDDR
  90. .byte 0x00,0x00
  91. ;; PEDDR
  92. .byte 0x00,0x00
  93. ;; PFDDR
  94. .byte 0x00,0x00
  95. ;; PGDDR
  96. .byte 0x00,0x00
  97. ;; PHDDR
  98. .byte 0x00,0x00
  99. .section .rodata
  100. __target_name:
  101. .asciz "generic"
  102. .section .bss
  103. __command_line:
  104. .space 512
  105. /* interrupt vector */
  106. .section .vectors,"ax"
  107. .long __start
  108. .long __start
  109. vector = 2
  110. .rept 126-1
  111. .long _interrupt_redirect_table+vector*4
  112. vector = vector + 1
  113. .endr