crt0_ram.S 2.0 KB

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  1. /*
  2. * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
  3. *
  4. * Yoshinori Sato <ysato@users.sourceforge.jp>
  5. *
  6. * Platform depend startup
  7. * Target Archtecture: generic
  8. * Memory Layout : RAM
  9. */
  10. #define ASSEMBLY
  11. #include <linux/config.h>
  12. #include <asm/linkage.h>
  13. #include <asm/regs267x.h>
  14. #if !defined(CONFIG_BLKDEV_RESERVE)
  15. #if defined(CONFIG_GDB_DEBUG)
  16. #define RAMEND (__ramend - 0xc000)
  17. #else
  18. #define RAMEND __ramend
  19. #endif
  20. #else
  21. #define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
  22. #endif
  23. .global SYMBOL_NAME(_start)
  24. .global SYMBOL_NAME(_command_line)
  25. .global SYMBOL_NAME(_platform_gpio_table)
  26. .global SYMBOL_NAME(_target_name)
  27. .h8300s
  28. .section .text
  29. .file "crt0_ram.S"
  30. /* CPU Reset entry */
  31. SYMBOL_NAME_LABEL(_start)
  32. mov.l #RAMEND,sp
  33. ldc #0x80,ccr
  34. ldc #0x00,exr
  35. /* Peripheral Setup */
  36. bclr #4,@INTCR:8 /* interrupt mode 2 */
  37. bset #5,@INTCR:8
  38. #if defined(CONFIG_MTD_UCLINUX)
  39. /* move romfs image */
  40. jsr @__move_romfs
  41. #endif
  42. /* .bss clear */
  43. mov.l #__sbss,er5
  44. mov.l er5,er6
  45. mov.l #__ebss,er4
  46. sub.l er5,er4
  47. shlr #2,er4
  48. sub.l er0,er0
  49. 1:
  50. mov.l er0,@er5
  51. adds #4,er5
  52. dec.l #1,er4
  53. bne 1b
  54. /* copy kernel commandline */
  55. mov.l #COMMAND_START,er5
  56. mov.l #SYMBOL_NAME(command_line),er6
  57. mov.w #512,r4
  58. eepmov.w
  59. /* uClinux kernel start */
  60. ldc #0x90,ccr /* running kernel */
  61. mov.l #SYMBOL_NAME(init_thread_union),sp
  62. add.l #0x2000,sp
  63. jsr @_start_kernel
  64. _exit:
  65. jmp _exit
  66. rts
  67. /* I/O port assign information */
  68. __platform_gpio_table:
  69. mov.l #gpio_table,er0
  70. rts
  71. gpio_table:
  72. ;; P1DDR
  73. ;; used,ddr
  74. .byte 0x00,0x00
  75. ;; P2DDR
  76. .byte 0x00,0x00
  77. ;; P3DDR
  78. .byte 0x00,0x00
  79. ;; dummy
  80. .byte 0x00,0x00
  81. ;; P5DDR
  82. .byte 0x00,0x00
  83. ;; P6DDR
  84. .byte 0x00,0x00
  85. ;; P7DDR
  86. .byte 0x00,0x00
  87. ;; P8DDR
  88. .byte 0x00,0x00
  89. ;; dummy
  90. .byte 0x00,0x00
  91. ;; PADDR
  92. .byte 0x00,0x00
  93. ;; PBDDR
  94. .byte 0x00,0x00
  95. ;; PCDDR
  96. .byte 0x00,0x00
  97. ;; PDDDR
  98. .byte 0x00,0x00
  99. ;; PEDDR
  100. .byte 0x00,0x00
  101. ;; PFDDR
  102. .byte 0x00,0x00
  103. ;; PGDDR
  104. .byte 0x00,0x00
  105. ;; PHDDR
  106. .byte 0x00,0x00
  107. __target_name:
  108. .asciz "generic"
  109. .section .bootvec,"ax"
  110. jmp @SYMBOL_NAME(_start)