irq-mb93091.c 2.8 KB

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  1. /* irq-mb93091.c: MB93091 FPGA interrupt handling
  2. *
  3. * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/config.h>
  12. #include <linux/ptrace.h>
  13. #include <linux/errno.h>
  14. #include <linux/signal.h>
  15. #include <linux/sched.h>
  16. #include <linux/ioport.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/init.h>
  19. #include <linux/irq.h>
  20. #include <asm/io.h>
  21. #include <asm/system.h>
  22. #include <asm/bitops.h>
  23. #include <asm/delay.h>
  24. #include <asm/irq.h>
  25. #include <asm/irc-regs.h>
  26. #include <asm/irq-routing.h>
  27. #define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
  28. #define __get_IMR() ({ __reg16(0xffc00004); })
  29. #define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0)
  30. #define __get_IFR() ({ __reg16(0xffc0000c); })
  31. #define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
  32. static void frv_fpga_doirq(struct irq_source *source);
  33. static void frv_fpga_control(struct irq_group *group, int irq, int on);
  34. /*****************************************************************************/
  35. /*
  36. * FPGA IRQ multiplexor
  37. */
  38. static struct irq_source frv_fpga[4] = {
  39. #define __FPGA(X, M) \
  40. [X] = { \
  41. .muxname = "fpga."#X, \
  42. .irqmask = M, \
  43. .doirq = frv_fpga_doirq, \
  44. }
  45. __FPGA(0, 0x0028),
  46. __FPGA(1, 0x0050),
  47. __FPGA(2, 0x1c00),
  48. __FPGA(3, 0x6386),
  49. };
  50. static struct irq_group frv_fpga_irqs = {
  51. .first_irq = IRQ_BASE_FPGA,
  52. .control = frv_fpga_control,
  53. .sources = {
  54. [ 1] = &frv_fpga[3],
  55. [ 2] = &frv_fpga[3],
  56. [ 3] = &frv_fpga[0],
  57. [ 4] = &frv_fpga[1],
  58. [ 5] = &frv_fpga[0],
  59. [ 6] = &frv_fpga[1],
  60. [ 7] = &frv_fpga[3],
  61. [ 8] = &frv_fpga[3],
  62. [ 9] = &frv_fpga[3],
  63. [10] = &frv_fpga[2],
  64. [11] = &frv_fpga[2],
  65. [12] = &frv_fpga[2],
  66. [13] = &frv_fpga[3],
  67. [14] = &frv_fpga[3],
  68. },
  69. };
  70. static void frv_fpga_control(struct irq_group *group, int index, int on)
  71. {
  72. uint16_t imr = __get_IMR();
  73. if (on)
  74. imr &= ~(1 << index);
  75. else
  76. imr |= 1 << index;
  77. __set_IMR(imr);
  78. }
  79. static void frv_fpga_doirq(struct irq_source *source)
  80. {
  81. uint16_t mask, imr;
  82. imr = __get_IMR();
  83. mask = source->irqmask & ~imr & __get_IFR();
  84. if (mask) {
  85. __set_IMR(imr | mask);
  86. __clr_IFR(mask);
  87. distribute_irqs(&frv_fpga_irqs, mask);
  88. __set_IMR(imr);
  89. }
  90. }
  91. void __init fpga_init(void)
  92. {
  93. __set_IMR(0x7ffe);
  94. __clr_IFR(0x0000);
  95. frv_irq_route_external(&frv_fpga[0], IRQ_CPU_EXTERNAL0);
  96. frv_irq_route_external(&frv_fpga[1], IRQ_CPU_EXTERNAL1);
  97. frv_irq_route_external(&frv_fpga[2], IRQ_CPU_EXTERNAL2);
  98. frv_irq_route_external(&frv_fpga[3], IRQ_CPU_EXTERNAL3);
  99. frv_irq_set_group(&frv_fpga_irqs);
  100. }