head.S 28 KB

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  1. /* $Id: head.S,v 1.10 2005/06/20 05:12:54 starvik Exp $
  2. *
  3. * Head of the kernel - alter with care
  4. *
  5. * Copyright (C) 2000, 2001 Axis Communications AB
  6. *
  7. * Authors: Bjorn Wesen (bjornw@axis.com)
  8. *
  9. * $Log: head.S,v $
  10. * Revision 1.10 2005/06/20 05:12:54 starvik
  11. * Remove unnecessary diff to kernel.org tree
  12. *
  13. * Revision 1.9 2004/12/13 12:21:51 starvik
  14. * Added I/O and DMA allocators from Linux 2.4
  15. *
  16. * Revision 1.8 2004/11/22 11:41:14 starvik
  17. * Kernel command line may be supplied to kernel. Not used by Axis but may
  18. * be used by customers.
  19. *
  20. * Revision 1.7 2004/05/14 07:58:01 starvik
  21. * Merge of changes from 2.4
  22. *
  23. * Revision 1.6 2003/04/28 05:31:46 starvik
  24. * Added section attributes
  25. *
  26. * Revision 1.5 2002/12/11 15:42:02 starvik
  27. * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/*.c
  28. *
  29. * Revision 1.4 2002/11/07 09:00:44 starvik
  30. * Names changed for init sections
  31. * init_task_union -> init_thread_union
  32. *
  33. * Revision 1.3 2002/02/05 15:38:23 bjornw
  34. * Oops.. non-CRAMFS_MAGIC should jump over the copying, not into it...
  35. *
  36. * Revision 1.2 2001/12/18 13:35:19 bjornw
  37. * Applied the 2.4.13->2.4.16 CRIS patch to 2.5.1 (is a copy of 2.4.15).
  38. *
  39. * Revision 1.43 2001/11/08 15:09:43 starvik
  40. * Only start MII clock if Ethernet is configured
  41. *
  42. * Revision 1.42 2001/11/08 14:37:34 starvik
  43. * Start MII clock early to make sure that it is running at tranceiver reset
  44. *
  45. * Revision 1.41 2001/10/29 14:55:58 pkj
  46. * Corrected pa$r0 to par0.
  47. *
  48. * Revision 1.40 2001/10/03 14:59:57 pkj
  49. * Added support for resetting the Bluetooth hardware.
  50. *
  51. * Revision 1.39 2001/10/01 14:45:03 bjornw
  52. * Removed underscores and added register prefixes
  53. *
  54. * Revision 1.38 2001/09/21 07:14:11 jonashg
  55. * Made root filesystem (cramfs) use mtdblock driver when booting from flash.
  56. *
  57. * Revision 1.37 2001/09/11 13:44:29 orjanf
  58. * Decouple usage of serial ports for debug and kgdb.
  59. *
  60. * Revision 1.36 2001/06/29 12:39:31 pkj
  61. * Added support for mirroring the first flash to just below the
  62. * second one, to make them look consecutive to cramfs.
  63. *
  64. * Revision 1.35 2001/06/25 14:07:00 hp
  65. * Fix review comment.
  66. * * head.S: Use IO_STATE, IO_FIELD and IO_MASK constructs instead of
  67. * magic numbers. Add comment that -traditional must not be used.
  68. * * entry.S (SYMBOL_NAME): Change redefinition to use ## concatenation.
  69. * Correct and update comment.
  70. * * Makefile (.S.o): Don't use -traditional. Add comment why the
  71. * toplevel rule can't be used (now that there's a reason).
  72. *
  73. * Revision 1.34 2001/05/15 07:08:14 hp
  74. * Tweak "notice" to reflect that both r8 r9 are used
  75. *
  76. * Revision 1.33 2001/05/15 06:40:05 hp
  77. * Put bulk of code in .text.init, data in .data.init
  78. *
  79. * Revision 1.32 2001/05/15 06:18:56 hp
  80. * Execute review comment: s/bcc/bhs/g; s/bcs/blo/g
  81. *
  82. * Revision 1.31 2001/05/15 06:08:40 hp
  83. * Add sentence about autodetecting the bit31-MMU-bug
  84. *
  85. * Revision 1.30 2001/05/15 06:00:05 hp
  86. * Update comment: LOW_MAP is not forced on xsim anymore.
  87. *
  88. * Revision 1.29 2001/04/18 12:51:59 orjanf
  89. * * Reverted review change regarding the use of bcs/bcc.
  90. * * Removed non-working LED-clearing code.
  91. *
  92. * Revision 1.28 2001/04/17 13:58:39 orjanf
  93. * * Renamed CONFIG_KGDB to CONFIG_ETRAX_KGDB.
  94. *
  95. * Revision 1.27 2001/04/17 11:42:35 orjanf
  96. * Changed according to review:
  97. * * Added comment explaining memory map bug.
  98. * * Changed bcs and bcc to blo and bhs, respectively.
  99. * * Removed mentioning of Stallone and Olga boards.
  100. *
  101. * Revision 1.26 2001/04/06 12:31:07 jonashg
  102. * Check for cramfs in flash before RAM instead of RAM before flash.
  103. *
  104. * Revision 1.25 2001/04/04 06:23:53 starvik
  105. * Initialize DRAM if not already initialized
  106. *
  107. * Revision 1.24 2001/04/03 11:12:00 starvik
  108. * Removed dram init (done by rescue or etrax100boot
  109. * Corrected include
  110. *
  111. * Revision 1.23 2001/04/03 09:53:03 starvik
  112. * Include hw_settings.S
  113. *
  114. * Revision 1.22 2001/03/26 14:23:26 bjornw
  115. * Namechange of some config options
  116. *
  117. * Revision 1.21 2001/03/08 12:14:41 bjornw
  118. * * Config name for ETRAX IDE was renamed
  119. * * Removed G27 auto-setting when JULIETTE is chosen (need to make this
  120. * a new config option later)
  121. *
  122. * Revision 1.20 2001/02/23 12:47:56 bjornw
  123. * MMU regs during LOW_MAP updated to reflect a newer reality
  124. *
  125. * Revision 1.19 2001/02/19 11:12:07 bjornw
  126. * Changed comment header format
  127. *
  128. * Revision 1.18 2001/02/15 07:25:38 starvik
  129. * Added support for synchronous serial ports
  130. *
  131. * Revision 1.17 2001/02/08 15:53:13 starvik
  132. * Last commit removed some important ifdefs
  133. *
  134. * Revision 1.16 2001/02/08 15:20:38 starvik
  135. * Include dram_init.S as inline
  136. *
  137. * Revision 1.15 2001/01/29 18:12:01 bjornw
  138. * Corrected some comments
  139. *
  140. * Revision 1.14 2001/01/29 13:11:29 starvik
  141. * Include dram_init.S (with DRAM/SDRAM initialization)
  142. *
  143. * Revision 1.13 2001/01/23 14:54:57 markusl
  144. * Updated for USB
  145. * i.e. added r_gen_config settings
  146. *
  147. * Revision 1.12 2001/01/19 16:16:29 perf
  148. * Added temporary mapping of 0x0c->0x0c to avoid flash loading confusion.
  149. * Renamed serial options from ETRAX100 to ETRAX.
  150. *
  151. * Revision 1.11 2001/01/16 16:31:38 bjornw
  152. * * Changed name and semantics of running_from_flash to romfs_in_flash,
  153. * set by head.S to indicate to setup.c whether there is a cramfs image
  154. * after the kernels BSS or not. Should work for all three boot-cases
  155. * (DRAM with cramfs in DRAM, DRAM with cramfs in flash (compressed boot),
  156. * and flash with cramfs in flash)
  157. *
  158. * Revision 1.10 2001/01/16 14:12:21 bjornw
  159. * * Check for cramfs start passed in r9 from the decompressor, if all other
  160. * cramfs options fail (if we boot from DRAM but don't find a cramfs image
  161. * after the kernel in DRAM, it is probably still in the flash)
  162. * * Check magic in cramfs detection when booting from flash directly
  163. *
  164. * Revision 1.9 2001/01/15 17:17:02 bjornw
  165. * * Corrected the code that detects the cramfs lengths
  166. * * Added a comment saying that the above does not work due to other
  167. * reasons..
  168. *
  169. * Revision 1.8 2001/01/15 16:27:51 jonashg
  170. * Made boot after flashing work.
  171. * * end destination is __vmlinux_end in RAM.
  172. * * _romfs_start moved because of virtual memory.
  173. *
  174. * Revision 1.7 2000/11/21 13:55:29 bjornw
  175. * Use CONFIG_CRIS_LOW_MAP for the low VM map instead of explicit CPU type
  176. *
  177. * Revision 1.6 2000/10/06 12:36:55 bjornw
  178. * Forgot swapper_pg_dir when changing memory map..
  179. *
  180. * Revision 1.5 2000/10/04 16:49:30 bjornw
  181. * * Fixed memory mapping in LX
  182. * * Check for cramfs instead of romfs
  183. *
  184. */
  185. #include <linux/config.h>
  186. #define ASSEMBLER_MACROS_ONLY
  187. /* The IO_* macros use the ## token concatenation operator, so
  188. -traditional must not be used when assembling this file. */
  189. #include <asm/arch/sv_addr_ag.h>
  190. #define CRAMFS_MAGIC 0x28cd3d45
  191. #define RAM_INIT_MAGIC 0x56902387
  192. #define COMMAND_LINE_MAGIC 0x87109563
  193. #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
  194. IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
  195. ;; exported symbols
  196. .globl etrax_irv
  197. .globl romfs_start
  198. .globl romfs_length
  199. .globl romfs_in_flash
  200. .globl swapper_pg_dir
  201. .text
  202. ;; This is the entry point of the kernel. We are in supervisor mode.
  203. ;; 0x00000000 if Flash, 0x40004000 if DRAM
  204. ;; since etrax actually starts at address 2 when booting from flash, we
  205. ;; put a nop (2 bytes) here first so we dont accidentally skip the di
  206. ;;
  207. ;; NOTICE! The registers r8 and r9 are used as parameters carrying
  208. ;; information from the decompressor (if the kernel was compressed).
  209. ;; They should not be used in the code below until read.
  210. nop
  211. di
  212. ;; First setup the kseg_c mapping from where the kernel is linked
  213. ;; to 0x40000000 (where the actual DRAM resides) otherwise
  214. ;; we cannot do very much! See arch/cris/README.mm
  215. ;;
  216. ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
  217. ;; we will get a fault as soon as we enable the MMU if we dont
  218. ;; temporarily map those segments linearily.
  219. ;;
  220. ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
  221. ;; slightly different. The bug is that you can't remap bit 31 of
  222. ;; an address. Though we can check the version register for
  223. ;; whether the bug is present, some constants would then have to
  224. ;; be variables, so we don't. The drawback is that you can "only" map
  225. ;; 1G per process with CONFIG_CRIS_LOW_MAP.
  226. #ifdef CONFIG_CRIS_LOW_MAP
  227. ; kseg mappings, temporary map of 0xc0->0x40
  228. move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
  229. | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
  230. | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
  231. | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
  232. move.d $r0, [R_MMU_KBASE_HI]
  233. ; temporary map of 0x40->0x40 and 0x60->0x40
  234. move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
  235. | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
  236. move.d $r0, [R_MMU_KBASE_LO]
  237. ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
  238. move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
  239. | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
  240. | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
  241. | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
  242. | IO_STATE (R_MMU_CONFIG, seg_f, page) \
  243. | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
  244. | IO_STATE (R_MMU_CONFIG, seg_d, page) \
  245. | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
  246. | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
  247. | IO_STATE (R_MMU_CONFIG, seg_a, seg) \
  248. | IO_STATE (R_MMU_CONFIG, seg_9, page) \
  249. | IO_STATE (R_MMU_CONFIG, seg_8, page) \
  250. | IO_STATE (R_MMU_CONFIG, seg_7, page) \
  251. | IO_STATE (R_MMU_CONFIG, seg_6, seg) \
  252. | IO_STATE (R_MMU_CONFIG, seg_5, seg) \
  253. | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
  254. | IO_STATE (R_MMU_CONFIG, seg_3, page) \
  255. | IO_STATE (R_MMU_CONFIG, seg_2, page) \
  256. | IO_STATE (R_MMU_CONFIG, seg_1, page) \
  257. | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
  258. move.d $r0, [R_MMU_CONFIG]
  259. #else
  260. ; kseg mappings
  261. move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
  262. | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
  263. | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
  264. move.d $r0, [R_MMU_KBASE_HI]
  265. ; temporary map of 0x40->0x40 and 0x00->0x00
  266. move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
  267. move.d $r0, [R_MMU_KBASE_LO]
  268. ; mmu enable, segs f,e,c,b,4,0 segment mapped
  269. move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
  270. | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
  271. | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
  272. | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
  273. | IO_STATE (R_MMU_CONFIG, seg_f, seg) \
  274. | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
  275. | IO_STATE (R_MMU_CONFIG, seg_d, page) \
  276. | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
  277. | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
  278. | IO_STATE (R_MMU_CONFIG, seg_a, page) \
  279. | IO_STATE (R_MMU_CONFIG, seg_9, page) \
  280. | IO_STATE (R_MMU_CONFIG, seg_8, page) \
  281. | IO_STATE (R_MMU_CONFIG, seg_7, page) \
  282. | IO_STATE (R_MMU_CONFIG, seg_6, page) \
  283. | IO_STATE (R_MMU_CONFIG, seg_5, page) \
  284. | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
  285. | IO_STATE (R_MMU_CONFIG, seg_3, page) \
  286. | IO_STATE (R_MMU_CONFIG, seg_2, page) \
  287. | IO_STATE (R_MMU_CONFIG, seg_1, page) \
  288. | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
  289. move.d $r0, [R_MMU_CONFIG]
  290. #endif
  291. ;; Now we need to sort out the segments and their locations in RAM or
  292. ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
  293. ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
  294. ;; But the linker has linked the kernel to expect this layout in
  295. ;; DRAM memory:
  296. ;; 1) kernel text, 2) kernel data, 3) kernel BSS
  297. ;; (the location of the ROM filesystem is determined by the krom driver)
  298. ;; If we boot this from Flash, we want to keep the ROM filesystem in
  299. ;; the flash, we want to copy the text and need to copy the data to DRAM.
  300. ;; But if we boot from DRAM, we need to move the ROMFS image
  301. ;; from its position after kernel data, to after kernel BSS, BEFORE the
  302. ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
  303. ;;
  304. ;; In both cases, we start in un-cached mode, and need to jump into a
  305. ;; cached PC after we're done fiddling around with the segments.
  306. ;;
  307. ;; arch/etrax100/etrax100.ld sets some symbols that define the start
  308. ;; and end of each segment.
  309. ;; Check if we start from DRAM or FLASH by testing PC
  310. move.d $pc,$r0
  311. and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
  312. cmp.d 0x10000,$r0 ; arbitrary... just something above this code
  313. blo _inflash0
  314. nop
  315. jump _inram ; enter cached ram
  316. ;; Jumpgate for branches.
  317. _inflash0:
  318. jump _inflash
  319. ;; Put this in a suitable section where we can reclaim storage
  320. ;; after init.
  321. .section ".init.text", "ax"
  322. _inflash:
  323. #ifdef CONFIG_ETRAX_ETHERNET
  324. ;; Start MII clock to make sure it is running when tranceiver is reset
  325. move.d START_ETHERNET_CLOCK, $r0
  326. move.d $r0, [R_NETWORK_GEN_CONFIG]
  327. #endif
  328. ;; Set up waitstates etc according to kernel configuration.
  329. #ifndef CONFIG_SVINTO_SIM
  330. move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
  331. move.d $r0, [R_WAITSTATES]
  332. move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
  333. move.d $r0, [R_BUS_CONFIG]
  334. #endif
  335. ;; We need to initialze DRAM registers before we start using the DRAM
  336. cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
  337. beq _dram_init_finished
  338. nop
  339. #include "../lib/dram_init.S"
  340. _dram_init_finished:
  341. ;; Copy text+data to DRAM
  342. ;; This is fragile - the calculation of r4 as the image size depends
  343. ;; on that the labels below actually are the first and last positions
  344. ;; in the linker-script.
  345. ;;
  346. ;; Then the locating of the cramfs image depends on the aforementioned
  347. ;; image being located in the flash at 0. This is most often not true,
  348. ;; thus the following does not work (normally there is a rescue-block
  349. ;; between the physical start of the flash and the flash-image start,
  350. ;; and when run with compression, the kernel is actually unpacked to
  351. ;; DRAM and we never get here in the first place :))
  352. moveq 0, $r0 ; source
  353. move.d text_start, $r1 ; destination
  354. move.d __vmlinux_end, $r2 ; end destination
  355. move.d $r2, $r4
  356. sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
  357. 1: move.w [$r0+], $r3
  358. move.w $r3, [$r1+]
  359. cmp.d $r2, $r1
  360. blo 1b
  361. nop
  362. ;; We keep the cramfs in the flash.
  363. ;; There might be none, but that does not matter because
  364. ;; we don't do anything than read some bytes here.
  365. moveq 0, $r0
  366. move.d $r0, [romfs_length] ; default if there is no cramfs
  367. move.d [$r4], $r0 ; cramfs_super.magic
  368. cmp.d CRAMFS_MAGIC, $r0
  369. bne 1f
  370. nop
  371. move.d [$r4 + 4], $r0 ; cramfs_super.size
  372. move.d $r0, [romfs_length]
  373. #ifdef CONFIG_CRIS_LOW_MAP
  374. add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
  375. #else
  376. add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
  377. #endif
  378. move.d $r4, [romfs_start]
  379. 1:
  380. moveq 1, $r0
  381. move.d $r0, [romfs_in_flash]
  382. jump _start_it ; enter code, cached this time
  383. _inram:
  384. ;; Move the ROM fs to after BSS end. This assumes that the cramfs
  385. ;; second longword contains the length of the cramfs
  386. moveq 0, $r0
  387. move.d $r0, [romfs_length] ; default if there is no cramfs
  388. ;; The kernel could have been unpacked to DRAM by the loader, but
  389. ;; the cramfs image could still be in the Flash directly after the
  390. ;; compressed kernel image. The loader passes the address of the
  391. ;; byte succeeding the last compressed byte in the flash in the
  392. ;; register r9 when starting the kernel. Check if r9 points to a
  393. ;; decent cramfs image!
  394. ;; (Notice that if this is not booted from the loader, r9 will be
  395. ;; garbage but we do sanity checks on it, the chance that it points
  396. ;; to a cramfs magic is small.. )
  397. cmp.d 0x0ffffff8, $r9
  398. bhs _no_romfs_in_flash ; r9 points outside the flash area
  399. nop
  400. move.d [$r9], $r0 ; cramfs_super.magic
  401. cmp.d CRAMFS_MAGIC, $r0
  402. bne _no_romfs_in_flash
  403. nop
  404. move.d [$r9+4], $r0 ; cramfs_super.length
  405. move.d $r0, [romfs_length]
  406. #ifdef CONFIG_CRIS_LOW_MAP
  407. add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
  408. #else
  409. add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
  410. #endif
  411. move.d $r9, [romfs_start]
  412. moveq 1, $r0
  413. move.d $r0, [romfs_in_flash]
  414. jump _start_it ; enter code, cached this time
  415. _no_romfs_in_flash:
  416. ;; Check if there is a cramfs (magic value).
  417. ;; Notice that we check for cramfs magic value - which is
  418. ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
  419. ;; not need this mechanism anyway)
  420. move.d __vmlinux_end, $r0; the image will be after the vmlinux end address
  421. move.d [$r0], $r1 ; cramfs assumes same endian on host/target
  422. cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
  423. bne 2f
  424. nop
  425. ;; Ok. What is its size ?
  426. move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
  427. ;; We want to copy it to the end of the BSS
  428. move.d _end, $r1
  429. ;; Remember values so cramfs and setup can find this info
  430. move.d $r1, [romfs_start] ; new romfs location
  431. move.d $r2, [romfs_length]
  432. ;; We need to copy it backwards, since they can be overlapping
  433. add.d $r2, $r0
  434. add.d $r2, $r1
  435. ;; Go ahead. Make my loop.
  436. lsrq 1, $r2 ; size is in bytes, we copy words
  437. 1: move.w [$r0=$r0-2],$r3
  438. move.w $r3,[$r1=$r1-2]
  439. subq 1, $r2
  440. bne 1b
  441. nop
  442. 2:
  443. ;; Dont worry that the BSS is tainted. It will be cleared later.
  444. moveq 0, $r0
  445. move.d $r0, [romfs_in_flash]
  446. jump _start_it ; better skip the additional cramfs check below
  447. _start_it:
  448. ;; Check if kernel command line is supplied
  449. cmp.d COMMAND_LINE_MAGIC, $r10
  450. bne no_command_line
  451. nop
  452. move.d 256, $r13
  453. move.d cris_command_line, $r10
  454. or.d 0x80000000, $r11 ; Make it virtual
  455. 1:
  456. move.b [$r11+], $r12
  457. move.b $r12, [$r10+]
  458. subq 1, $r13
  459. bne 1b
  460. nop
  461. no_command_line:
  462. ;; the kernel stack is overlayed with the task structure for each
  463. ;; task. thus the initial kernel stack is in the same page as the
  464. ;; init_task (but starts in the top of the page, size 8192)
  465. move.d init_thread_union + 8192, $sp
  466. move.d ibr_start,$r0 ; this symbol is set by the linker script
  467. move $r0,$ibr
  468. move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
  469. ;; Clear BSS region, from _bss_start to _end
  470. move.d __bss_start, $r0
  471. move.d _end, $r1
  472. 1: clear.d [$r0+]
  473. cmp.d $r1, $r0
  474. blo 1b
  475. nop
  476. #ifdef CONFIG_BLK_DEV_ETRAXIDE
  477. ;; disable ATA before enabling it in genconfig below
  478. moveq 0,$r0
  479. move.d $r0,[R_ATA_CTRL_DATA]
  480. move.d $r0,[R_ATA_TRANSFER_CNT]
  481. move.d $r0,[R_ATA_CONFIG]
  482. #if 0
  483. move.d R_PORT_G_DATA, $r1
  484. move.d $r0, [$r1]; assert ATA bus-reset
  485. nop
  486. nop
  487. nop
  488. nop
  489. nop
  490. nop
  491. move.d 0x08000000,$r0
  492. move.d $r0,[$r1]
  493. #endif
  494. #endif
  495. #ifdef CONFIG_JULIETTE
  496. ;; configure external DMA channel 0 before enabling it in genconfig
  497. moveq 0,$r0
  498. move.d $r0,[R_EXT_DMA_0_ADDR]
  499. ; cnt enable, word size, output, stop, size 0
  500. move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
  501. | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
  502. | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
  503. | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
  504. | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
  505. | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
  506. | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
  507. | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0
  508. move.d $r0,[R_EXT_DMA_0_CMD]
  509. ;; reset dma4 and wait for completion
  510. moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
  511. move.b $r0,[R_DMA_CH4_CMD]
  512. 1: move.b [R_DMA_CH4_CMD],$r0
  513. and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0
  514. cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
  515. beq 1b
  516. nop
  517. ;; reset dma5 and wait for completion
  518. moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
  519. move.b $r0,[R_DMA_CH5_CMD]
  520. 1: move.b [R_DMA_CH5_CMD],$r0
  521. and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0
  522. cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
  523. beq 1b
  524. nop
  525. #endif
  526. ;; Etrax product HW genconfig setup
  527. moveq 0,$r0
  528. ;; Init interfaces (disable them).
  529. or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
  530. | IO_STATE (R_GEN_CONFIG, ata, disable) \
  531. | IO_STATE (R_GEN_CONFIG, par0, disable) \
  532. | IO_STATE (R_GEN_CONFIG, ser2, disable) \
  533. | IO_STATE (R_GEN_CONFIG, mio, disable) \
  534. | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
  535. | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
  536. | IO_STATE (R_GEN_CONFIG, par1, disable) \
  537. | IO_STATE (R_GEN_CONFIG, ser3, disable) \
  538. | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
  539. | IO_STATE (R_GEN_CONFIG, usb1, disable) \
  540. | IO_STATE (R_GEN_CONFIG, usb2, disable) \
  541. | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
  542. ;; Init DMA channel muxing (set to unused clients).
  543. or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
  544. | IO_STATE (R_GEN_CONFIG, dma3, ata) \
  545. | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
  546. | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
  547. | IO_STATE (R_GEN_CONFIG, dma6, unused) \
  548. | IO_STATE (R_GEN_CONFIG, dma7, unused) \
  549. | IO_STATE (R_GEN_CONFIG, dma8, usb) \
  550. | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
  551. #if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT)
  552. or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
  553. #endif
  554. #if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT)
  555. or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
  556. #endif
  557. #if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT)
  558. or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
  559. #endif
  560. #if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT)
  561. or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
  562. #endif
  563. move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
  564. #ifndef CONFIG_SVINTO_SIM
  565. move.d $r0,[R_GEN_CONFIG]
  566. #if 0
  567. moveq 4,$r0
  568. move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
  569. move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
  570. 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
  571. and.b 7,$r0
  572. cmp.b 4,$r0
  573. beq 1b
  574. nop
  575. 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
  576. and.b 7,$r0
  577. cmp.b 4,$r0
  578. beq 1b
  579. nop
  580. #endif
  581. moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
  582. move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
  583. move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
  584. 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
  585. andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
  586. cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
  587. beq 1b
  588. nop
  589. 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
  590. andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
  591. cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
  592. beq 1b
  593. nop
  594. ;; setup port PA and PB default initial directions and data
  595. ;; including their shadow registers
  596. move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
  597. #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
  598. or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
  599. #endif
  600. move.b $r0,[port_pa_dir_shadow]
  601. move.b $r0,[R_PORT_PA_DIR]
  602. move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
  603. #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
  604. #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
  605. and.b ~(1 << 7),$r0
  606. #else
  607. or.b (1 << 7),$r0
  608. #endif
  609. #endif
  610. move.b $r0,[port_pa_data_shadow]
  611. move.b $r0,[R_PORT_PA_DATA]
  612. move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
  613. move.b $r0,[port_pb_config_shadow]
  614. move.b $r0,[R_PORT_PB_CONFIG]
  615. move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
  616. #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
  617. or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
  618. #endif
  619. move.b $r0,[port_pb_dir_shadow]
  620. move.b $r0,[R_PORT_PB_DIR]
  621. move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
  622. #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
  623. #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
  624. and.b ~(1 << 5),$r0
  625. #else
  626. or.b (1 << 5),$r0
  627. #endif
  628. #endif
  629. move.b $r0,[port_pb_data_shadow]
  630. move.b $r0,[R_PORT_PB_DATA]
  631. moveq 0, $r0
  632. move.d $r0,[port_pb_i2c_shadow]
  633. move.d $r0, [R_PORT_PB_I2C]
  634. moveq 0,$r0
  635. #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10)
  636. #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
  637. and.d ~(1 << 10),$r0
  638. #else
  639. or.d (1 << 10),$r0
  640. #endif
  641. #endif
  642. #if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11)
  643. #if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
  644. and.d ~(1 << 11),$r0
  645. #else
  646. or.d (1 << 11),$r0
  647. #endif
  648. #endif
  649. move.d $r0,[port_g_data_shadow]
  650. move.d $r0,[R_PORT_G_DATA]
  651. ;; setup the serial port 0 at 115200 baud for debug purposes
  652. moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
  653. | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
  654. | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
  655. move.d $r0,[R_SERIAL0_XOFF]
  656. ; 115.2kbaud for both transmit and receive
  657. move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
  658. | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
  659. move.b $r0,[R_SERIAL0_BAUD]
  660. ; Set up and enable the serial0 receiver.
  661. move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
  662. | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
  663. | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
  664. | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
  665. | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
  666. | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
  667. | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
  668. | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
  669. move.b $r0,[R_SERIAL0_REC_CTRL]
  670. ; Set up and enable the serial0 transmitter.
  671. move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
  672. | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
  673. | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
  674. | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
  675. | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
  676. | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
  677. | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
  678. | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
  679. move.b $r0,[R_SERIAL0_TR_CTRL]
  680. ;; setup the serial port 1 at 115200 baud for debug purposes
  681. moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
  682. | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
  683. | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
  684. move.d $r0,[R_SERIAL1_XOFF]
  685. ; 115.2kbaud for both transmit and receive
  686. move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
  687. | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
  688. move.b $r0,[R_SERIAL1_BAUD]
  689. ; Set up and enable the serial1 receiver.
  690. move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
  691. | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
  692. | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
  693. | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
  694. | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
  695. | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
  696. | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
  697. | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
  698. move.b $r0,[R_SERIAL1_REC_CTRL]
  699. ; Set up and enable the serial1 transmitter.
  700. move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
  701. | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
  702. | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
  703. | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
  704. | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
  705. | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
  706. | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
  707. | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
  708. move.b $r0,[R_SERIAL1_TR_CTRL]
  709. #ifdef CONFIG_ETRAX_SERIAL_PORT3
  710. ;; setup the serial port 3 at 115200 baud for debug purposes
  711. moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
  712. | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
  713. | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
  714. move.d $r0,[R_SERIAL3_XOFF]
  715. ; 115.2kbaud for both transmit and receive
  716. move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
  717. | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
  718. move.b $r0,[R_SERIAL3_BAUD]
  719. ; Set up and enable the serial3 receiver.
  720. move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
  721. | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
  722. | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
  723. | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
  724. | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
  725. | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
  726. | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
  727. | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
  728. move.b $r0,[R_SERIAL3_REC_CTRL]
  729. ; Set up and enable the serial3 transmitter.
  730. move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
  731. | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
  732. | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
  733. | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
  734. | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
  735. | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
  736. | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
  737. | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
  738. move.b $r0,[R_SERIAL3_TR_CTRL]
  739. #endif
  740. #endif /* CONFIG_SVINTO_SIM */
  741. jump start_kernel ; jump into the C-function start_kernel in init/main.c
  742. .data
  743. etrax_irv:
  744. .dword 0
  745. romfs_start:
  746. .dword 0
  747. romfs_length:
  748. .dword 0
  749. romfs_in_flash:
  750. .dword 0
  751. ;; put some special pages at the beginning of the kernel aligned
  752. ;; to page boundaries - the kernel cannot start until after this
  753. #ifdef CONFIG_CRIS_LOW_MAP
  754. swapper_pg_dir = 0x60002000
  755. #else
  756. swapper_pg_dir = 0xc0002000
  757. #endif
  758. .section ".init.data", "aw"
  759. #include "../lib/hw_settings.S"