flush.c 4.6 KB

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  1. /*
  2. * linux/arch/arm/mm/flush.c
  3. *
  4. * Copyright (C) 1995-2002 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/mm.h>
  12. #include <linux/pagemap.h>
  13. #include <asm/cacheflush.h>
  14. #include <asm/system.h>
  15. #include <asm/tlbflush.h>
  16. #ifdef CONFIG_CPU_CACHE_VIPT
  17. void flush_cache_mm(struct mm_struct *mm)
  18. {
  19. if (cache_is_vivt()) {
  20. if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
  21. __cpuc_flush_user_all();
  22. return;
  23. }
  24. if (cache_is_vipt_aliasing()) {
  25. asm( "mcr p15, 0, %0, c7, c14, 0\n"
  26. " mcr p15, 0, %0, c7, c5, 0\n"
  27. " mcr p15, 0, %0, c7, c10, 4"
  28. :
  29. : "r" (0)
  30. : "cc");
  31. }
  32. }
  33. void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  34. {
  35. if (cache_is_vivt()) {
  36. if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask))
  37. __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
  38. vma->vm_flags);
  39. return;
  40. }
  41. if (cache_is_vipt_aliasing()) {
  42. asm( "mcr p15, 0, %0, c7, c14, 0\n"
  43. " mcr p15, 0, %0, c7, c5, 0\n"
  44. " mcr p15, 0, %0, c7, c10, 4"
  45. :
  46. : "r" (0)
  47. : "cc");
  48. }
  49. }
  50. void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
  51. {
  52. if (cache_is_vivt()) {
  53. if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
  54. unsigned long addr = user_addr & PAGE_MASK;
  55. __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
  56. }
  57. return;
  58. }
  59. if (cache_is_vipt_aliasing())
  60. flush_pfn_alias(pfn, user_addr);
  61. }
  62. #define ALIAS_FLUSH_START 0xffff4000
  63. #define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
  64. static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
  65. {
  66. unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
  67. set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
  68. flush_tlb_kernel_page(to);
  69. asm( "mcrr p15, 0, %1, %0, c14\n"
  70. " mcrr p15, 0, %1, %0, c5\n"
  71. :
  72. : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES)
  73. : "cc");
  74. }
  75. #else
  76. #define flush_pfn_alias(pfn,vaddr) do { } while (0)
  77. #endif
  78. void __flush_dcache_page(struct address_space *mapping, struct page *page)
  79. {
  80. /*
  81. * Writeback any data associated with the kernel mapping of this
  82. * page. This ensures that data in the physical page is mutually
  83. * coherent with the kernels mapping.
  84. */
  85. __cpuc_flush_dcache_page(page_address(page));
  86. /*
  87. * If this is a page cache page, and we have an aliasing VIPT cache,
  88. * we only need to do one flush - which would be at the relevant
  89. * userspace colour, which is congruent with page->index.
  90. */
  91. if (mapping && cache_is_vipt_aliasing())
  92. flush_pfn_alias(page_to_pfn(page),
  93. page->index << PAGE_CACHE_SHIFT);
  94. }
  95. static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
  96. {
  97. struct mm_struct *mm = current->active_mm;
  98. struct vm_area_struct *mpnt;
  99. struct prio_tree_iter iter;
  100. pgoff_t pgoff;
  101. /*
  102. * There are possible user space mappings of this page:
  103. * - VIVT cache: we need to also write back and invalidate all user
  104. * data in the current VM view associated with this page.
  105. * - aliasing VIPT: we only need to find one mapping of this page.
  106. */
  107. pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
  108. flush_dcache_mmap_lock(mapping);
  109. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  110. unsigned long offset;
  111. /*
  112. * If this VMA is not in our MM, we can ignore it.
  113. */
  114. if (mpnt->vm_mm != mm)
  115. continue;
  116. if (!(mpnt->vm_flags & VM_MAYSHARE))
  117. continue;
  118. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  119. flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
  120. }
  121. flush_dcache_mmap_unlock(mapping);
  122. }
  123. /*
  124. * Ensure cache coherency between kernel mapping and userspace mapping
  125. * of this page.
  126. *
  127. * We have three cases to consider:
  128. * - VIPT non-aliasing cache: fully coherent so nothing required.
  129. * - VIVT: fully aliasing, so we need to handle every alias in our
  130. * current VM view.
  131. * - VIPT aliasing: need to handle one alias in our current VM view.
  132. *
  133. * If we need to handle aliasing:
  134. * If the page only exists in the page cache and there are no user
  135. * space mappings, we can be lazy and remember that we may have dirty
  136. * kernel cache lines for later. Otherwise, we assume we have
  137. * aliasing mappings.
  138. */
  139. void flush_dcache_page(struct page *page)
  140. {
  141. struct address_space *mapping = page_mapping(page);
  142. if (mapping && !mapping_mapped(mapping))
  143. set_bit(PG_dcache_dirty, &page->flags);
  144. else {
  145. __flush_dcache_page(mapping, page);
  146. if (mapping && cache_is_vivt())
  147. __flush_dcache_aliases(mapping, page);
  148. }
  149. }
  150. EXPORT_SYMBOL(flush_dcache_page);