fault-armv.c 5.0 KB

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  1. /*
  2. * linux/arch/arm/mm/fault-armv.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Modifications for ARM processor (c) 1995-2002 Russell King
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/sched.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mm.h>
  15. #include <linux/bitops.h>
  16. #include <linux/vmalloc.h>
  17. #include <linux/init.h>
  18. #include <linux/pagemap.h>
  19. #include <asm/cacheflush.h>
  20. #include <asm/pgtable.h>
  21. #include <asm/tlbflush.h>
  22. static unsigned long shared_pte_mask = L_PTE_CACHEABLE;
  23. /*
  24. * We take the easy way out of this problem - we make the
  25. * PTE uncacheable. However, we leave the write buffer on.
  26. */
  27. static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
  28. {
  29. pgd_t *pgd;
  30. pmd_t *pmd;
  31. pte_t *pte, entry;
  32. int ret = 0;
  33. pgd = pgd_offset(vma->vm_mm, address);
  34. if (pgd_none(*pgd))
  35. goto no_pgd;
  36. if (pgd_bad(*pgd))
  37. goto bad_pgd;
  38. pmd = pmd_offset(pgd, address);
  39. if (pmd_none(*pmd))
  40. goto no_pmd;
  41. if (pmd_bad(*pmd))
  42. goto bad_pmd;
  43. pte = pte_offset_map(pmd, address);
  44. entry = *pte;
  45. /*
  46. * If this page isn't present, or is already setup to
  47. * fault (ie, is old), we can safely ignore any issues.
  48. */
  49. if (pte_present(entry) && pte_val(entry) & shared_pte_mask) {
  50. flush_cache_page(vma, address, pte_pfn(entry));
  51. pte_val(entry) &= ~shared_pte_mask;
  52. set_pte(pte, entry);
  53. flush_tlb_page(vma, address);
  54. ret = 1;
  55. }
  56. pte_unmap(pte);
  57. return ret;
  58. bad_pgd:
  59. pgd_ERROR(*pgd);
  60. pgd_clear(pgd);
  61. no_pgd:
  62. return 0;
  63. bad_pmd:
  64. pmd_ERROR(*pmd);
  65. pmd_clear(pmd);
  66. no_pmd:
  67. return 0;
  68. }
  69. static void
  70. make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
  71. {
  72. struct mm_struct *mm = vma->vm_mm;
  73. struct vm_area_struct *mpnt;
  74. struct prio_tree_iter iter;
  75. unsigned long offset;
  76. pgoff_t pgoff;
  77. int aliases = 0;
  78. pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
  79. /*
  80. * If we have any shared mappings that are in the same mm
  81. * space, then we need to handle them specially to maintain
  82. * cache coherency.
  83. */
  84. flush_dcache_mmap_lock(mapping);
  85. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  86. /*
  87. * If this VMA is not in our MM, we can ignore it.
  88. * Note that we intentionally mask out the VMA
  89. * that we are fixing up.
  90. */
  91. if (mpnt->vm_mm != mm || mpnt == vma)
  92. continue;
  93. if (!(mpnt->vm_flags & VM_MAYSHARE))
  94. continue;
  95. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  96. aliases += adjust_pte(mpnt, mpnt->vm_start + offset);
  97. }
  98. flush_dcache_mmap_unlock(mapping);
  99. if (aliases)
  100. adjust_pte(vma, addr);
  101. else
  102. flush_cache_page(vma, addr, pfn);
  103. }
  104. void __flush_dcache_page(struct address_space *mapping, struct page *page);
  105. /*
  106. * Take care of architecture specific things when placing a new PTE into
  107. * a page table, or changing an existing PTE. Basically, there are two
  108. * things that we need to take care of:
  109. *
  110. * 1. If PG_dcache_dirty is set for the page, we need to ensure
  111. * that any cache entries for the kernels virtual memory
  112. * range are written back to the page.
  113. * 2. If we have multiple shared mappings of the same space in
  114. * an object, we need to deal with the cache aliasing issues.
  115. *
  116. * Note that the page_table_lock will be held.
  117. */
  118. void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
  119. {
  120. unsigned long pfn = pte_pfn(pte);
  121. struct address_space *mapping;
  122. struct page *page;
  123. if (!pfn_valid(pfn))
  124. return;
  125. page = pfn_to_page(pfn);
  126. mapping = page_mapping(page);
  127. if (mapping) {
  128. int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
  129. if (dirty)
  130. __flush_dcache_page(mapping, page);
  131. if (cache_is_vivt())
  132. make_coherent(mapping, vma, addr, pfn);
  133. }
  134. }
  135. /*
  136. * Check whether the write buffer has physical address aliasing
  137. * issues. If it has, we need to avoid them for the case where
  138. * we have several shared mappings of the same object in user
  139. * space.
  140. */
  141. static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
  142. {
  143. register unsigned long zero = 0, one = 1, val;
  144. local_irq_disable();
  145. mb();
  146. *p1 = one;
  147. mb();
  148. *p2 = zero;
  149. mb();
  150. val = *p1;
  151. mb();
  152. local_irq_enable();
  153. return val != zero;
  154. }
  155. void __init check_writebuffer_bugs(void)
  156. {
  157. struct page *page;
  158. const char *reason;
  159. unsigned long v = 1;
  160. printk(KERN_INFO "CPU: Testing write buffer coherency: ");
  161. page = alloc_page(GFP_KERNEL);
  162. if (page) {
  163. unsigned long *p1, *p2;
  164. pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG|
  165. L_PTE_DIRTY|L_PTE_WRITE|
  166. L_PTE_BUFFERABLE);
  167. p1 = vmap(&page, 1, VM_IOREMAP, prot);
  168. p2 = vmap(&page, 1, VM_IOREMAP, prot);
  169. if (p1 && p2) {
  170. v = check_writebuffer(p1, p2);
  171. reason = "enabling work-around";
  172. } else {
  173. reason = "unable to map memory\n";
  174. }
  175. vunmap(p1);
  176. vunmap(p2);
  177. put_page(page);
  178. } else {
  179. reason = "unable to grab page\n";
  180. }
  181. if (v) {
  182. printk("failed, %s\n", reason);
  183. shared_pte_mask |= L_PTE_BUFFERABLE;
  184. } else {
  185. printk("ok\n");
  186. }
  187. }