s3c2440-clock.c 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118
  1. /* linux/arch/arm/mach-s3c2410/s3c2440-clock.c
  2. *
  3. * Copyright (c) 2004-2005 Simtec Electronics
  4. * http://armlinux.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * S3C2440 Clock support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/list.h>
  27. #include <linux/errno.h>
  28. #include <linux/err.h>
  29. #include <linux/device.h>
  30. #include <linux/sysdev.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/ioport.h>
  33. #include <asm/hardware.h>
  34. #include <asm/atomic.h>
  35. #include <asm/irq.h>
  36. #include <asm/io.h>
  37. #include <asm/hardware/clock.h>
  38. #include <asm/arch/regs-clock.h>
  39. #include "clock.h"
  40. #include "cpu.h"
  41. /* S3C2440 extended clock support */
  42. static struct clk s3c2440_clk_upll = {
  43. .name = "upll",
  44. .id = -1,
  45. };
  46. static struct clk s3c2440_clk_cam = {
  47. .name = "camif",
  48. .id = -1,
  49. .enable = s3c24xx_clkcon_enable,
  50. .ctrlbit = S3C2440_CLKCON_CAMERA,
  51. };
  52. static struct clk s3c2440_clk_ac97 = {
  53. .name = "ac97",
  54. .id = -1,
  55. .enable = s3c24xx_clkcon_enable,
  56. .ctrlbit = S3C2440_CLKCON_CAMERA,
  57. };
  58. static int s3c2440_clk_add(struct sys_device *sysdev)
  59. {
  60. unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
  61. unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
  62. struct clk *clk_h;
  63. struct clk *clk_p;
  64. struct clk *clk_xtal;
  65. clk_xtal = clk_get(NULL, "xtal");
  66. if (IS_ERR(clk_xtal)) {
  67. printk(KERN_ERR "S3C2440: Failed to get clk_xtal\n");
  68. return -EINVAL;
  69. }
  70. s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
  71. printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz, DVS %s\n",
  72. print_mhz(s3c2440_clk_upll.rate),
  73. (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
  74. clk_p = clk_get(NULL, "pclk");
  75. clk_h = clk_get(NULL, "hclk");
  76. if (IS_ERR(clk_p) || IS_ERR(clk_h)) {
  77. printk(KERN_ERR "S3C2440: Failed to get parent clocks\n");
  78. return -EINVAL;
  79. }
  80. s3c2440_clk_cam.parent = clk_h;
  81. s3c2440_clk_ac97.parent = clk_p;
  82. s3c24xx_register_clock(&s3c2440_clk_ac97);
  83. s3c24xx_register_clock(&s3c2440_clk_cam);
  84. s3c24xx_register_clock(&s3c2440_clk_upll);
  85. clk_disable(&s3c2440_clk_ac97);
  86. clk_disable(&s3c2440_clk_cam);
  87. return 0;
  88. }
  89. static struct sysdev_driver s3c2440_clk_driver = {
  90. .add = s3c2440_clk_add,
  91. };
  92. static __init int s3c24xx_clk_driver(void)
  93. {
  94. return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
  95. }
  96. arch_initcall(s3c24xx_clk_driver);