corgi_ssp.c 6.1 KB

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  1. /*
  2. * SSP control code for Sharp Corgi devices
  3. *
  4. * Copyright (c) 2004 Richard Purdie
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/slab.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <asm/hardware.h>
  19. #include <asm/arch/ssp.h>
  20. #include <asm/arch/corgi.h>
  21. #include <asm/arch/pxa-regs.h>
  22. static spinlock_t corgi_ssp_lock = SPIN_LOCK_UNLOCKED;
  23. static struct ssp_dev corgi_ssp_dev;
  24. static struct ssp_state corgi_ssp_state;
  25. /*
  26. * There are three devices connected to the SSP interface:
  27. * 1. A touchscreen controller (TI ADS7846 compatible)
  28. * 2. An LCD contoller (with some Backlight functionality)
  29. * 3. A battery moinitoring IC (Maxim MAX1111)
  30. *
  31. * Each device uses a different speed/mode of communication.
  32. *
  33. * The touchscreen is very sensitive and the most frequently used
  34. * so the port is left configured for this.
  35. *
  36. * Devices are selected using Chip Selects on GPIOs.
  37. */
  38. /*
  39. * ADS7846 Routines
  40. */
  41. unsigned long corgi_ssp_ads7846_putget(ulong data)
  42. {
  43. unsigned long ret,flag;
  44. spin_lock_irqsave(&corgi_ssp_lock, flag);
  45. GPCR0 = GPIO_bit(CORGI_GPIO_ADS7846_CS);
  46. ssp_write_word(&corgi_ssp_dev,data);
  47. ret = ssp_read_word(&corgi_ssp_dev);
  48. GPSR0 = GPIO_bit(CORGI_GPIO_ADS7846_CS);
  49. spin_unlock_irqrestore(&corgi_ssp_lock, flag);
  50. return ret;
  51. }
  52. /*
  53. * NOTE: These functions should always be called in interrupt context
  54. * and use the _lock and _unlock functions. They are very time sensitive.
  55. */
  56. void corgi_ssp_ads7846_lock(void)
  57. {
  58. spin_lock(&corgi_ssp_lock);
  59. GPCR0 = GPIO_bit(CORGI_GPIO_ADS7846_CS);
  60. }
  61. void corgi_ssp_ads7846_unlock(void)
  62. {
  63. GPSR0 = GPIO_bit(CORGI_GPIO_ADS7846_CS);
  64. spin_unlock(&corgi_ssp_lock);
  65. }
  66. void corgi_ssp_ads7846_put(ulong data)
  67. {
  68. ssp_write_word(&corgi_ssp_dev,data);
  69. }
  70. unsigned long corgi_ssp_ads7846_get(void)
  71. {
  72. return ssp_read_word(&corgi_ssp_dev);
  73. }
  74. EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
  75. EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
  76. EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
  77. EXPORT_SYMBOL(corgi_ssp_ads7846_put);
  78. EXPORT_SYMBOL(corgi_ssp_ads7846_get);
  79. /*
  80. * LCD/Backlight Routines
  81. */
  82. unsigned long corgi_ssp_dac_put(ulong data)
  83. {
  84. unsigned long flag;
  85. spin_lock_irqsave(&corgi_ssp_lock, flag);
  86. GPCR0 = GPIO_bit(CORGI_GPIO_LCDCON_CS);
  87. ssp_disable(&corgi_ssp_dev);
  88. ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), SSCR1_SPH, 0, SSCR0_SerClkDiv(76));
  89. ssp_enable(&corgi_ssp_dev);
  90. ssp_write_word(&corgi_ssp_dev,data);
  91. /* Read null data back from device to prevent SSP overflow */
  92. ssp_read_word(&corgi_ssp_dev);
  93. ssp_disable(&corgi_ssp_dev);
  94. ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(2));
  95. ssp_enable(&corgi_ssp_dev);
  96. GPSR0 = GPIO_bit(CORGI_GPIO_LCDCON_CS);
  97. spin_unlock_irqrestore(&corgi_ssp_lock, flag);
  98. return 0;
  99. }
  100. void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
  101. {
  102. corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
  103. }
  104. void corgi_ssp_blduty_set(int duty)
  105. {
  106. corgi_ssp_lcdtg_send(0x02,duty);
  107. }
  108. EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
  109. EXPORT_SYMBOL(corgi_ssp_blduty_set);
  110. /*
  111. * Max1111 Routines
  112. */
  113. int corgi_ssp_max1111_get(ulong data)
  114. {
  115. unsigned long flag;
  116. int voltage,voltage1,voltage2;
  117. spin_lock_irqsave(&corgi_ssp_lock, flag);
  118. GPCR0 = GPIO_bit(CORGI_GPIO_MAX1111_CS);
  119. ssp_disable(&corgi_ssp_dev);
  120. ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(8));
  121. ssp_enable(&corgi_ssp_dev);
  122. udelay(1);
  123. /* TB1/RB1 */
  124. ssp_write_word(&corgi_ssp_dev,data);
  125. ssp_read_word(&corgi_ssp_dev); /* null read */
  126. /* TB12/RB2 */
  127. ssp_write_word(&corgi_ssp_dev,0);
  128. voltage1=ssp_read_word(&corgi_ssp_dev);
  129. /* TB13/RB3*/
  130. ssp_write_word(&corgi_ssp_dev,0);
  131. voltage2=ssp_read_word(&corgi_ssp_dev);
  132. ssp_disable(&corgi_ssp_dev);
  133. ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(2));
  134. ssp_enable(&corgi_ssp_dev);
  135. GPSR0 = GPIO_bit(CORGI_GPIO_MAX1111_CS);
  136. spin_unlock_irqrestore(&corgi_ssp_lock, flag);
  137. if (voltage1 & 0xc0 || voltage2 & 0x3f)
  138. voltage = -1;
  139. else
  140. voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);
  141. return voltage;
  142. }
  143. EXPORT_SYMBOL(corgi_ssp_max1111_get);
  144. /*
  145. * Support Routines
  146. */
  147. int __init corgi_ssp_probe(struct device *dev)
  148. {
  149. int ret;
  150. /* Chip Select - Disable All */
  151. GPDR0 |= GPIO_bit(CORGI_GPIO_LCDCON_CS); /* output */
  152. GPSR0 = GPIO_bit(CORGI_GPIO_LCDCON_CS); /* High - Disable LCD Control/Timing Gen */
  153. GPDR0 |= GPIO_bit(CORGI_GPIO_MAX1111_CS); /* output */
  154. GPSR0 = GPIO_bit(CORGI_GPIO_MAX1111_CS); /* High - Disable MAX1111*/
  155. GPDR0 |= GPIO_bit(CORGI_GPIO_ADS7846_CS); /* output */
  156. GPSR0 = GPIO_bit(CORGI_GPIO_ADS7846_CS); /* High - Disable ADS7846*/
  157. ret=ssp_init(&corgi_ssp_dev,1);
  158. if (ret)
  159. printk(KERN_ERR "Unable to register SSP handler!\n");
  160. else {
  161. ssp_disable(&corgi_ssp_dev);
  162. ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(2));
  163. ssp_enable(&corgi_ssp_dev);
  164. }
  165. return ret;
  166. }
  167. static int corgi_ssp_remove(struct device *dev)
  168. {
  169. ssp_exit(&corgi_ssp_dev);
  170. return 0;
  171. }
  172. static int corgi_ssp_suspend(struct device *dev, pm_message_t state, u32 level)
  173. {
  174. if (level == SUSPEND_POWER_DOWN) {
  175. ssp_flush(&corgi_ssp_dev);
  176. ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
  177. }
  178. return 0;
  179. }
  180. static int corgi_ssp_resume(struct device *dev, u32 level)
  181. {
  182. if (level == RESUME_POWER_ON) {
  183. GPSR0 = GPIO_bit(CORGI_GPIO_LCDCON_CS); /* High - Disable LCD Control/Timing Gen */
  184. GPSR0 = GPIO_bit(CORGI_GPIO_MAX1111_CS); /* High - Disable MAX1111*/
  185. GPSR0 = GPIO_bit(CORGI_GPIO_ADS7846_CS); /* High - Disable ADS7846*/
  186. ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
  187. ssp_enable(&corgi_ssp_dev);
  188. }
  189. return 0;
  190. }
  191. static struct device_driver corgissp_driver = {
  192. .name = "corgi-ssp",
  193. .bus = &platform_bus_type,
  194. .probe = corgi_ssp_probe,
  195. .remove = corgi_ssp_remove,
  196. .suspend = corgi_ssp_suspend,
  197. .resume = corgi_ssp_resume,
  198. };
  199. int __init corgi_ssp_init(void)
  200. {
  201. return driver_register(&corgissp_driver);
  202. }
  203. arch_initcall(corgi_ssp_init);