arch-lpd7a40x.c 7.3 KB

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  1. /* arch/arm/mach-lh7a40x/arch-lpd7a40x.c
  2. *
  3. * Copyright (C) 2004 Logic Product Development
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * version 2 as published by the Free Software Foundation.
  8. *
  9. */
  10. #include <linux/tty.h>
  11. #include <linux/init.h>
  12. #include <linux/device.h>
  13. #include <linux/interrupt.h>
  14. #include <asm/hardware.h>
  15. #include <asm/setup.h>
  16. #include <asm/mach-types.h>
  17. #include <asm/mach/arch.h>
  18. #include <asm/irq.h>
  19. #include <asm/mach/irq.h>
  20. #include <asm/mach/map.h>
  21. #include "common.h"
  22. static struct resource smc91x_resources[] = {
  23. [0] = {
  24. .start = CPLD00_PHYS,
  25. .end = CPLD00_PHYS + CPLD00_SIZE - 1, /* Only needs 16B */
  26. .flags = IORESOURCE_MEM,
  27. },
  28. [1] = {
  29. .start = IRQ_LPD7A40X_ETH_INT,
  30. .end = IRQ_LPD7A40X_ETH_INT,
  31. .flags = IORESOURCE_IRQ,
  32. },
  33. };
  34. static struct platform_device smc91x_device = {
  35. .name = "smc91x",
  36. .id = 0,
  37. .num_resources = ARRAY_SIZE(smc91x_resources),
  38. .resource = smc91x_resources,
  39. };
  40. static struct resource lh7a40x_usbclient_resources[] = {
  41. [0] = {
  42. .start = USB_PHYS,
  43. .end = (USB_PHYS + 0xFF),
  44. .flags = IORESOURCE_MEM,
  45. },
  46. [1] = {
  47. .start = IRQ_USBINTR,
  48. .end = IRQ_USBINTR,
  49. .flags = IORESOURCE_IRQ,
  50. },
  51. };
  52. static u64 lh7a40x_usbclient_dma_mask = 0xffffffffUL;
  53. static struct platform_device lh7a40x_usbclient_device = {
  54. .name = "lh7a40x_udc",
  55. .id = 0,
  56. .dev = {
  57. .dma_mask = &lh7a40x_usbclient_dma_mask,
  58. .coherent_dma_mask = 0xffffffffUL,
  59. },
  60. .num_resources = ARRAY_SIZE (lh7a40x_usbclient_resources),
  61. .resource = lh7a40x_usbclient_resources,
  62. };
  63. #if defined (CONFIG_ARCH_LH7A404)
  64. static struct resource lh7a404_usbhost_resources [] = {
  65. [0] = {
  66. .start = USBH_PHYS,
  67. .end = (USBH_PHYS + 0xFF),
  68. .flags = IORESOURCE_MEM,
  69. },
  70. [1] = {
  71. .start = IRQ_USHINTR,
  72. .end = IRQ_USHINTR,
  73. .flags = IORESOURCE_IRQ,
  74. },
  75. };
  76. static u64 lh7a404_usbhost_dma_mask = 0xffffffffUL;
  77. static struct platform_device lh7a404_usbhost_device = {
  78. .name = "lh7a404-ohci",
  79. .id = 0,
  80. .dev = {
  81. .dma_mask = &lh7a404_usbhost_dma_mask,
  82. .coherent_dma_mask = 0xffffffffUL,
  83. },
  84. .num_resources = ARRAY_SIZE (lh7a404_usbhost_resources),
  85. .resource = lh7a404_usbhost_resources,
  86. };
  87. #endif
  88. static struct platform_device *lpd7a40x_devs[] __initdata = {
  89. &smc91x_device,
  90. &lh7a40x_usbclient_device,
  91. #if defined (CONFIG_ARCH_LH7A404)
  92. &lh7a404_usbhost_device,
  93. #endif
  94. };
  95. extern void lpd7a400_map_io (void);
  96. static void __init lpd7a40x_init (void)
  97. {
  98. CPLD_CONTROL |= (1<<6); /* Mask USB1 connection IRQ */
  99. CPLD_CONTROL &= ~(0
  100. | (1<<1) /* Disable LCD */
  101. | (1<<0) /* Enable WLAN */
  102. );
  103. platform_add_devices (lpd7a40x_devs, ARRAY_SIZE (lpd7a40x_devs));
  104. }
  105. static void lh7a40x_ack_cpld_irq (u32 irq)
  106. {
  107. /* CPLD doesn't have ack capability */
  108. }
  109. static void lh7a40x_mask_cpld_irq (u32 irq)
  110. {
  111. switch (irq) {
  112. case IRQ_LPD7A40X_ETH_INT:
  113. CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4;
  114. break;
  115. case IRQ_LPD7A400_TS:
  116. CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x8;
  117. break;
  118. }
  119. }
  120. static void lh7a40x_unmask_cpld_irq (u32 irq)
  121. {
  122. switch (irq) {
  123. case IRQ_LPD7A40X_ETH_INT:
  124. CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4;
  125. break;
  126. case IRQ_LPD7A400_TS:
  127. CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x8;
  128. break;
  129. }
  130. }
  131. static struct irqchip lpd7a40x_cpld_chip = {
  132. .ack = lh7a40x_ack_cpld_irq,
  133. .mask = lh7a40x_mask_cpld_irq,
  134. .unmask = lh7a40x_unmask_cpld_irq,
  135. };
  136. static void lpd7a40x_cpld_handler (unsigned int irq, struct irqdesc *desc,
  137. struct pt_regs *regs)
  138. {
  139. unsigned int mask = CPLD_INTERRUPTS;
  140. desc->chip->ack (irq);
  141. if ((mask & 0x1) == 0) /* WLAN */
  142. IRQ_DISPATCH (IRQ_LPD7A40X_ETH_INT);
  143. if ((mask & 0x2) == 0) /* Touch */
  144. IRQ_DISPATCH (IRQ_LPD7A400_TS);
  145. desc->chip->unmask (irq); /* Level-triggered need this */
  146. }
  147. void __init lh7a40x_init_board_irq (void)
  148. {
  149. int irq;
  150. /* Rev A (v2.8): PF0, PF1, PF2, and PF3 are available IRQs.
  151. PF7 supports the CPLD.
  152. Rev B (v3.4): PF0, PF1, and PF2 are available IRQs.
  153. PF3 supports the CPLD.
  154. (Some) LPD7A404 prerelease boards report a version
  155. number of 0x16, but we force an override since the
  156. hardware is of the newer variety.
  157. */
  158. unsigned char cpld_version = CPLD_REVISION;
  159. int pinCPLD = (cpld_version == 0x28) ? 7 : 3;
  160. #if defined CONFIG_MACH_LPD7A404
  161. cpld_version = 0x34; /* Coerce LPD7A404 to RevB */
  162. #endif
  163. /* First, configure user controlled GPIOF interrupts */
  164. GPIO_PFDD &= ~0x0f; /* PF0-3 are inputs */
  165. GPIO_INTTYPE1 &= ~0x0f; /* PF0-3 are level triggered */
  166. GPIO_INTTYPE2 &= ~0x0f; /* PF0-3 are active low */
  167. barrier ();
  168. GPIO_GPIOFINTEN |= 0x0f; /* Enable PF0, PF1, PF2, and PF3 IRQs */
  169. /* Then, configure CPLD interrupt */
  170. CPLD_INTERRUPTS = 0x9c; /* Disable all CPLD interrupts */
  171. GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */
  172. GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */
  173. GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */
  174. barrier ();
  175. GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */
  176. /* Cascade CPLD interrupts */
  177. for (irq = IRQ_BOARD_START;
  178. irq < IRQ_BOARD_START + NR_IRQ_BOARD; ++irq) {
  179. set_irq_chip (irq, &lpd7a40x_cpld_chip);
  180. set_irq_handler (irq, do_edge_IRQ);
  181. set_irq_flags (irq, IRQF_VALID);
  182. }
  183. set_irq_chained_handler ((cpld_version == 0x28)
  184. ? IRQ_CPLD_V28
  185. : IRQ_CPLD_V34,
  186. lpd7a40x_cpld_handler);
  187. }
  188. static struct map_desc lpd7a400_io_desc[] __initdata = {
  189. { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
  190. /* Mapping added to work around chip select problems */
  191. { IOBARRIER_VIRT, IOBARRIER_PHYS, IOBARRIER_SIZE, MT_DEVICE },
  192. { CF_VIRT, CF_PHYS, CF_SIZE, MT_DEVICE },
  193. /* This mapping is redundant since the smc driver performs another. */
  194. /* { CPLD00_VIRT, CPLD00_PHYS, CPLD00_SIZE, MT_DEVICE }, */
  195. { CPLD02_VIRT, CPLD02_PHYS, CPLD02_SIZE, MT_DEVICE },
  196. { CPLD06_VIRT, CPLD06_PHYS, CPLD06_SIZE, MT_DEVICE },
  197. { CPLD08_VIRT, CPLD08_PHYS, CPLD08_SIZE, MT_DEVICE },
  198. { CPLD0C_VIRT, CPLD0C_PHYS, CPLD0C_SIZE, MT_DEVICE },
  199. { CPLD0E_VIRT, CPLD0E_PHYS, CPLD0E_SIZE, MT_DEVICE },
  200. { CPLD10_VIRT, CPLD10_PHYS, CPLD10_SIZE, MT_DEVICE },
  201. { CPLD12_VIRT, CPLD12_PHYS, CPLD12_SIZE, MT_DEVICE },
  202. { CPLD14_VIRT, CPLD14_PHYS, CPLD14_SIZE, MT_DEVICE },
  203. { CPLD16_VIRT, CPLD16_PHYS, CPLD16_SIZE, MT_DEVICE },
  204. { CPLD18_VIRT, CPLD18_PHYS, CPLD18_SIZE, MT_DEVICE },
  205. { CPLD1A_VIRT, CPLD1A_PHYS, CPLD1A_SIZE, MT_DEVICE },
  206. };
  207. void __init
  208. lpd7a400_map_io(void)
  209. {
  210. iotable_init (lpd7a400_io_desc, ARRAY_SIZE (lpd7a400_io_desc));
  211. /* Fixup (improve) Static Memory Controller settings */
  212. SMC_BCR0 = 0x200039af; /* Boot Flash */
  213. SMC_BCR6 = 0x1000fbe0; /* CPLD */
  214. SMC_BCR7 = 0x1000b2c2; /* Compact Flash */
  215. }
  216. #ifdef CONFIG_MACH_LPD7A400
  217. MACHINE_START (LPD7A400, "Logic Product Development LPD7A400-10")
  218. /* Maintainer: Marc Singer */
  219. .phys_ram = 0xc0000000,
  220. .phys_io = 0x80000000,
  221. .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc,
  222. .boot_params = 0xc0000100,
  223. .map_io = lpd7a400_map_io,
  224. .init_irq = lh7a400_init_irq,
  225. .timer = &lh7a40x_timer,
  226. .init_machine = lpd7a40x_init,
  227. MACHINE_END
  228. #endif
  229. #ifdef CONFIG_MACH_LPD7A404
  230. MACHINE_START (LPD7A404, "Logic Product Development LPD7A404-10")
  231. /* Maintainer: Marc Singer */
  232. .phys_ram = 0xc0000000,
  233. .phys_io = 0x80000000,
  234. .io_pg_offst = ((io_p2v (0x80000000))>>18) & 0xfffc,
  235. .boot_params = 0xc0000100,
  236. .map_io = lpd7a400_map_io,
  237. .init_irq = lh7a404_init_irq,
  238. .timer = &lh7a40x_timer,
  239. .init_machine = lpd7a40x_init,
  240. MACHINE_END
  241. #endif