ixdp2x00.c 8.6 KB

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  1. /*
  2. * arch/arm/mach-ixp2000/ixdp2x00.c
  3. *
  4. * Code common to IXDP2400 and IXDP2800 platforms.
  5. *
  6. * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
  7. * Maintainer: Deepak Saxena <dsaxena@plexity.net>
  8. *
  9. * Copyright (C) 2002 Intel Corp.
  10. * Copyright (C) 2003-2004 MontaVista Software, Inc.
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. */
  17. #include <linux/config.h>
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/mm.h>
  21. #include <linux/sched.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/device.h>
  24. #include <linux/bitops.h>
  25. #include <linux/pci.h>
  26. #include <linux/ioport.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <asm/io.h>
  30. #include <asm/irq.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/page.h>
  33. #include <asm/system.h>
  34. #include <asm/hardware.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/pci.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <asm/mach/time.h>
  40. #include <asm/mach/flash.h>
  41. #include <asm/mach/arch.h>
  42. #include <asm/arch/gpio.h>
  43. /*************************************************************************
  44. * IXDP2x00 IRQ Initialization
  45. *************************************************************************/
  46. static volatile unsigned long *board_irq_mask;
  47. static volatile unsigned long *board_irq_stat;
  48. static unsigned long board_irq_count;
  49. #ifdef CONFIG_ARCH_IXDP2400
  50. /*
  51. * Slowport configuration for accessing CPLD registers on IXDP2x00
  52. */
  53. static struct slowport_cfg slowport_cpld_cfg = {
  54. .CCR = SLOWPORT_CCR_DIV_2,
  55. .WTC = 0x00000070,
  56. .RTC = 0x00000070,
  57. .PCR = SLOWPORT_MODE_FLASH,
  58. .ADC = SLOWPORT_ADDR_WIDTH_24 | SLOWPORT_DATA_WIDTH_8
  59. };
  60. #endif
  61. static void ixdp2x00_irq_mask(unsigned int irq)
  62. {
  63. unsigned long dummy;
  64. static struct slowport_cfg old_cfg;
  65. /*
  66. * This is ugly in common code but really don't know
  67. * of a better way to handle it. :(
  68. */
  69. #ifdef CONFIG_ARCH_IXDP2400
  70. if (machine_is_ixdp2400())
  71. ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
  72. #endif
  73. dummy = *board_irq_mask;
  74. dummy |= IXP2000_BOARD_IRQ_MASK(irq);
  75. ixp2000_reg_write(board_irq_mask, dummy);
  76. #ifdef CONFIG_ARCH_IXDP2400
  77. if (machine_is_ixdp2400())
  78. ixp2000_release_slowport(&old_cfg);
  79. #endif
  80. }
  81. static void ixdp2x00_irq_unmask(unsigned int irq)
  82. {
  83. unsigned long dummy;
  84. static struct slowport_cfg old_cfg;
  85. #ifdef CONFIG_ARCH_IXDP2400
  86. if (machine_is_ixdp2400())
  87. ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
  88. #endif
  89. dummy = *board_irq_mask;
  90. dummy &= ~IXP2000_BOARD_IRQ_MASK(irq);
  91. ixp2000_reg_write(board_irq_mask, dummy);
  92. if (machine_is_ixdp2400())
  93. ixp2000_release_slowport(&old_cfg);
  94. }
  95. static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
  96. {
  97. volatile u32 ex_interrupt = 0;
  98. static struct slowport_cfg old_cfg;
  99. int i;
  100. desc->chip->mask(irq);
  101. #ifdef CONFIG_ARCH_IXDP2400
  102. if (machine_is_ixdp2400())
  103. ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
  104. #endif
  105. ex_interrupt = *board_irq_stat & 0xff;
  106. if (machine_is_ixdp2400())
  107. ixp2000_release_slowport(&old_cfg);
  108. if(!ex_interrupt) {
  109. printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n");
  110. return;
  111. }
  112. for(i = 0; i < board_irq_count; i++) {
  113. if(ex_interrupt & (1 << i)) {
  114. struct irqdesc *cpld_desc;
  115. int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
  116. cpld_desc = irq_desc + cpld_irq;
  117. desc_handle_irq(cpld_irq, cpld_desc, regs);
  118. }
  119. }
  120. desc->chip->unmask(irq);
  121. }
  122. static struct irqchip ixdp2x00_cpld_irq_chip = {
  123. .ack = ixdp2x00_irq_mask,
  124. .mask = ixdp2x00_irq_mask,
  125. .unmask = ixdp2x00_irq_unmask
  126. };
  127. void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs)
  128. {
  129. unsigned int irq;
  130. ixp2000_init_irq();
  131. if (!ixdp2x00_master_npu())
  132. return;
  133. board_irq_stat = stat_reg;
  134. board_irq_mask = mask_reg;
  135. board_irq_count = nr_irqs;
  136. *board_irq_mask = 0xffffffff;
  137. for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
  138. set_irq_chip(irq, &ixdp2x00_cpld_irq_chip);
  139. set_irq_handler(irq, do_level_IRQ);
  140. set_irq_flags(irq, IRQF_VALID);
  141. }
  142. /* Hook into PCI interrupt */
  143. set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x00_irq_handler);
  144. }
  145. /*************************************************************************
  146. * IXDP2x00 memory map
  147. *************************************************************************/
  148. static struct map_desc ixdp2x00_io_desc __initdata = {
  149. .virtual = IXDP2X00_VIRT_CPLD_BASE,
  150. .physical = IXDP2X00_PHYS_CPLD_BASE,
  151. .length = IXDP2X00_CPLD_SIZE,
  152. .type = MT_DEVICE
  153. };
  154. void __init ixdp2x00_map_io(void)
  155. {
  156. ixp2000_map_io();
  157. iotable_init(&ixdp2x00_io_desc, 1);
  158. }
  159. /*************************************************************************
  160. * IXDP2x00-common PCI init
  161. *
  162. * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board
  163. * contains two NPUs (ingress and egress) connected over PCI, both running
  164. * instances of the kernel. So far so good. Peers on the PCI bus running
  165. * Linux is a common design in telecom systems. The problem is that instead
  166. * of all the devices being controlled by a single host, different
  167. * devices are controlles by different NPUs on the same bus, leading to
  168. * multiple hosts on the bus. The exact bus layout looks like:
  169. *
  170. * Bus 0
  171. * Master NPU <-------------------+-------------------> Slave NPU
  172. * |
  173. * |
  174. * P2P
  175. * |
  176. *
  177. * Bus 1 |
  178. * <--+------+---------+---------+------+-->
  179. * | | | | |
  180. * | | | | |
  181. * ... Dev PMC Media Eth0 Eth1 ...
  182. *
  183. * The master controlls all but Eth1, which is controlled by the
  184. * slave. What this means is that the both the master and the slave
  185. * have to scan the bus, but only one of them can enumerate the bus.
  186. * In addition, after the bus is scanned, each kernel must remove
  187. * the device(s) it does not control from the PCI dev list otherwise
  188. * a driver on each NPU will try to manage it and we will have horrible
  189. * conflicts. Oh..and the slave NPU needs to see the master NPU
  190. * for Intel's drivers to work properly. Closed source drivers...
  191. *
  192. * The way we deal with this is fairly simple but ugly:
  193. *
  194. * 1) Let master scan and enumerate the bus completely.
  195. * 2) Master deletes Eth1 from device list.
  196. * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
  197. * from device list.
  198. * 4) Find HW designers and LART them.
  199. *
  200. * The boards also do not do normal PCI IRQ routing, or any sort of
  201. * sensical swizzling, so we just need to check where on the bus a
  202. * device sits and figure out to which CPLD pin the interrupt is routed.
  203. * See ixdp2[48]00.c files.
  204. *
  205. *************************************************************************/
  206. void ixdp2x00_slave_pci_postinit(void)
  207. {
  208. struct pci_dev *dev;
  209. /*
  210. * Remove PMC device is there is one
  211. */
  212. if((dev = pci_find_slot(1, IXDP2X00_PMC_DEVFN)))
  213. pci_remove_bus_device(dev);
  214. dev = pci_find_slot(0, IXDP2X00_21555_DEVFN);
  215. pci_remove_bus_device(dev);
  216. }
  217. /**************************************************************************
  218. * IXDP2x00 Machine Setup
  219. *************************************************************************/
  220. static struct flash_platform_data ixdp2x00_platform_data = {
  221. .map_name = "cfi_probe",
  222. .width = 1,
  223. };
  224. static struct ixp2000_flash_data ixdp2x00_flash_data = {
  225. .platform_data = &ixdp2x00_platform_data,
  226. .nr_banks = 1
  227. };
  228. static struct resource ixdp2x00_flash_resource = {
  229. .start = 0xc4000000,
  230. .end = 0xc4000000 + 0x00ffffff,
  231. .flags = IORESOURCE_MEM,
  232. };
  233. static struct platform_device ixdp2x00_flash = {
  234. .name = "IXP2000-Flash",
  235. .id = 0,
  236. .dev = {
  237. .platform_data = &ixdp2x00_flash_data,
  238. },
  239. .num_resources = 1,
  240. .resource = &ixdp2x00_flash_resource,
  241. };
  242. static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = {
  243. .sda_pin = IXDP2X00_GPIO_SDA,
  244. .scl_pin = IXDP2X00_GPIO_SCL,
  245. };
  246. static struct platform_device ixdp2x00_i2c_controller = {
  247. .name = "IXP2000-I2C",
  248. .id = 0,
  249. .dev = {
  250. .platform_data = &ixdp2x00_i2c_gpio_pins,
  251. },
  252. .num_resources = 0
  253. };
  254. static struct platform_device *ixdp2x00_devices[] __initdata = {
  255. &ixdp2x00_flash,
  256. &ixdp2x00_i2c_controller
  257. };
  258. void __init ixdp2x00_init_machine(void)
  259. {
  260. gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
  261. gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
  262. platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
  263. ixp2000_uart_init();
  264. }