iq80321-pci.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123
  1. /*
  2. * arch/arm/mach-iop3xx/iq80321-pci.c
  3. *
  4. * PCI support for the Intel IQ80321 reference board
  5. *
  6. * Author: Rory Bolt <rorybolt@pacbell.net>
  7. * Copyright (C) 2002 Rory Bolt
  8. * Copyright (C) 2004 Intel Corp.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/pci.h>
  16. #include <linux/init.h>
  17. #include <asm/hardware.h>
  18. #include <asm/irq.h>
  19. #include <asm/mach/pci.h>
  20. #include <asm/mach-types.h>
  21. /*
  22. * The following macro is used to lookup irqs in a standard table
  23. * format for those systems that do not already have PCI
  24. * interrupts properly routed. We assume 1 <= pin <= 4
  25. */
  26. #define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
  27. ({ int _ctl_ = -1; \
  28. unsigned int _idsel = idsel - minid; \
  29. if (_idsel <= maxid) \
  30. _ctl_ = pci_irq_table[_idsel][pin-1]; \
  31. _ctl_; })
  32. #define INTA IRQ_IQ80321_INTA
  33. #define INTB IRQ_IQ80321_INTB
  34. #define INTC IRQ_IQ80321_INTC
  35. #define INTD IRQ_IQ80321_INTD
  36. #define INTE IRQ_IQ80321_I82544
  37. static inline int __init
  38. iq80321_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
  39. {
  40. static int pci_irq_table[][4] = {
  41. /*
  42. * PCI IDSEL/INTPIN->INTLINE
  43. * A B C D
  44. */
  45. {INTE, INTE, INTE, INTE}, /* Gig-E */
  46. {-1, -1, -1, -1}, /* Unused */
  47. {INTC, INTD, INTA, INTB}, /* PCI-X Slot */
  48. {-1, -1, -1, -1},
  49. };
  50. BUG_ON(pin < 1 || pin > 4);
  51. // return PCI_IRQ_TABLE_LOOKUP(4, 7);
  52. return pci_irq_table[idsel%4][pin-1];
  53. }
  54. static int iq80321_setup(int nr, struct pci_sys_data *sys)
  55. {
  56. struct resource *res;
  57. if(nr != 0)
  58. return 0;
  59. res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
  60. if (!res)
  61. panic("PCI: unable to alloc resources");
  62. memset(res, 0, sizeof(struct resource) * 2);
  63. res[0].start = IOP321_PCI_LOWER_IO_VA;
  64. res[0].end = IOP321_PCI_UPPER_IO_VA;
  65. res[0].name = "IQ80321 PCI I/O Space";
  66. res[0].flags = IORESOURCE_IO;
  67. res[1].start = IOP321_PCI_LOWER_MEM_PA;
  68. res[1].end = IOP321_PCI_UPPER_MEM_PA;
  69. res[1].name = "IQ80321 PCI Memory Space";
  70. res[1].flags = IORESOURCE_MEM;
  71. request_resource(&ioport_resource, &res[0]);
  72. request_resource(&iomem_resource, &res[1]);
  73. sys->mem_offset = IOP321_PCI_MEM_OFFSET;
  74. sys->io_offset = IOP321_PCI_IO_OFFSET;
  75. sys->resource[0] = &res[0];
  76. sys->resource[1] = &res[1];
  77. sys->resource[2] = NULL;
  78. return 1;
  79. }
  80. static void iq80321_preinit(void)
  81. {
  82. iop321_init();
  83. }
  84. static struct hw_pci iq80321_pci __initdata = {
  85. .swizzle = pci_std_swizzle,
  86. .nr_controllers = 1,
  87. .setup = iq80321_setup,
  88. .scan = iop321_scan_bus,
  89. .preinit = iq80321_preinit,
  90. .map_irq = iq80321_map_irq
  91. };
  92. static int __init iq80321_pci_init(void)
  93. {
  94. if (machine_is_iq80321())
  95. pci_common_init(&iq80321_pci);
  96. return 0;
  97. }
  98. subsys_initcall(iq80321_pci_init);