platsmp.c 4.8 KB

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  1. /*
  2. * linux/arch/arm/mach-cintegrator/platsmp.c
  3. *
  4. * Copyright (C) 2002 ARM Ltd.
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/errno.h>
  15. #include <linux/mm.h>
  16. #include <asm/atomic.h>
  17. #include <asm/cacheflush.h>
  18. #include <asm/delay.h>
  19. #include <asm/mmu_context.h>
  20. #include <asm/procinfo.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/smp.h>
  23. extern void integrator_secondary_startup(void);
  24. /*
  25. * control for which core is the next to come out of the secondary
  26. * boot "holding pen"
  27. */
  28. volatile int __cpuinitdata pen_release = -1;
  29. unsigned long __cpuinitdata phys_pen_release = 0;
  30. static DEFINE_SPINLOCK(boot_lock);
  31. void __cpuinit platform_secondary_init(unsigned int cpu)
  32. {
  33. /*
  34. * the primary core may have used a "cross call" soft interrupt
  35. * to get this processor out of WFI in the BootMonitor - make
  36. * sure that we are no longer being sent this soft interrupt
  37. */
  38. smp_cross_call_done(cpumask_of_cpu(cpu));
  39. /*
  40. * if any interrupts are already enabled for the primary
  41. * core (e.g. timer irq), then they will not have been enabled
  42. * for us: do so
  43. */
  44. secondary_scan_irqs();
  45. /*
  46. * let the primary processor know we're out of the
  47. * pen, then head off into the C entry point
  48. */
  49. pen_release = -1;
  50. /*
  51. * Synchronise with the boot thread.
  52. */
  53. spin_lock(&boot_lock);
  54. spin_unlock(&boot_lock);
  55. }
  56. int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  57. {
  58. unsigned long timeout;
  59. /*
  60. * set synchronisation state between this boot processor
  61. * and the secondary one
  62. */
  63. spin_lock(&boot_lock);
  64. /*
  65. * The secondary processor is waiting to be released from
  66. * the holding pen - release it, then wait for it to flag
  67. * that it has been released by resetting pen_release.
  68. *
  69. * Note that "pen_release" is the hardware CPU ID, whereas
  70. * "cpu" is Linux's internal ID.
  71. */
  72. pen_release = cpu;
  73. flush_cache_all();
  74. /*
  75. * XXX
  76. *
  77. * This is a later addition to the booting protocol: the
  78. * bootMonitor now puts secondary cores into WFI, so
  79. * poke_milo() no longer gets the cores moving; we need
  80. * to send a soft interrupt to wake the secondary core.
  81. * Use smp_cross_call() for this, since there's little
  82. * point duplicating the code here
  83. */
  84. smp_cross_call(cpumask_of_cpu(cpu));
  85. timeout = jiffies + (1 * HZ);
  86. while (time_before(jiffies, timeout)) {
  87. if (pen_release == -1)
  88. break;
  89. udelay(10);
  90. }
  91. /*
  92. * now the secondary core is starting up let it run its
  93. * calibrations, then wait for it to finish
  94. */
  95. spin_unlock(&boot_lock);
  96. return pen_release != -1 ? -ENOSYS : 0;
  97. }
  98. static void __init poke_milo(void)
  99. {
  100. extern void secondary_startup(void);
  101. /* nobody is to be released from the pen yet */
  102. pen_release = -1;
  103. phys_pen_release = virt_to_phys(&pen_release);
  104. /*
  105. * write the address of secondary startup into the system-wide
  106. * flags register, then clear the bottom two bits, which is what
  107. * BootMonitor is waiting for
  108. */
  109. #if 1
  110. #define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30
  111. __raw_writel(virt_to_phys(integrator_secondary_startup),
  112. (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
  113. CINTEGRATOR_HDR_FLAGSS_OFFSET));
  114. #define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34
  115. __raw_writel(3,
  116. (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
  117. CINTEGRATOR_HDR_FLAGSC_OFFSET));
  118. #endif
  119. mb();
  120. }
  121. void __init smp_prepare_cpus(unsigned int max_cpus)
  122. {
  123. unsigned int ncores = get_core_count();
  124. unsigned int cpu = smp_processor_id();
  125. int i;
  126. /* sanity check */
  127. if (ncores == 0) {
  128. printk(KERN_ERR
  129. "Integrator/CP: strange CM count of 0? Default to 1\n");
  130. ncores = 1;
  131. }
  132. if (ncores > NR_CPUS) {
  133. printk(KERN_WARNING
  134. "Integrator/CP: no. of cores (%d) greater than configured "
  135. "maximum of %d - clipping\n",
  136. ncores, NR_CPUS);
  137. ncores = NR_CPUS;
  138. }
  139. /*
  140. * start with some more config for the Boot CPU, now that
  141. * the world is a bit more alive (which was not the case
  142. * when smp_prepare_boot_cpu() was called)
  143. */
  144. smp_store_cpu_info(cpu);
  145. /*
  146. * are we trying to boot more cores than exist?
  147. */
  148. if (max_cpus > ncores)
  149. max_cpus = ncores;
  150. /*
  151. * Initialise the possible/present maps.
  152. * cpu_possible_map describes the set of CPUs which may be present
  153. * cpu_present_map describes the set of CPUs populated
  154. */
  155. for (i = 0; i < max_cpus; i++) {
  156. cpu_set(i, cpu_possible_map);
  157. cpu_set(i, cpu_present_map);
  158. }
  159. /*
  160. * Do we need any more CPUs? If so, then let them know where
  161. * to start. Note that, on modern versions of MILO, the "poke"
  162. * doesn't actually do anything until each individual core is
  163. * sent a soft interrupt to get it out of WFI
  164. */
  165. if (max_cpus > 1)
  166. poke_milo();
  167. }