netwinder-hw.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-footbridge/netwinder-hw.c
  3. *
  4. * Netwinder machine fixup
  5. *
  6. * Copyright (C) 1998, 1999 Russell King, Phil Blundell
  7. */
  8. #include <linux/config.h>
  9. #include <linux/module.h>
  10. #include <linux/ioport.h>
  11. #include <linux/kernel.h>
  12. #include <linux/delay.h>
  13. #include <linux/init.h>
  14. #include <asm/hardware/dec21285.h>
  15. #include <asm/io.h>
  16. #include <asm/leds.h>
  17. #include <asm/mach-types.h>
  18. #include <asm/setup.h>
  19. #include <asm/mach/arch.h>
  20. #include "common.h"
  21. #define IRDA_IO_BASE 0x180
  22. #define GP1_IO_BASE 0x338
  23. #define GP2_IO_BASE 0x33a
  24. #ifdef CONFIG_LEDS
  25. #define DEFAULT_LEDS 0
  26. #else
  27. #define DEFAULT_LEDS GPIO_GREEN_LED
  28. #endif
  29. /*
  30. * Winbond WB83977F accessibility stuff
  31. */
  32. static inline void wb977_open(void)
  33. {
  34. outb(0x87, 0x370);
  35. outb(0x87, 0x370);
  36. }
  37. static inline void wb977_close(void)
  38. {
  39. outb(0xaa, 0x370);
  40. }
  41. static inline void wb977_wb(int reg, int val)
  42. {
  43. outb(reg, 0x370);
  44. outb(val, 0x371);
  45. }
  46. static inline void wb977_ww(int reg, int val)
  47. {
  48. outb(reg, 0x370);
  49. outb(val >> 8, 0x371);
  50. outb(reg + 1, 0x370);
  51. outb(val & 255, 0x371);
  52. }
  53. #define wb977_device_select(dev) wb977_wb(0x07, dev)
  54. #define wb977_device_disable() wb977_wb(0x30, 0x00)
  55. #define wb977_device_enable() wb977_wb(0x30, 0x01)
  56. /*
  57. * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  58. */
  59. DEFINE_SPINLOCK(gpio_lock);
  60. static unsigned int current_gpio_op;
  61. static unsigned int current_gpio_io;
  62. static unsigned int current_cpld;
  63. void gpio_modify_op(int mask, int set)
  64. {
  65. unsigned int new_gpio, changed;
  66. new_gpio = (current_gpio_op & ~mask) | set;
  67. changed = new_gpio ^ current_gpio_op;
  68. current_gpio_op = new_gpio;
  69. if (changed & 0xff)
  70. outb(new_gpio, GP1_IO_BASE);
  71. if (changed & 0xff00)
  72. outb(new_gpio >> 8, GP2_IO_BASE);
  73. }
  74. static inline void __gpio_modify_io(int mask, int in)
  75. {
  76. unsigned int new_gpio, changed;
  77. int port;
  78. new_gpio = (current_gpio_io & ~mask) | in;
  79. changed = new_gpio ^ current_gpio_io;
  80. current_gpio_io = new_gpio;
  81. changed >>= 1;
  82. new_gpio >>= 1;
  83. wb977_device_select(7);
  84. for (port = 0xe1; changed && port < 0xe8; changed >>= 1) {
  85. wb977_wb(port, new_gpio & 1);
  86. port += 1;
  87. new_gpio >>= 1;
  88. }
  89. wb977_device_select(8);
  90. for (port = 0xe8; changed && port < 0xec; changed >>= 1) {
  91. wb977_wb(port, new_gpio & 1);
  92. port += 1;
  93. new_gpio >>= 1;
  94. }
  95. }
  96. void gpio_modify_io(int mask, int in)
  97. {
  98. /* Open up the SuperIO chip */
  99. wb977_open();
  100. __gpio_modify_io(mask, in);
  101. /* Close up the EFER gate */
  102. wb977_close();
  103. }
  104. int gpio_read(void)
  105. {
  106. return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
  107. }
  108. /*
  109. * Initialise the Winbond W83977F global registers
  110. */
  111. static inline void wb977_init_global(void)
  112. {
  113. /*
  114. * Enable R/W config registers
  115. */
  116. wb977_wb(0x26, 0x40);
  117. /*
  118. * Power down FDC (not used)
  119. */
  120. wb977_wb(0x22, 0xfe);
  121. /*
  122. * GP12, GP11, CIRRX, IRRXH, GP10
  123. */
  124. wb977_wb(0x2a, 0xc1);
  125. /*
  126. * GP23, GP22, GP21, GP20, GP13
  127. */
  128. wb977_wb(0x2b, 0x6b);
  129. /*
  130. * GP17, GP16, GP15, GP14
  131. */
  132. wb977_wb(0x2c, 0x55);
  133. }
  134. /*
  135. * Initialise the Winbond W83977F printer port
  136. */
  137. static inline void wb977_init_printer(void)
  138. {
  139. wb977_device_select(1);
  140. /*
  141. * mode 1 == EPP
  142. */
  143. wb977_wb(0xf0, 0x01);
  144. }
  145. /*
  146. * Initialise the Winbond W83977F keyboard controller
  147. */
  148. static inline void wb977_init_keyboard(void)
  149. {
  150. wb977_device_select(5);
  151. /*
  152. * Keyboard controller address
  153. */
  154. wb977_ww(0x60, 0x0060);
  155. wb977_ww(0x62, 0x0064);
  156. /*
  157. * Keyboard IRQ 1, active high, edge trigger
  158. */
  159. wb977_wb(0x70, 1);
  160. wb977_wb(0x71, 0x02);
  161. /*
  162. * Mouse IRQ 5, active high, edge trigger
  163. */
  164. wb977_wb(0x72, 5);
  165. wb977_wb(0x73, 0x02);
  166. /*
  167. * KBC 8MHz
  168. */
  169. wb977_wb(0xf0, 0x40);
  170. /*
  171. * Enable device
  172. */
  173. wb977_device_enable();
  174. }
  175. /*
  176. * Initialise the Winbond W83977F Infra-Red device
  177. */
  178. static inline void wb977_init_irda(void)
  179. {
  180. wb977_device_select(6);
  181. /*
  182. * IR base address
  183. */
  184. wb977_ww(0x60, IRDA_IO_BASE);
  185. /*
  186. * IRDA IRQ 6, active high, edge trigger
  187. */
  188. wb977_wb(0x70, 6);
  189. wb977_wb(0x71, 0x02);
  190. /*
  191. * RX DMA - ISA DMA 0
  192. */
  193. wb977_wb(0x74, 0x00);
  194. /*
  195. * TX DMA - Disable Tx DMA
  196. */
  197. wb977_wb(0x75, 0x04);
  198. /*
  199. * Append CRC, Enable bank selection
  200. */
  201. wb977_wb(0xf0, 0x03);
  202. /*
  203. * Enable device
  204. */
  205. wb977_device_enable();
  206. }
  207. /*
  208. * Initialise Winbond W83977F general purpose IO
  209. */
  210. static inline void wb977_init_gpio(void)
  211. {
  212. unsigned long flags;
  213. /*
  214. * Set up initial I/O definitions
  215. */
  216. current_gpio_io = -1;
  217. __gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER);
  218. wb977_device_select(7);
  219. /*
  220. * Group1 base address
  221. */
  222. wb977_ww(0x60, GP1_IO_BASE);
  223. wb977_ww(0x62, 0);
  224. wb977_ww(0x64, 0);
  225. /*
  226. * GP10 (Orage button) IRQ 10, active high, edge trigger
  227. */
  228. wb977_wb(0x70, 10);
  229. wb977_wb(0x71, 0x02);
  230. /*
  231. * GP10: Debounce filter enabled, IRQ, input
  232. */
  233. wb977_wb(0xe0, 0x19);
  234. /*
  235. * Enable Group1
  236. */
  237. wb977_device_enable();
  238. wb977_device_select(8);
  239. /*
  240. * Group2 base address
  241. */
  242. wb977_ww(0x60, GP2_IO_BASE);
  243. /*
  244. * Clear watchdog timer regs
  245. * - timer disable
  246. */
  247. wb977_wb(0xf2, 0x00);
  248. /*
  249. * - disable LED, no mouse nor keyboard IRQ
  250. */
  251. wb977_wb(0xf3, 0x00);
  252. /*
  253. * - timer counting, disable power LED, disable timeouot
  254. */
  255. wb977_wb(0xf4, 0x00);
  256. /*
  257. * Enable group2
  258. */
  259. wb977_device_enable();
  260. /*
  261. * Set Group1/Group2 outputs
  262. */
  263. spin_lock_irqsave(&gpio_lock, flags);
  264. gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
  265. spin_unlock_irqrestore(&gpio_lock, flags);
  266. }
  267. /*
  268. * Initialise the Winbond W83977F chip.
  269. */
  270. static void __init wb977_init(void)
  271. {
  272. request_region(0x370, 2, "W83977AF configuration");
  273. /*
  274. * Open up the SuperIO chip
  275. */
  276. wb977_open();
  277. /*
  278. * Initialise the global registers
  279. */
  280. wb977_init_global();
  281. /*
  282. * Initialise the various devices in
  283. * the multi-IO chip.
  284. */
  285. wb977_init_printer();
  286. wb977_init_keyboard();
  287. wb977_init_irda();
  288. wb977_init_gpio();
  289. /*
  290. * Close up the EFER gate
  291. */
  292. wb977_close();
  293. }
  294. void cpld_modify(int mask, int set)
  295. {
  296. int msk;
  297. current_cpld = (current_cpld & ~mask) | set;
  298. gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
  299. gpio_modify_op(GPIO_IOLOAD, 0);
  300. for (msk = 8; msk; msk >>= 1) {
  301. int bit = current_cpld & msk;
  302. gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
  303. gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
  304. }
  305. gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
  306. gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
  307. gpio_modify_op(GPIO_IOLOAD, 0);
  308. }
  309. static void __init cpld_init(void)
  310. {
  311. unsigned long flags;
  312. spin_lock_irqsave(&gpio_lock, flags);
  313. cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
  314. spin_unlock_irqrestore(&gpio_lock, flags);
  315. }
  316. static unsigned char rwa_unlock[] __initdata =
  317. { 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b,
  318. 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74,
  319. 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 };
  320. #ifndef DEBUG
  321. #define dprintk(x...)
  322. #else
  323. #define dprintk(x...) printk(x)
  324. #endif
  325. #define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0)
  326. static inline void rwa010_unlock(void)
  327. {
  328. int i;
  329. WRITE_RWA(2, 2);
  330. mdelay(10);
  331. for (i = 0; i < sizeof(rwa_unlock); i++) {
  332. outb(rwa_unlock[i], 0x279);
  333. udelay(10);
  334. }
  335. }
  336. static inline void rwa010_read_ident(void)
  337. {
  338. unsigned char si[9];
  339. int i, j;
  340. WRITE_RWA(3, 0);
  341. WRITE_RWA(0, 128);
  342. outb(1, 0x279);
  343. mdelay(1);
  344. dprintk("Identifier: ");
  345. for (i = 0; i < 9; i++) {
  346. si[i] = 0;
  347. for (j = 0; j < 8; j++) {
  348. int bit;
  349. udelay(250);
  350. inb(0x203);
  351. udelay(250);
  352. bit = inb(0x203);
  353. dprintk("%02X ", bit);
  354. bit = (bit == 0xaa) ? 1 : 0;
  355. si[i] |= bit << j;
  356. }
  357. dprintk("(%02X) ", si[i]);
  358. }
  359. dprintk("\n");
  360. }
  361. static inline void rwa010_global_init(void)
  362. {
  363. WRITE_RWA(6, 2); // Assign a card no = 2
  364. dprintk("Card no = %d\n", inb(0x203));
  365. /* disable the modem section of the chip */
  366. WRITE_RWA(7, 3);
  367. WRITE_RWA(0x30, 0);
  368. /* disable the cdrom section of the chip */
  369. WRITE_RWA(7, 4);
  370. WRITE_RWA(0x30, 0);
  371. /* disable the MPU-401 section of the chip */
  372. WRITE_RWA(7, 2);
  373. WRITE_RWA(0x30, 0);
  374. }
  375. static inline void rwa010_game_port_init(void)
  376. {
  377. int i;
  378. WRITE_RWA(7, 5);
  379. dprintk("Slider base: ");
  380. WRITE_RWA(0x61, 1);
  381. i = inb(0x203);
  382. WRITE_RWA(0x60, 2);
  383. dprintk("%02X%02X (201)\n", inb(0x203), i);
  384. WRITE_RWA(0x30, 1);
  385. }
  386. static inline void rwa010_waveartist_init(int base, int irq, int dma)
  387. {
  388. int i;
  389. WRITE_RWA(7, 0);
  390. dprintk("WaveArtist base: ");
  391. WRITE_RWA(0x61, base & 255);
  392. i = inb(0x203);
  393. WRITE_RWA(0x60, base >> 8);
  394. dprintk("%02X%02X (%X),", inb(0x203), i, base);
  395. WRITE_RWA(0x70, irq);
  396. dprintk(" irq: %d (%d),", inb(0x203), irq);
  397. WRITE_RWA(0x74, dma);
  398. dprintk(" dma: %d (%d)\n", inb(0x203), dma);
  399. WRITE_RWA(0x30, 1);
  400. }
  401. static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma)
  402. {
  403. int i;
  404. WRITE_RWA(7, 1);
  405. dprintk("SoundBlaster base: ");
  406. WRITE_RWA(0x61, sb_base & 255);
  407. i = inb(0x203);
  408. WRITE_RWA(0x60, sb_base >> 8);
  409. dprintk("%02X%02X (%X),", inb(0x203), i, sb_base);
  410. dprintk(" irq: ");
  411. WRITE_RWA(0x70, irq);
  412. dprintk("%d (%d),", inb(0x203), irq);
  413. dprintk(" 8-bit DMA: ");
  414. WRITE_RWA(0x74, dma);
  415. dprintk("%d (%d)\n", inb(0x203), dma);
  416. dprintk("AdLib base: ");
  417. WRITE_RWA(0x63, al_base & 255);
  418. i = inb(0x203);
  419. WRITE_RWA(0x62, al_base >> 8);
  420. dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base);
  421. WRITE_RWA(0x30, 1);
  422. }
  423. static void rwa010_soundblaster_reset(void)
  424. {
  425. int i;
  426. outb(1, 0x226);
  427. udelay(3);
  428. outb(0, 0x226);
  429. for (i = 0; i < 5; i++) {
  430. if (inb(0x22e) & 0x80)
  431. break;
  432. mdelay(1);
  433. }
  434. if (i == 5)
  435. printk("SoundBlaster: DSP reset failed\n");
  436. dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a));
  437. for (i = 0; i < 5; i++) {
  438. if ((inb(0x22c) & 0x80) == 0)
  439. break;
  440. mdelay(1);
  441. }
  442. if (i == 5)
  443. printk("SoundBlaster: DSP not ready\n");
  444. else {
  445. outb(0xe1, 0x22c);
  446. dprintk("SoundBlaster DSP id: ");
  447. i = inb(0x22a);
  448. udelay(1);
  449. i |= inb(0x22a) << 8;
  450. dprintk("%04X\n", i);
  451. for (i = 0; i < 5; i++) {
  452. if ((inb(0x22c) & 0x80) == 0)
  453. break;
  454. mdelay(1);
  455. }
  456. if (i == 5)
  457. printk("SoundBlaster: could not turn speaker off\n");
  458. outb(0xd3, 0x22c);
  459. }
  460. /* turn on OPL3 */
  461. outb(5, 0x38a);
  462. outb(1, 0x38b);
  463. }
  464. static void __init rwa010_init(void)
  465. {
  466. rwa010_unlock();
  467. rwa010_read_ident();
  468. rwa010_global_init();
  469. rwa010_game_port_init();
  470. rwa010_waveartist_init(0x250, 3, 7);
  471. rwa010_soundblaster_init(0x220, 0x388, 3, 1);
  472. rwa010_soundblaster_reset();
  473. }
  474. EXPORT_SYMBOL(gpio_lock);
  475. EXPORT_SYMBOL(gpio_modify_op);
  476. EXPORT_SYMBOL(gpio_modify_io);
  477. EXPORT_SYMBOL(cpld_modify);
  478. /*
  479. * Initialise any other hardware after we've got the PCI bus
  480. * initialised. We may need the PCI bus to talk to this other
  481. * hardware.
  482. */
  483. static int __init nw_hw_init(void)
  484. {
  485. if (machine_is_netwinder()) {
  486. unsigned long flags;
  487. wb977_init();
  488. cpld_init();
  489. rwa010_init();
  490. spin_lock_irqsave(&gpio_lock, flags);
  491. gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
  492. spin_unlock_irqrestore(&gpio_lock, flags);
  493. }
  494. return 0;
  495. }
  496. __initcall(nw_hw_init);
  497. /*
  498. * Older NeTTroms either do not provide a parameters
  499. * page, or they don't supply correct information in
  500. * the parameter page.
  501. */
  502. static void __init
  503. fixup_netwinder(struct machine_desc *desc, struct tag *tags,
  504. char **cmdline, struct meminfo *mi)
  505. {
  506. #ifdef CONFIG_ISAPNP
  507. extern int isapnp_disable;
  508. /*
  509. * We must not use the kernels ISAPnP code
  510. * on the NetWinder - it will reset the settings
  511. * for the WaveArtist chip and render it inoperable.
  512. */
  513. isapnp_disable = 1;
  514. #endif
  515. }
  516. MACHINE_START(NETWINDER, "Rebel-NetWinder")
  517. /* Maintainer: Russell King/Rebel.com */
  518. .phys_ram = 0x00000000,
  519. .phys_io = DC21285_ARMCSR_BASE,
  520. .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
  521. .boot_params = 0x00000100,
  522. .video_start = 0x000a0000,
  523. .video_end = 0x000bffff,
  524. .reserve_lp0 = 1,
  525. .reserve_lp2 = 1,
  526. .fixup = fixup_netwinder,
  527. .map_io = footbridge_map_io,
  528. .init_irq = footbridge_init_irq,
  529. .timer = &isa_timer,
  530. MACHINE_END