common.c 5.1 KB

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  1. /*
  2. * linux/arch/arm/mach-footbridge/common.c
  3. *
  4. * Copyright (C) 1998-2000 Russell King, Dave Gilbert.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/config.h>
  11. #include <linux/module.h>
  12. #include <linux/types.h>
  13. #include <linux/mm.h>
  14. #include <linux/ioport.h>
  15. #include <linux/list.h>
  16. #include <linux/init.h>
  17. #include <asm/pgtable.h>
  18. #include <asm/page.h>
  19. #include <asm/irq.h>
  20. #include <asm/io.h>
  21. #include <asm/mach-types.h>
  22. #include <asm/setup.h>
  23. #include <asm/hardware/dec21285.h>
  24. #include <asm/mach/irq.h>
  25. #include <asm/mach/map.h>
  26. #include "common.h"
  27. extern void __init isa_init_irq(unsigned int irq);
  28. unsigned int mem_fclk_21285 = 50000000;
  29. EXPORT_SYMBOL(mem_fclk_21285);
  30. static int __init parse_tag_memclk(const struct tag *tag)
  31. {
  32. mem_fclk_21285 = tag->u.memclk.fmemclk;
  33. return 0;
  34. }
  35. __tagtable(ATAG_MEMCLK, parse_tag_memclk);
  36. /*
  37. * Footbridge IRQ translation table
  38. * Converts from our IRQ numbers into FootBridge masks
  39. */
  40. static const int fb_irq_mask[] = {
  41. IRQ_MASK_UART_RX, /* 0 */
  42. IRQ_MASK_UART_TX, /* 1 */
  43. IRQ_MASK_TIMER1, /* 2 */
  44. IRQ_MASK_TIMER2, /* 3 */
  45. IRQ_MASK_TIMER3, /* 4 */
  46. IRQ_MASK_IN0, /* 5 */
  47. IRQ_MASK_IN1, /* 6 */
  48. IRQ_MASK_IN2, /* 7 */
  49. IRQ_MASK_IN3, /* 8 */
  50. IRQ_MASK_DOORBELLHOST, /* 9 */
  51. IRQ_MASK_DMA1, /* 10 */
  52. IRQ_MASK_DMA2, /* 11 */
  53. IRQ_MASK_PCI, /* 12 */
  54. IRQ_MASK_SDRAMPARITY, /* 13 */
  55. IRQ_MASK_I2OINPOST, /* 14 */
  56. IRQ_MASK_PCI_ABORT, /* 15 */
  57. IRQ_MASK_PCI_SERR, /* 16 */
  58. IRQ_MASK_DISCARD_TIMER, /* 17 */
  59. IRQ_MASK_PCI_DPERR, /* 18 */
  60. IRQ_MASK_PCI_PERR, /* 19 */
  61. };
  62. static void fb_mask_irq(unsigned int irq)
  63. {
  64. *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
  65. }
  66. static void fb_unmask_irq(unsigned int irq)
  67. {
  68. *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
  69. }
  70. static struct irqchip fb_chip = {
  71. .ack = fb_mask_irq,
  72. .mask = fb_mask_irq,
  73. .unmask = fb_unmask_irq,
  74. };
  75. static void __init __fb_init_irq(void)
  76. {
  77. unsigned int irq;
  78. /*
  79. * setup DC21285 IRQs
  80. */
  81. *CSR_IRQ_DISABLE = -1;
  82. *CSR_FIQ_DISABLE = -1;
  83. for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
  84. set_irq_chip(irq, &fb_chip);
  85. set_irq_handler(irq, do_level_IRQ);
  86. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  87. }
  88. }
  89. void __init footbridge_init_irq(void)
  90. {
  91. __fb_init_irq();
  92. if (!footbridge_cfn_mode())
  93. return;
  94. if (machine_is_ebsa285())
  95. /* The following is dependent on which slot
  96. * you plug the Southbridge card into. We
  97. * currently assume that you plug it into
  98. * the right-hand most slot.
  99. */
  100. isa_init_irq(IRQ_PCI);
  101. if (machine_is_cats())
  102. isa_init_irq(IRQ_IN2);
  103. if (machine_is_netwinder())
  104. isa_init_irq(IRQ_IN3);
  105. }
  106. /*
  107. * Common mapping for all systems. Note that the outbound write flush is
  108. * commented out since there is a "No Fix" problem with it. Not mapping
  109. * it means that we have extra bullet protection on our feet.
  110. */
  111. static struct map_desc fb_common_io_desc[] __initdata = {
  112. { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE },
  113. { XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE }
  114. };
  115. /*
  116. * The mapping when the footbridge is in host mode. We don't map any of
  117. * this when we are in add-in mode.
  118. */
  119. static struct map_desc ebsa285_host_io_desc[] __initdata = {
  120. #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
  121. { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE },
  122. { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE },
  123. { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE },
  124. { PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE },
  125. { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }
  126. #endif
  127. };
  128. /*
  129. * The CO-ebsa285 mapping.
  130. */
  131. static struct map_desc co285_io_desc[] __initdata = {
  132. #ifdef CONFIG_ARCH_CO285
  133. { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE },
  134. { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }
  135. #endif
  136. };
  137. void __init footbridge_map_io(void)
  138. {
  139. /*
  140. * Set up the common mapping first; we need this to
  141. * determine whether we're in host mode or not.
  142. */
  143. iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
  144. /*
  145. * Now, work out what we've got to map in addition on this
  146. * platform.
  147. */
  148. if (machine_is_co285())
  149. iotable_init(co285_io_desc, ARRAY_SIZE(co285_io_desc));
  150. if (footbridge_cfn_mode())
  151. iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
  152. }
  153. #ifdef CONFIG_FOOTBRIDGE_ADDIN
  154. /*
  155. * These two functions convert virtual addresses to PCI addresses and PCI
  156. * addresses to virtual addresses. Note that it is only legal to use these
  157. * on memory obtained via get_zeroed_page or kmalloc.
  158. */
  159. unsigned long __virt_to_bus(unsigned long res)
  160. {
  161. WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
  162. return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
  163. }
  164. EXPORT_SYMBOL(__virt_to_bus);
  165. unsigned long __bus_to_virt(unsigned long res)
  166. {
  167. res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
  168. res += PAGE_OFFSET;
  169. WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
  170. return res;
  171. }
  172. EXPORT_SYMBOL(__bus_to_virt);
  173. #endif