declance.c 32 KB

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  1. /*
  2. * Lance ethernet driver for the MIPS processor based
  3. * DECstation family
  4. *
  5. *
  6. * adopted from sunlance.c by Richard van den Berg
  7. *
  8. * Copyright (C) 2002, 2003 Maciej W. Rozycki
  9. *
  10. * additional sources:
  11. * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
  12. * Revision 1.2
  13. *
  14. * History:
  15. *
  16. * v0.001: The kernel accepts the code and it shows the hardware address.
  17. *
  18. * v0.002: Removed most sparc stuff, left only some module and dma stuff.
  19. *
  20. * v0.003: Enhanced base address calculation from proposals by
  21. * Harald Koerfgen and Thomas Riemer.
  22. *
  23. * v0.004: lance-regs is pointing at the right addresses, added prom
  24. * check. First start of address mapping and DMA.
  25. *
  26. * v0.005: started to play around with LANCE-DMA. This driver will not
  27. * work for non IOASIC lances. HK
  28. *
  29. * v0.006: added pointer arrays to lance_private and setup routine for
  30. * them in dec_lance_init. HK
  31. *
  32. * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
  33. * access the init block. This looks like one (short) word at a
  34. * time, but the smallest amount the IOASIC can transfer is a
  35. * (long) word. So we have a 2-2 padding here. Changed
  36. * lance_init_block accordingly. The 16-16 padding for the buffers
  37. * seems to be correct. HK
  38. *
  39. * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
  40. *
  41. * v0.009: Module support fixes, multiple interfaces support, various
  42. * bits. macro
  43. */
  44. #include <linux/config.h>
  45. #include <linux/crc32.h>
  46. #include <linux/delay.h>
  47. #include <linux/errno.h>
  48. #include <linux/if_ether.h>
  49. #include <linux/init.h>
  50. #include <linux/kernel.h>
  51. #include <linux/module.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/etherdevice.h>
  54. #include <linux/spinlock.h>
  55. #include <linux/stddef.h>
  56. #include <linux/string.h>
  57. #include <asm/addrspace.h>
  58. #include <asm/dec/interrupts.h>
  59. #include <asm/dec/ioasic.h>
  60. #include <asm/dec/ioasic_addrs.h>
  61. #include <asm/dec/kn01.h>
  62. #include <asm/dec/machtype.h>
  63. #include <asm/dec/tc.h>
  64. #include <asm/system.h>
  65. static char version[] __devinitdata =
  66. "declance.c: v0.009 by Linux MIPS DECstation task force\n";
  67. MODULE_AUTHOR("Linux MIPS DECstation task force");
  68. MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
  69. MODULE_LICENSE("GPL");
  70. /*
  71. * card types
  72. */
  73. #define ASIC_LANCE 1
  74. #define PMAD_LANCE 2
  75. #define PMAX_LANCE 3
  76. #ifndef CONFIG_TC
  77. unsigned long system_base;
  78. unsigned long dmaptr;
  79. #endif
  80. #define LE_CSR0 0
  81. #define LE_CSR1 1
  82. #define LE_CSR2 2
  83. #define LE_CSR3 3
  84. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  85. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  86. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  87. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  88. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  89. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  90. #define LE_C0_RINT 0x0400 /* Received interrupt */
  91. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  92. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  93. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  94. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  95. #define LE_C0_RXON 0x0020 /* Receiver on */
  96. #define LE_C0_TXON 0x0010 /* Transmitter on */
  97. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  98. #define LE_C0_STOP 0x0004 /* Stop the card */
  99. #define LE_C0_STRT 0x0002 /* Start the card */
  100. #define LE_C0_INIT 0x0001 /* Init the card */
  101. #define LE_C3_BSWP 0x4 /* SWAP */
  102. #define LE_C3_ACON 0x2 /* ALE Control */
  103. #define LE_C3_BCON 0x1 /* Byte control */
  104. /* Receive message descriptor 1 */
  105. #define LE_R1_OWN 0x80 /* Who owns the entry */
  106. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  107. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  108. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  109. #define LE_R1_CRC 0x08 /* CRC error */
  110. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  111. #define LE_R1_SOP 0x02 /* Start of packet */
  112. #define LE_R1_EOP 0x01 /* End of packet */
  113. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  114. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  115. #define LE_T1_ERR 0x40 /* Error summary */
  116. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  117. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  118. #define LE_T1_EDEF 0x04 /* Error: deferred */
  119. #define LE_T1_SOP 0x02 /* Start of packet */
  120. #define LE_T1_EOP 0x01 /* End of packet */
  121. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  122. #define LE_T3_BUF 0x8000 /* Buffer error */
  123. #define LE_T3_UFL 0x4000 /* Error underflow */
  124. #define LE_T3_LCOL 0x1000 /* Error late collision */
  125. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  126. #define LE_T3_RTY 0x0400 /* Error retry */
  127. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  128. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  129. #ifndef LANCE_LOG_TX_BUFFERS
  130. #define LANCE_LOG_TX_BUFFERS 4
  131. #define LANCE_LOG_RX_BUFFERS 4
  132. #endif
  133. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  134. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  135. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  136. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  137. #define PKT_BUF_SZ 1536
  138. #define RX_BUFF_SIZE PKT_BUF_SZ
  139. #define TX_BUFF_SIZE PKT_BUF_SZ
  140. #undef TEST_HITS
  141. #define ZERO 0
  142. /* The DS2000/3000 have a linear 64 KB buffer.
  143. * The PMAD-AA has 128 kb buffer on-board.
  144. *
  145. * The IOASIC LANCE devices use a shared memory region. This region as seen
  146. * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
  147. * The LANCE sees this as a 64 KB long continuous memory region.
  148. *
  149. * The LANCE's DMA address is used as an index in this buffer and DMA takes
  150. * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
  151. * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
  152. * by a 16 byte gap :-(.
  153. */
  154. struct lance_rx_desc {
  155. unsigned short rmd0; /* low address of packet */
  156. short gap0;
  157. unsigned char rmd1_hadr; /* high address of packet */
  158. unsigned char rmd1_bits; /* descriptor bits */
  159. short gap1;
  160. short length; /* 2s complement (negative!)
  161. of buffer length */
  162. short gap2;
  163. unsigned short mblength; /* actual number of bytes received */
  164. short gap3;
  165. };
  166. struct lance_tx_desc {
  167. unsigned short tmd0; /* low address of packet */
  168. short gap0;
  169. unsigned char tmd1_hadr; /* high address of packet */
  170. unsigned char tmd1_bits; /* descriptor bits */
  171. short gap1;
  172. short length; /* 2s complement (negative!)
  173. of buffer length */
  174. short gap2;
  175. unsigned short misc;
  176. short gap3;
  177. };
  178. /* First part of the LANCE initialization block, described in databook. */
  179. struct lance_init_block {
  180. unsigned short mode; /* pre-set mode (reg. 15) */
  181. short gap0;
  182. unsigned char phys_addr[12]; /* physical ethernet address
  183. only 0, 1, 4, 5, 8, 9 are valid
  184. 2, 3, 6, 7, 10, 11 are gaps */
  185. unsigned short filter[8]; /* multicast filter
  186. only 0, 2, 4, 6 are valid
  187. 1, 3, 5, 7 are gaps */
  188. /* Receive and transmit ring base, along with extra bits. */
  189. unsigned short rx_ptr; /* receive descriptor addr */
  190. short gap1;
  191. unsigned short rx_len; /* receive len and high addr */
  192. short gap2;
  193. unsigned short tx_ptr; /* transmit descriptor addr */
  194. short gap3;
  195. unsigned short tx_len; /* transmit len and high addr */
  196. short gap4;
  197. short gap5[8];
  198. /* The buffer descriptors */
  199. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  200. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  201. };
  202. #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
  203. #define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
  204. #define libdesc_offset(rt, elem) \
  205. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  206. /*
  207. * This works *only* for the ring descriptors
  208. */
  209. #define LANCE_ADDR(x) (PHYSADDR(x) >> 1)
  210. struct lance_private {
  211. struct net_device *next;
  212. int type;
  213. int slot;
  214. int dma_irq;
  215. volatile struct lance_regs *ll;
  216. volatile struct lance_init_block *init_block;
  217. spinlock_t lock;
  218. int rx_new, tx_new;
  219. int rx_old, tx_old;
  220. struct net_device_stats stats;
  221. unsigned short busmaster_regval;
  222. struct timer_list multicast_timer;
  223. /* Pointers to the ring buffers as seen from the CPU */
  224. char *rx_buf_ptr_cpu[RX_RING_SIZE];
  225. char *tx_buf_ptr_cpu[TX_RING_SIZE];
  226. /* Pointers to the ring buffers as seen from the LANCE */
  227. char *rx_buf_ptr_lnc[RX_RING_SIZE];
  228. char *tx_buf_ptr_lnc[TX_RING_SIZE];
  229. };
  230. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  231. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  232. lp->tx_old - lp->tx_new-1)
  233. /* The lance control ports are at an absolute address, machine and tc-slot
  234. * dependent.
  235. * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
  236. * so we have to give the structure an extra member making rap pointing
  237. * at the right address
  238. */
  239. struct lance_regs {
  240. volatile unsigned short rdp; /* register data port */
  241. unsigned short pad;
  242. volatile unsigned short rap; /* register address port */
  243. };
  244. int dec_lance_debug = 2;
  245. static struct net_device *root_lance_dev;
  246. static inline void writereg(volatile unsigned short *regptr, short value)
  247. {
  248. *regptr = value;
  249. iob();
  250. }
  251. /* Load the CSR registers */
  252. static void load_csrs(struct lance_private *lp)
  253. {
  254. volatile struct lance_regs *ll = lp->ll;
  255. int leptr;
  256. /* The address space as seen from the LANCE
  257. * begins at address 0. HK
  258. */
  259. leptr = 0;
  260. writereg(&ll->rap, LE_CSR1);
  261. writereg(&ll->rdp, (leptr & 0xFFFF));
  262. writereg(&ll->rap, LE_CSR2);
  263. writereg(&ll->rdp, leptr >> 16);
  264. writereg(&ll->rap, LE_CSR3);
  265. writereg(&ll->rdp, lp->busmaster_regval);
  266. /* Point back to csr0 */
  267. writereg(&ll->rap, LE_CSR0);
  268. }
  269. /*
  270. * Our specialized copy routines
  271. *
  272. */
  273. void cp_to_buf(const int type, void *to, const void *from, int len)
  274. {
  275. unsigned short *tp, *fp, clen;
  276. unsigned char *rtp, *rfp;
  277. if (type == PMAX_LANCE) {
  278. clen = len >> 1;
  279. tp = (unsigned short *) to;
  280. fp = (unsigned short *) from;
  281. while (clen--) {
  282. *tp++ = *fp++;
  283. tp++;
  284. }
  285. clen = len & 1;
  286. rtp = (unsigned char *) tp;
  287. rfp = (unsigned char *) fp;
  288. while (clen--) {
  289. *rtp++ = *rfp++;
  290. }
  291. } else {
  292. /*
  293. * copy 16 Byte chunks
  294. */
  295. clen = len >> 4;
  296. tp = (unsigned short *) to;
  297. fp = (unsigned short *) from;
  298. while (clen--) {
  299. *tp++ = *fp++;
  300. *tp++ = *fp++;
  301. *tp++ = *fp++;
  302. *tp++ = *fp++;
  303. *tp++ = *fp++;
  304. *tp++ = *fp++;
  305. *tp++ = *fp++;
  306. *tp++ = *fp++;
  307. tp += 8;
  308. }
  309. /*
  310. * do the rest, if any.
  311. */
  312. clen = len & 15;
  313. rtp = (unsigned char *) tp;
  314. rfp = (unsigned char *) fp;
  315. while (clen--) {
  316. *rtp++ = *rfp++;
  317. }
  318. }
  319. iob();
  320. }
  321. void cp_from_buf(const int type, void *to, const void *from, int len)
  322. {
  323. unsigned short *tp, *fp, clen;
  324. unsigned char *rtp, *rfp;
  325. if (type == PMAX_LANCE) {
  326. clen = len >> 1;
  327. tp = (unsigned short *) to;
  328. fp = (unsigned short *) from;
  329. while (clen--) {
  330. *tp++ = *fp++;
  331. fp++;
  332. }
  333. clen = len & 1;
  334. rtp = (unsigned char *) tp;
  335. rfp = (unsigned char *) fp;
  336. while (clen--) {
  337. *rtp++ = *rfp++;
  338. }
  339. } else {
  340. /*
  341. * copy 16 Byte chunks
  342. */
  343. clen = len >> 4;
  344. tp = (unsigned short *) to;
  345. fp = (unsigned short *) from;
  346. while (clen--) {
  347. *tp++ = *fp++;
  348. *tp++ = *fp++;
  349. *tp++ = *fp++;
  350. *tp++ = *fp++;
  351. *tp++ = *fp++;
  352. *tp++ = *fp++;
  353. *tp++ = *fp++;
  354. *tp++ = *fp++;
  355. fp += 8;
  356. }
  357. /*
  358. * do the rest, if any.
  359. */
  360. clen = len & 15;
  361. rtp = (unsigned char *) tp;
  362. rfp = (unsigned char *) fp;
  363. while (clen--) {
  364. *rtp++ = *rfp++;
  365. }
  366. }
  367. }
  368. /* Setup the Lance Rx and Tx rings */
  369. static void lance_init_ring(struct net_device *dev)
  370. {
  371. struct lance_private *lp = netdev_priv(dev);
  372. volatile struct lance_init_block *ib;
  373. int leptr;
  374. int i;
  375. ib = (struct lance_init_block *) (dev->mem_start);
  376. /* Lock out other processes while setting up hardware */
  377. netif_stop_queue(dev);
  378. lp->rx_new = lp->tx_new = 0;
  379. lp->rx_old = lp->tx_old = 0;
  380. /* Copy the ethernet address to the lance init block.
  381. * XXX bit 0 of the physical address registers has to be zero
  382. */
  383. ib->phys_addr[0] = dev->dev_addr[0];
  384. ib->phys_addr[1] = dev->dev_addr[1];
  385. ib->phys_addr[4] = dev->dev_addr[2];
  386. ib->phys_addr[5] = dev->dev_addr[3];
  387. ib->phys_addr[8] = dev->dev_addr[4];
  388. ib->phys_addr[9] = dev->dev_addr[5];
  389. /* Setup the initialization block */
  390. /* Setup rx descriptor pointer */
  391. leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
  392. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  393. ib->rx_ptr = leptr;
  394. if (ZERO)
  395. printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
  396. /* Setup tx descriptor pointer */
  397. leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
  398. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  399. ib->tx_ptr = leptr;
  400. if (ZERO)
  401. printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
  402. if (ZERO)
  403. printk("TX rings:\n");
  404. /* Setup the Tx ring entries */
  405. for (i = 0; i < TX_RING_SIZE; i++) {
  406. leptr = (int) lp->tx_buf_ptr_lnc[i];
  407. ib->btx_ring[i].tmd0 = leptr;
  408. ib->btx_ring[i].tmd1_hadr = leptr >> 16;
  409. ib->btx_ring[i].tmd1_bits = 0;
  410. ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
  411. ib->btx_ring[i].misc = 0;
  412. if (i < 3 && ZERO)
  413. printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
  414. }
  415. /* Setup the Rx ring entries */
  416. if (ZERO)
  417. printk("RX rings:\n");
  418. for (i = 0; i < RX_RING_SIZE; i++) {
  419. leptr = (int) lp->rx_buf_ptr_lnc[i];
  420. ib->brx_ring[i].rmd0 = leptr;
  421. ib->brx_ring[i].rmd1_hadr = leptr >> 16;
  422. ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
  423. ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
  424. ib->brx_ring[i].mblength = 0;
  425. if (i < 3 && ZERO)
  426. printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
  427. }
  428. iob();
  429. }
  430. static int init_restart_lance(struct lance_private *lp)
  431. {
  432. volatile struct lance_regs *ll = lp->ll;
  433. int i;
  434. writereg(&ll->rap, LE_CSR0);
  435. writereg(&ll->rdp, LE_C0_INIT);
  436. /* Wait for the lance to complete initialization */
  437. for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
  438. udelay(10);
  439. }
  440. if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
  441. printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
  442. return -1;
  443. }
  444. if ((ll->rdp & LE_C0_ERR)) {
  445. printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
  446. return -1;
  447. }
  448. writereg(&ll->rdp, LE_C0_IDON);
  449. writereg(&ll->rdp, LE_C0_STRT);
  450. writereg(&ll->rdp, LE_C0_INEA);
  451. return 0;
  452. }
  453. static int lance_rx(struct net_device *dev)
  454. {
  455. struct lance_private *lp = netdev_priv(dev);
  456. volatile struct lance_init_block *ib;
  457. volatile struct lance_rx_desc *rd = 0;
  458. unsigned char bits;
  459. int len = 0;
  460. struct sk_buff *skb = 0;
  461. ib = (struct lance_init_block *) (dev->mem_start);
  462. #ifdef TEST_HITS
  463. {
  464. int i;
  465. printk("[");
  466. for (i = 0; i < RX_RING_SIZE; i++) {
  467. if (i == lp->rx_new)
  468. printk("%s", ib->brx_ring[i].rmd1_bits &
  469. LE_R1_OWN ? "_" : "X");
  470. else
  471. printk("%s", ib->brx_ring[i].rmd1_bits &
  472. LE_R1_OWN ? "." : "1");
  473. }
  474. printk("]");
  475. }
  476. #endif
  477. for (rd = &ib->brx_ring[lp->rx_new];
  478. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  479. rd = &ib->brx_ring[lp->rx_new]) {
  480. /* We got an incomplete frame? */
  481. if ((bits & LE_R1_POK) != LE_R1_POK) {
  482. lp->stats.rx_over_errors++;
  483. lp->stats.rx_errors++;
  484. } else if (bits & LE_R1_ERR) {
  485. /* Count only the end frame as a rx error,
  486. * not the beginning
  487. */
  488. if (bits & LE_R1_BUF)
  489. lp->stats.rx_fifo_errors++;
  490. if (bits & LE_R1_CRC)
  491. lp->stats.rx_crc_errors++;
  492. if (bits & LE_R1_OFL)
  493. lp->stats.rx_over_errors++;
  494. if (bits & LE_R1_FRA)
  495. lp->stats.rx_frame_errors++;
  496. if (bits & LE_R1_EOP)
  497. lp->stats.rx_errors++;
  498. } else {
  499. len = (rd->mblength & 0xfff) - 4;
  500. skb = dev_alloc_skb(len + 2);
  501. if (skb == 0) {
  502. printk("%s: Memory squeeze, deferring packet.\n",
  503. dev->name);
  504. lp->stats.rx_dropped++;
  505. rd->mblength = 0;
  506. rd->rmd1_bits = LE_R1_OWN;
  507. lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
  508. return 0;
  509. }
  510. lp->stats.rx_bytes += len;
  511. skb->dev = dev;
  512. skb_reserve(skb, 2); /* 16 byte align */
  513. skb_put(skb, len); /* make room */
  514. cp_from_buf(lp->type, skb->data,
  515. (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
  516. len);
  517. skb->protocol = eth_type_trans(skb, dev);
  518. netif_rx(skb);
  519. dev->last_rx = jiffies;
  520. lp->stats.rx_packets++;
  521. }
  522. /* Return the packet to the pool */
  523. rd->mblength = 0;
  524. rd->length = -RX_BUFF_SIZE | 0xf000;
  525. rd->rmd1_bits = LE_R1_OWN;
  526. lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
  527. }
  528. return 0;
  529. }
  530. static void lance_tx(struct net_device *dev)
  531. {
  532. struct lance_private *lp = netdev_priv(dev);
  533. volatile struct lance_init_block *ib;
  534. volatile struct lance_regs *ll = lp->ll;
  535. volatile struct lance_tx_desc *td;
  536. int i, j;
  537. int status;
  538. ib = (struct lance_init_block *) (dev->mem_start);
  539. j = lp->tx_old;
  540. spin_lock(&lp->lock);
  541. for (i = j; i != lp->tx_new; i = j) {
  542. td = &ib->btx_ring[i];
  543. /* If we hit a packet not owned by us, stop */
  544. if (td->tmd1_bits & LE_T1_OWN)
  545. break;
  546. if (td->tmd1_bits & LE_T1_ERR) {
  547. status = td->misc;
  548. lp->stats.tx_errors++;
  549. if (status & LE_T3_RTY)
  550. lp->stats.tx_aborted_errors++;
  551. if (status & LE_T3_LCOL)
  552. lp->stats.tx_window_errors++;
  553. if (status & LE_T3_CLOS) {
  554. lp->stats.tx_carrier_errors++;
  555. printk("%s: Carrier Lost\n", dev->name);
  556. /* Stop the lance */
  557. writereg(&ll->rap, LE_CSR0);
  558. writereg(&ll->rdp, LE_C0_STOP);
  559. lance_init_ring(dev);
  560. load_csrs(lp);
  561. init_restart_lance(lp);
  562. goto out;
  563. }
  564. /* Buffer errors and underflows turn off the
  565. * transmitter, restart the adapter.
  566. */
  567. if (status & (LE_T3_BUF | LE_T3_UFL)) {
  568. lp->stats.tx_fifo_errors++;
  569. printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  570. dev->name);
  571. /* Stop the lance */
  572. writereg(&ll->rap, LE_CSR0);
  573. writereg(&ll->rdp, LE_C0_STOP);
  574. lance_init_ring(dev);
  575. load_csrs(lp);
  576. init_restart_lance(lp);
  577. goto out;
  578. }
  579. } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
  580. /*
  581. * So we don't count the packet more than once.
  582. */
  583. td->tmd1_bits &= ~(LE_T1_POK);
  584. /* One collision before packet was sent. */
  585. if (td->tmd1_bits & LE_T1_EONE)
  586. lp->stats.collisions++;
  587. /* More than one collision, be optimistic. */
  588. if (td->tmd1_bits & LE_T1_EMORE)
  589. lp->stats.collisions += 2;
  590. lp->stats.tx_packets++;
  591. }
  592. j = (j + 1) & TX_RING_MOD_MASK;
  593. }
  594. lp->tx_old = j;
  595. out:
  596. if (netif_queue_stopped(dev) &&
  597. TX_BUFFS_AVAIL > 0)
  598. netif_wake_queue(dev);
  599. spin_unlock(&lp->lock);
  600. }
  601. static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id,
  602. struct pt_regs *regs)
  603. {
  604. struct net_device *dev = (struct net_device *) dev_id;
  605. printk("%s: DMA error\n", dev->name);
  606. return IRQ_HANDLED;
  607. }
  608. static irqreturn_t
  609. lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
  610. {
  611. struct net_device *dev = (struct net_device *) dev_id;
  612. struct lance_private *lp = netdev_priv(dev);
  613. volatile struct lance_regs *ll = lp->ll;
  614. int csr0;
  615. writereg(&ll->rap, LE_CSR0);
  616. csr0 = ll->rdp;
  617. /* Acknowledge all the interrupt sources ASAP */
  618. writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
  619. if ((csr0 & LE_C0_ERR)) {
  620. /* Clear the error condition */
  621. writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  622. LE_C0_CERR | LE_C0_MERR);
  623. }
  624. if (csr0 & LE_C0_RINT)
  625. lance_rx(dev);
  626. if (csr0 & LE_C0_TINT)
  627. lance_tx(dev);
  628. if (csr0 & LE_C0_BABL)
  629. lp->stats.tx_errors++;
  630. if (csr0 & LE_C0_MISS)
  631. lp->stats.rx_errors++;
  632. if (csr0 & LE_C0_MERR) {
  633. printk("%s: Memory error, status %04x\n", dev->name, csr0);
  634. writereg(&ll->rdp, LE_C0_STOP);
  635. lance_init_ring(dev);
  636. load_csrs(lp);
  637. init_restart_lance(lp);
  638. netif_wake_queue(dev);
  639. }
  640. writereg(&ll->rdp, LE_C0_INEA);
  641. writereg(&ll->rdp, LE_C0_INEA);
  642. return IRQ_HANDLED;
  643. }
  644. struct net_device *last_dev = 0;
  645. static int lance_open(struct net_device *dev)
  646. {
  647. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  648. struct lance_private *lp = netdev_priv(dev);
  649. volatile struct lance_regs *ll = lp->ll;
  650. int status = 0;
  651. last_dev = dev;
  652. /* Stop the Lance */
  653. writereg(&ll->rap, LE_CSR0);
  654. writereg(&ll->rdp, LE_C0_STOP);
  655. /* Set mode and clear multicast filter only at device open,
  656. * so that lance_init_ring() called at any error will not
  657. * forget multicast filters.
  658. *
  659. * BTW it is common bug in all lance drivers! --ANK
  660. */
  661. ib->mode = 0;
  662. ib->filter [0] = 0;
  663. ib->filter [2] = 0;
  664. ib->filter [4] = 0;
  665. ib->filter [6] = 0;
  666. lance_init_ring(dev);
  667. load_csrs(lp);
  668. netif_start_queue(dev);
  669. /* Associate IRQ with lance_interrupt */
  670. if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
  671. printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
  672. return -EAGAIN;
  673. }
  674. if (lp->dma_irq >= 0) {
  675. unsigned long flags;
  676. if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
  677. "lance error", dev)) {
  678. free_irq(dev->irq, dev);
  679. printk("%s: Can't get DMA IRQ %d\n", dev->name,
  680. lp->dma_irq);
  681. return -EAGAIN;
  682. }
  683. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  684. fast_mb();
  685. /* Enable I/O ASIC LANCE DMA. */
  686. ioasic_write(IO_REG_SSR,
  687. ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
  688. fast_mb();
  689. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  690. }
  691. status = init_restart_lance(lp);
  692. return status;
  693. }
  694. static int lance_close(struct net_device *dev)
  695. {
  696. struct lance_private *lp = netdev_priv(dev);
  697. volatile struct lance_regs *ll = lp->ll;
  698. netif_stop_queue(dev);
  699. del_timer_sync(&lp->multicast_timer);
  700. /* Stop the card */
  701. writereg(&ll->rap, LE_CSR0);
  702. writereg(&ll->rdp, LE_C0_STOP);
  703. if (lp->dma_irq >= 0) {
  704. unsigned long flags;
  705. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  706. fast_mb();
  707. /* Disable I/O ASIC LANCE DMA. */
  708. ioasic_write(IO_REG_SSR,
  709. ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
  710. fast_iob();
  711. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  712. free_irq(lp->dma_irq, dev);
  713. }
  714. free_irq(dev->irq, dev);
  715. return 0;
  716. }
  717. static inline int lance_reset(struct net_device *dev)
  718. {
  719. struct lance_private *lp = netdev_priv(dev);
  720. volatile struct lance_regs *ll = lp->ll;
  721. int status;
  722. /* Stop the lance */
  723. writereg(&ll->rap, LE_CSR0);
  724. writereg(&ll->rdp, LE_C0_STOP);
  725. lance_init_ring(dev);
  726. load_csrs(lp);
  727. dev->trans_start = jiffies;
  728. status = init_restart_lance(lp);
  729. return status;
  730. }
  731. static void lance_tx_timeout(struct net_device *dev)
  732. {
  733. struct lance_private *lp = netdev_priv(dev);
  734. volatile struct lance_regs *ll = lp->ll;
  735. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  736. dev->name, ll->rdp);
  737. lance_reset(dev);
  738. netif_wake_queue(dev);
  739. }
  740. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  741. {
  742. struct lance_private *lp = netdev_priv(dev);
  743. volatile struct lance_regs *ll = lp->ll;
  744. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  745. int entry, skblen, len;
  746. skblen = skb->len;
  747. len = skblen;
  748. if (len < ETH_ZLEN) {
  749. skb = skb_padto(skb, ETH_ZLEN);
  750. if (skb == NULL)
  751. return 0;
  752. len = ETH_ZLEN;
  753. }
  754. lp->stats.tx_bytes += len;
  755. entry = lp->tx_new & TX_RING_MOD_MASK;
  756. ib->btx_ring[entry].length = (-len);
  757. ib->btx_ring[entry].misc = 0;
  758. cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
  759. skblen);
  760. /* Clear the slack of the packet, do I need this? */
  761. /* For a firewall it's a good idea - AC */
  762. /*
  763. if (len != skblen)
  764. memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
  765. */
  766. /* Now, give the packet to the lance */
  767. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  768. lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
  769. if (TX_BUFFS_AVAIL <= 0)
  770. netif_stop_queue(dev);
  771. /* Kick the lance: transmit now */
  772. writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
  773. spin_unlock_irq(&lp->lock);
  774. dev->trans_start = jiffies;
  775. dev_kfree_skb(skb);
  776. return 0;
  777. }
  778. static struct net_device_stats *lance_get_stats(struct net_device *dev)
  779. {
  780. struct lance_private *lp = netdev_priv(dev);
  781. return &lp->stats;
  782. }
  783. static void lance_load_multicast(struct net_device *dev)
  784. {
  785. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  786. volatile u16 *mcast_table = (u16 *) & ib->filter;
  787. struct dev_mc_list *dmi = dev->mc_list;
  788. char *addrs;
  789. int i;
  790. u32 crc;
  791. /* set all multicast bits */
  792. if (dev->flags & IFF_ALLMULTI) {
  793. ib->filter[0] = 0xffff;
  794. ib->filter[2] = 0xffff;
  795. ib->filter[4] = 0xffff;
  796. ib->filter[6] = 0xffff;
  797. return;
  798. }
  799. /* clear the multicast filter */
  800. ib->filter[0] = 0;
  801. ib->filter[2] = 0;
  802. ib->filter[4] = 0;
  803. ib->filter[6] = 0;
  804. /* Add addresses */
  805. for (i = 0; i < dev->mc_count; i++) {
  806. addrs = dmi->dmi_addr;
  807. dmi = dmi->next;
  808. /* multicast address? */
  809. if (!(*addrs & 1))
  810. continue;
  811. crc = ether_crc_le(ETH_ALEN, addrs);
  812. crc = crc >> 26;
  813. mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
  814. }
  815. return;
  816. }
  817. static void lance_set_multicast(struct net_device *dev)
  818. {
  819. struct lance_private *lp = netdev_priv(dev);
  820. volatile struct lance_init_block *ib;
  821. volatile struct lance_regs *ll = lp->ll;
  822. ib = (struct lance_init_block *) (dev->mem_start);
  823. if (!netif_running(dev))
  824. return;
  825. if (lp->tx_old != lp->tx_new) {
  826. mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
  827. netif_wake_queue(dev);
  828. return;
  829. }
  830. netif_stop_queue(dev);
  831. writereg(&ll->rap, LE_CSR0);
  832. writereg(&ll->rdp, LE_C0_STOP);
  833. lance_init_ring(dev);
  834. if (dev->flags & IFF_PROMISC) {
  835. ib->mode |= LE_MO_PROM;
  836. } else {
  837. ib->mode &= ~LE_MO_PROM;
  838. lance_load_multicast(dev);
  839. }
  840. load_csrs(lp);
  841. init_restart_lance(lp);
  842. netif_wake_queue(dev);
  843. }
  844. static void lance_set_multicast_retry(unsigned long _opaque)
  845. {
  846. struct net_device *dev = (struct net_device *) _opaque;
  847. lance_set_multicast(dev);
  848. }
  849. static int __init dec_lance_init(const int type, const int slot)
  850. {
  851. static unsigned version_printed;
  852. static const char fmt[] = "declance%d";
  853. char name[10];
  854. struct net_device *dev;
  855. struct lance_private *lp;
  856. volatile struct lance_regs *ll;
  857. int i, ret;
  858. unsigned long esar_base;
  859. unsigned char *esar;
  860. #ifndef CONFIG_TC
  861. system_base = KN01_LANCE_BASE;
  862. #endif
  863. if (dec_lance_debug && version_printed++ == 0)
  864. printk(version);
  865. i = 0;
  866. dev = root_lance_dev;
  867. while (dev) {
  868. i++;
  869. lp = (struct lance_private *)dev->priv;
  870. dev = lp->next;
  871. }
  872. snprintf(name, sizeof(name), fmt, i);
  873. dev = alloc_etherdev(sizeof(struct lance_private));
  874. if (!dev) {
  875. printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
  876. name);
  877. ret = -ENOMEM;
  878. goto err_out;
  879. }
  880. /*
  881. * alloc_etherdev ensures the data structures used by the LANCE
  882. * are aligned.
  883. */
  884. lp = netdev_priv(dev);
  885. spin_lock_init(&lp->lock);
  886. lp->type = type;
  887. lp->slot = slot;
  888. switch (type) {
  889. #ifdef CONFIG_TC
  890. case ASIC_LANCE:
  891. dev->base_addr = system_base + IOASIC_LANCE;
  892. /* buffer space for the on-board LANCE shared memory */
  893. /*
  894. * FIXME: ugly hack!
  895. */
  896. dev->mem_start = KSEG1ADDR(0x00020000);
  897. dev->mem_end = dev->mem_start + 0x00020000;
  898. dev->irq = dec_interrupt[DEC_IRQ_LANCE];
  899. esar_base = system_base + IOASIC_ESAR;
  900. /* Workaround crash with booting KN04 2.1k from Disk */
  901. memset((void *)dev->mem_start, 0,
  902. dev->mem_end - dev->mem_start);
  903. /*
  904. * setup the pointer arrays, this sucks [tm] :-(
  905. */
  906. for (i = 0; i < RX_RING_SIZE; i++) {
  907. lp->rx_buf_ptr_cpu[i] =
  908. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  909. 2 * i * RX_BUFF_SIZE);
  910. lp->rx_buf_ptr_lnc[i] =
  911. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  912. }
  913. for (i = 0; i < TX_RING_SIZE; i++) {
  914. lp->tx_buf_ptr_cpu[i] =
  915. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  916. 2 * RX_RING_SIZE * RX_BUFF_SIZE +
  917. 2 * i * TX_BUFF_SIZE);
  918. lp->tx_buf_ptr_lnc[i] =
  919. (char *)(BUF_OFFSET_LNC +
  920. RX_RING_SIZE * RX_BUFF_SIZE +
  921. i * TX_BUFF_SIZE);
  922. }
  923. /* Setup I/O ASIC LANCE DMA. */
  924. lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
  925. ioasic_write(IO_REG_LANCE_DMA_P,
  926. PHYSADDR(dev->mem_start) << 3);
  927. break;
  928. case PMAD_LANCE:
  929. claim_tc_card(slot);
  930. dev->mem_start = get_tc_base_addr(slot);
  931. dev->base_addr = dev->mem_start + 0x100000;
  932. dev->irq = get_tc_irq_nr(slot);
  933. esar_base = dev->mem_start + 0x1c0002;
  934. lp->dma_irq = -1;
  935. for (i = 0; i < RX_RING_SIZE; i++) {
  936. lp->rx_buf_ptr_cpu[i] =
  937. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  938. i * RX_BUFF_SIZE);
  939. lp->rx_buf_ptr_lnc[i] =
  940. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  941. }
  942. for (i = 0; i < TX_RING_SIZE; i++) {
  943. lp->tx_buf_ptr_cpu[i] =
  944. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  945. RX_RING_SIZE * RX_BUFF_SIZE +
  946. i * TX_BUFF_SIZE);
  947. lp->tx_buf_ptr_lnc[i] =
  948. (char *)(BUF_OFFSET_LNC +
  949. RX_RING_SIZE * RX_BUFF_SIZE +
  950. i * TX_BUFF_SIZE);
  951. }
  952. break;
  953. #endif
  954. case PMAX_LANCE:
  955. dev->irq = dec_interrupt[DEC_IRQ_LANCE];
  956. dev->base_addr = KN01_LANCE_BASE;
  957. dev->mem_start = KN01_LANCE_BASE + 0x01000000;
  958. esar_base = KN01_RTC_BASE + 1;
  959. lp->dma_irq = -1;
  960. /*
  961. * setup the pointer arrays, this sucks [tm] :-(
  962. */
  963. for (i = 0; i < RX_RING_SIZE; i++) {
  964. lp->rx_buf_ptr_cpu[i] =
  965. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  966. 2 * i * RX_BUFF_SIZE);
  967. lp->rx_buf_ptr_lnc[i] =
  968. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  969. }
  970. for (i = 0; i < TX_RING_SIZE; i++) {
  971. lp->tx_buf_ptr_cpu[i] =
  972. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  973. 2 * RX_RING_SIZE * RX_BUFF_SIZE +
  974. 2 * i * TX_BUFF_SIZE);
  975. lp->tx_buf_ptr_lnc[i] =
  976. (char *)(BUF_OFFSET_LNC +
  977. RX_RING_SIZE * RX_BUFF_SIZE +
  978. i * TX_BUFF_SIZE);
  979. }
  980. break;
  981. default:
  982. printk(KERN_ERR "%s: declance_init called with unknown type\n",
  983. name);
  984. ret = -ENODEV;
  985. goto err_out_free_dev;
  986. }
  987. ll = (struct lance_regs *) dev->base_addr;
  988. esar = (unsigned char *) esar_base;
  989. /* prom checks */
  990. /* First, check for test pattern */
  991. if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
  992. esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
  993. printk(KERN_ERR
  994. "%s: Ethernet station address prom not found!\n",
  995. name);
  996. ret = -ENODEV;
  997. goto err_out_free_dev;
  998. }
  999. /* Check the prom contents */
  1000. for (i = 0; i < 8; i++) {
  1001. if (esar[i * 4] != esar[0x3c - i * 4] &&
  1002. esar[i * 4] != esar[0x40 + i * 4] &&
  1003. esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
  1004. printk(KERN_ERR "%s: Something is wrong with the "
  1005. "ethernet station address prom!\n", name);
  1006. ret = -ENODEV;
  1007. goto err_out_free_dev;
  1008. }
  1009. }
  1010. /* Copy the ethernet address to the device structure, later to the
  1011. * lance initialization block so the lance gets it every time it's
  1012. * (re)initialized.
  1013. */
  1014. switch (type) {
  1015. case ASIC_LANCE:
  1016. printk("%s: IOASIC onboard LANCE, addr = ", name);
  1017. break;
  1018. case PMAD_LANCE:
  1019. printk("%s: PMAD-AA, addr = ", name);
  1020. break;
  1021. case PMAX_LANCE:
  1022. printk("%s: PMAX onboard LANCE, addr = ", name);
  1023. break;
  1024. }
  1025. for (i = 0; i < 6; i++) {
  1026. dev->dev_addr[i] = esar[i * 4];
  1027. printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
  1028. }
  1029. printk(" irq = %d\n", dev->irq);
  1030. dev->open = &lance_open;
  1031. dev->stop = &lance_close;
  1032. dev->hard_start_xmit = &lance_start_xmit;
  1033. dev->tx_timeout = &lance_tx_timeout;
  1034. dev->watchdog_timeo = 5*HZ;
  1035. dev->get_stats = &lance_get_stats;
  1036. dev->set_multicast_list = &lance_set_multicast;
  1037. /* lp->ll is the location of the registers for lance card */
  1038. lp->ll = ll;
  1039. /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
  1040. * specification.
  1041. */
  1042. lp->busmaster_regval = 0;
  1043. dev->dma = 0;
  1044. /* We cannot sleep if the chip is busy during a
  1045. * multicast list update event, because such events
  1046. * can occur from interrupts (ex. IPv6). So we
  1047. * use a timer to try again later when necessary. -DaveM
  1048. */
  1049. init_timer(&lp->multicast_timer);
  1050. lp->multicast_timer.data = (unsigned long) dev;
  1051. lp->multicast_timer.function = &lance_set_multicast_retry;
  1052. ret = register_netdev(dev);
  1053. if (ret) {
  1054. printk(KERN_ERR
  1055. "%s: Unable to register netdev, aborting.\n", name);
  1056. goto err_out_free_dev;
  1057. }
  1058. lp->next = root_lance_dev;
  1059. root_lance_dev = dev;
  1060. printk("%s: registered as %s.\n", name, dev->name);
  1061. return 0;
  1062. err_out_free_dev:
  1063. kfree(dev);
  1064. err_out:
  1065. return ret;
  1066. }
  1067. /* Find all the lance cards on the system and initialize them */
  1068. static int __init dec_lance_probe(void)
  1069. {
  1070. int count = 0;
  1071. /* Scan slots for PMAD-AA cards first. */
  1072. #ifdef CONFIG_TC
  1073. if (TURBOCHANNEL) {
  1074. int slot;
  1075. while ((slot = search_tc_card("PMAD-AA")) >= 0) {
  1076. if (dec_lance_init(PMAD_LANCE, slot) < 0)
  1077. break;
  1078. count++;
  1079. }
  1080. }
  1081. #endif
  1082. /* Then handle onboard devices. */
  1083. if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
  1084. if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
  1085. #ifdef CONFIG_TC
  1086. if (dec_lance_init(ASIC_LANCE, -1) >= 0)
  1087. count++;
  1088. #endif
  1089. } else if (!TURBOCHANNEL) {
  1090. if (dec_lance_init(PMAX_LANCE, -1) >= 0)
  1091. count++;
  1092. }
  1093. }
  1094. return (count > 0) ? 0 : -ENODEV;
  1095. }
  1096. static void __exit dec_lance_cleanup(void)
  1097. {
  1098. while (root_lance_dev) {
  1099. struct net_device *dev = root_lance_dev;
  1100. struct lance_private *lp = netdev_priv(dev);
  1101. unregister_netdev(dev);
  1102. #ifdef CONFIG_TC
  1103. if (lp->slot >= 0)
  1104. release_tc_card(lp->slot);
  1105. #endif
  1106. root_lance_dev = lp->next;
  1107. free_netdev(dev);
  1108. }
  1109. }
  1110. module_init(dec_lance_probe);
  1111. module_exit(dec_lance_cleanup);