pci-dma_32.c 4.1 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * On i386 there is no hardware dynamic DMA address translation,
  5. * so consistent alloc/free are merely page allocation/freeing.
  6. * The rest of the dynamic DMA mapping interface is implemented
  7. * in asm/pci.h.
  8. */
  9. #include <linux/types.h>
  10. #include <linux/mm.h>
  11. #include <linux/string.h>
  12. #include <linux/pci.h>
  13. #include <linux/module.h>
  14. #include <asm/io.h>
  15. /* Dummy device used for NULL arguments (normally ISA). Better would
  16. be probably a smaller DMA mask, but this is bug-to-bug compatible
  17. to i386. */
  18. struct device fallback_dev = {
  19. .bus_id = "fallback device",
  20. .coherent_dma_mask = DMA_32BIT_MASK,
  21. .dma_mask = &fallback_dev.coherent_dma_mask,
  22. };
  23. static int dma_alloc_from_coherent_mem(struct device *dev, ssize_t size,
  24. dma_addr_t *dma_handle, void **ret)
  25. {
  26. struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
  27. int order = get_order(size);
  28. if (mem) {
  29. int page = bitmap_find_free_region(mem->bitmap, mem->size,
  30. order);
  31. if (page >= 0) {
  32. *dma_handle = mem->device_base + (page << PAGE_SHIFT);
  33. *ret = mem->virt_base + (page << PAGE_SHIFT);
  34. memset(*ret, 0, size);
  35. }
  36. if (mem->flags & DMA_MEMORY_EXCLUSIVE)
  37. *ret = NULL;
  38. }
  39. return (mem != NULL);
  40. }
  41. static int dma_release_coherent(struct device *dev, int order, void *vaddr)
  42. {
  43. struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
  44. if (mem && vaddr >= mem->virt_base && vaddr <
  45. (mem->virt_base + (mem->size << PAGE_SHIFT))) {
  46. int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
  47. bitmap_release_region(mem->bitmap, page, order);
  48. return 1;
  49. }
  50. return 0;
  51. }
  52. /* Allocate DMA memory on node near device */
  53. noinline struct page *
  54. dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
  55. {
  56. int node;
  57. node = dev_to_node(dev);
  58. return alloc_pages_node(node, gfp, order);
  59. }
  60. void *dma_alloc_coherent(struct device *dev, size_t size,
  61. dma_addr_t *dma_handle, gfp_t gfp)
  62. {
  63. void *ret = NULL;
  64. struct page *page;
  65. dma_addr_t bus;
  66. int order = get_order(size);
  67. unsigned long dma_mask = 0;
  68. /* ignore region specifiers */
  69. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
  70. if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &ret))
  71. return ret;
  72. if (!dev)
  73. dev = &fallback_dev;
  74. dma_mask = dev->coherent_dma_mask;
  75. if (dma_mask == 0)
  76. dma_mask = DMA_32BIT_MASK;
  77. /* Don't invoke OOM killer */
  78. gfp |= __GFP_NORETRY;
  79. again:
  80. page = dma_alloc_pages(dev, gfp, order);
  81. if (page == NULL)
  82. return NULL;
  83. {
  84. int high, mmu;
  85. bus = page_to_phys(page);
  86. ret = page_address(page);
  87. high = (bus + size) >= dma_mask;
  88. mmu = high;
  89. if (force_iommu && !(gfp & GFP_DMA))
  90. mmu = 1;
  91. else if (high) {
  92. free_pages((unsigned long)ret,
  93. get_order(size));
  94. /* Don't use the 16MB ZONE_DMA unless absolutely
  95. needed. It's better to use remapping first. */
  96. if (dma_mask < DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
  97. gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
  98. goto again;
  99. }
  100. /* Let low level make its own zone decisions */
  101. gfp &= ~(GFP_DMA32|GFP_DMA);
  102. if (dma_ops->alloc_coherent)
  103. return dma_ops->alloc_coherent(dev, size,
  104. dma_handle, gfp);
  105. return NULL;
  106. }
  107. memset(ret, 0, size);
  108. if (!mmu) {
  109. *dma_handle = bus;
  110. return ret;
  111. }
  112. }
  113. if (dma_ops->alloc_coherent) {
  114. free_pages((unsigned long)ret, get_order(size));
  115. gfp &= ~(GFP_DMA|GFP_DMA32);
  116. return dma_ops->alloc_coherent(dev, size, dma_handle, gfp);
  117. }
  118. if (dma_ops->map_simple) {
  119. *dma_handle = dma_ops->map_simple(dev, virt_to_phys(ret),
  120. size,
  121. PCI_DMA_BIDIRECTIONAL);
  122. if (*dma_handle != bad_dma_address)
  123. return ret;
  124. }
  125. if (panic_on_overflow)
  126. panic("dma_alloc_coherent: IOMMU overflow by %lu bytes\n",
  127. (unsigned long)size);
  128. free_pages((unsigned long)ret, get_order(size));
  129. return NULL;
  130. }
  131. EXPORT_SYMBOL(dma_alloc_coherent);
  132. void dma_free_coherent(struct device *dev, size_t size,
  133. void *vaddr, dma_addr_t dma_handle)
  134. {
  135. int order = get_order(size);
  136. WARN_ON(irqs_disabled()); /* for portability */
  137. if (dma_release_coherent(dev, order, vaddr))
  138. return;
  139. if (dma_ops->unmap_single)
  140. dma_ops->unmap_single(dev, dma_handle, size, 0);
  141. free_pages((unsigned long)vaddr, order);
  142. }
  143. EXPORT_SYMBOL(dma_free_coherent);