cm-x2xx.c 17 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/cm-x2xx.c
  3. *
  4. * Copyright (C) 2007, 2008 CompuLab, Ltd.
  5. * Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/platform_device.h>
  12. #include <linux/sysdev.h>
  13. #include <linux/irq.h>
  14. #include <linux/gpio.h>
  15. #include <linux/dm9000.h>
  16. #include <linux/rtc-v3020.h>
  17. #include <video/mbxfb.h>
  18. #include <linux/leds.h>
  19. #include <asm/mach/arch.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/map.h>
  22. #include <mach/pxa2xx-regs.h>
  23. #include <mach/mfp-pxa27x.h>
  24. #include <mach/pxa-regs.h>
  25. #include <mach/audio.h>
  26. #include <mach/pxafb.h>
  27. #include <mach/ohci.h>
  28. #include <mach/mmc.h>
  29. #include <mach/bitfield.h>
  30. #include <asm/hardware/it8152.h>
  31. #include "generic.h"
  32. #include "cm-x2xx-pci.h"
  33. /* virtual addresses for statically mapped regions */
  34. #define CMX2XX_VIRT_BASE (0xe8000000)
  35. #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
  36. #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
  37. #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
  38. /* leds */
  39. #define CMX270_GPIO_RED (93)
  40. #define CMX270_GPIO_GREEN (94)
  41. /* GPIO IRQ usage */
  42. #define GPIO10_ETHIRQ (10)
  43. #define CMX270_GPIO_IT8152_IRQ (22)
  44. #define GPIO83_MMC_IRQ (83)
  45. #define GPIO95_GFXIRQ (95)
  46. #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
  47. #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
  48. #define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
  49. /* MMC power enable */
  50. #define GPIO105_MMC_POWER (105)
  51. static unsigned long cmx270_pin_config[] = {
  52. /* AC'97 */
  53. GPIO28_AC97_BITCLK,
  54. GPIO29_AC97_SDATA_IN_0,
  55. GPIO30_AC97_SDATA_OUT,
  56. GPIO31_AC97_SYNC,
  57. GPIO98_AC97_SYSCLK,
  58. GPIO113_AC97_nRESET,
  59. /* BTUART */
  60. GPIO42_BTUART_RXD,
  61. GPIO43_BTUART_TXD,
  62. GPIO44_BTUART_CTS,
  63. GPIO45_BTUART_RTS,
  64. /* STUART */
  65. GPIO46_STUART_RXD,
  66. GPIO47_STUART_TXD,
  67. /* MCI controller */
  68. GPIO32_MMC_CLK,
  69. GPIO112_MMC_CMD,
  70. GPIO92_MMC_DAT_0,
  71. GPIO109_MMC_DAT_1,
  72. GPIO110_MMC_DAT_2,
  73. GPIO111_MMC_DAT_3,
  74. /* LCD */
  75. GPIO58_LCD_LDD_0,
  76. GPIO59_LCD_LDD_1,
  77. GPIO60_LCD_LDD_2,
  78. GPIO61_LCD_LDD_3,
  79. GPIO62_LCD_LDD_4,
  80. GPIO63_LCD_LDD_5,
  81. GPIO64_LCD_LDD_6,
  82. GPIO65_LCD_LDD_7,
  83. GPIO66_LCD_LDD_8,
  84. GPIO67_LCD_LDD_9,
  85. GPIO68_LCD_LDD_10,
  86. GPIO69_LCD_LDD_11,
  87. GPIO70_LCD_LDD_12,
  88. GPIO71_LCD_LDD_13,
  89. GPIO72_LCD_LDD_14,
  90. GPIO73_LCD_LDD_15,
  91. GPIO74_LCD_FCLK,
  92. GPIO75_LCD_LCLK,
  93. GPIO76_LCD_PCLK,
  94. GPIO77_LCD_BIAS,
  95. /* I2C */
  96. GPIO117_I2C_SCL,
  97. GPIO118_I2C_SDA,
  98. /* SSP1 */
  99. GPIO23_SSP1_SCLK,
  100. GPIO24_SSP1_SFRM,
  101. GPIO25_SSP1_TXD,
  102. GPIO26_SSP1_RXD,
  103. /* SSP2 */
  104. GPIO19_SSP2_SCLK,
  105. GPIO14_SSP2_SFRM,
  106. GPIO87_SSP2_TXD,
  107. GPIO88_SSP2_RXD,
  108. /* PC Card */
  109. GPIO48_nPOE,
  110. GPIO49_nPWE,
  111. GPIO50_nPIOR,
  112. GPIO51_nPIOW,
  113. GPIO85_nPCE_1,
  114. GPIO54_nPCE_2,
  115. GPIO55_nPREG,
  116. GPIO56_nPWAIT,
  117. GPIO57_nIOIS16,
  118. /* SDRAM and local bus */
  119. GPIO15_nCS_1,
  120. GPIO78_nCS_2,
  121. GPIO79_nCS_3,
  122. GPIO80_nCS_4,
  123. GPIO33_nCS_5,
  124. GPIO49_nPWE,
  125. GPIO18_RDY,
  126. /* GPIO */
  127. GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
  128. GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */
  129. GPIO53_GPIO, /* PC card reset */
  130. /* NAND controls */
  131. GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
  132. GPIO89_GPIO, /* NAND Ready/Busy */
  133. /* interrupts */
  134. GPIO10_GPIO, /* DM9000 interrupt */
  135. GPIO83_GPIO, /* MMC card detect */
  136. };
  137. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  138. static struct resource cmx270_dm9000_resource[] = {
  139. [0] = {
  140. .start = CMX270_DM9000_PHYS_BASE,
  141. .end = CMX270_DM9000_PHYS_BASE + 3,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. [1] = {
  145. .start = CMX270_DM9000_PHYS_BASE + 8,
  146. .end = CMX270_DM9000_PHYS_BASE + 8 + 500,
  147. .flags = IORESOURCE_MEM,
  148. },
  149. [2] = {
  150. .start = CMX270_ETHIRQ,
  151. .end = CMX270_ETHIRQ,
  152. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  153. }
  154. };
  155. static struct dm9000_plat_data cmx270_dm9000_platdata = {
  156. .flags = DM9000_PLATF_32BITONLY,
  157. };
  158. static struct platform_device cmx2xx_dm9000_device = {
  159. .name = "dm9000",
  160. .id = 0,
  161. .num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
  162. .dev = {
  163. .platform_data = &cmx270_dm9000_platdata,
  164. }
  165. };
  166. static void __init cmx2xx_init_dm9000(void)
  167. {
  168. cmx2xx_dm9000_device.resource = cmx270_dm9000_resource,
  169. platform_device_register(&cmx2xx_dm9000_device);
  170. }
  171. #else
  172. static inline void cmx2xx_init_dm9000(void) {}
  173. #endif
  174. /* UCB1400 touchscreen controller */
  175. #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
  176. static struct platform_device cmx2xx_ts_device = {
  177. .name = "ucb1400_ts",
  178. .id = -1,
  179. };
  180. static void __init cmx2xx_init_touchscreen(void)
  181. {
  182. platform_device_register(&cmx2xx_ts_device);
  183. }
  184. #else
  185. static inline void cmx2xx_init_touchscreen(void) {}
  186. #endif
  187. /* V3020 RTC */
  188. #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
  189. static struct resource cmx270_v3020_resource[] = {
  190. [0] = {
  191. .start = RTC_PHYS_BASE,
  192. .end = RTC_PHYS_BASE + 4,
  193. .flags = IORESOURCE_MEM,
  194. },
  195. };
  196. struct v3020_platform_data cmx270_v3020_pdata = {
  197. .leftshift = 16,
  198. };
  199. static struct platform_device cmx270_rtc_device = {
  200. .name = "v3020",
  201. .num_resources = ARRAY_SIZE(cmx270_v3020_resource),
  202. .resource = cmx270_v3020_resource,
  203. .id = -1,
  204. .dev = {
  205. .platform_data = &cmx270_v3020_pdata,
  206. }
  207. };
  208. static void __init cmx270_init_rtc(void)
  209. {
  210. platform_device_register(&cmx270_rtc_device);
  211. }
  212. #else
  213. static inline void cmx2xx_init_rtc(void) {}
  214. #endif
  215. /* CM-X270 LEDs */
  216. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  217. static struct gpio_led cmx2xx_leds[] = {
  218. [0] = {
  219. .name = "cm-x2xx:red",
  220. .default_trigger = "nand-disk",
  221. .active_low = 1,
  222. },
  223. [1] = {
  224. .name = "cm-x2xx:green",
  225. .default_trigger = "heartbeat",
  226. .active_low = 1,
  227. },
  228. };
  229. static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
  230. .num_leds = ARRAY_SIZE(cmx2xx_leds),
  231. .leds = cmx2xx_leds,
  232. };
  233. static struct platform_device cmx2xx_led_device = {
  234. .name = "leds-gpio",
  235. .id = -1,
  236. .dev = {
  237. .platform_data = &cmx2xx_gpio_led_pdata,
  238. },
  239. };
  240. static void __init cmx2xx_init_leds(void)
  241. {
  242. cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
  243. cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
  244. platform_device_register(&cmx2xx_led_device);
  245. }
  246. #else
  247. static inline void cmx2xx_init_leds(void) {}
  248. #endif
  249. /* 2700G graphics */
  250. #if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
  251. static u64 fb_dma_mask = ~(u64)0;
  252. static struct resource cmx270_2700G_resource[] = {
  253. /* frame buffer memory including ODFB and External SDRAM */
  254. [0] = {
  255. .start = PXA_CS2_PHYS,
  256. .end = PXA_CS2_PHYS + 0x01ffffff,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. /* Marathon registers */
  260. [1] = {
  261. .start = PXA_CS2_PHYS + 0x03fe0000,
  262. .end = PXA_CS2_PHYS + 0x03ffffff,
  263. .flags = IORESOURCE_MEM,
  264. },
  265. };
  266. static unsigned long save_lcd_regs[10];
  267. static int cmx270_marathon_probe(struct fb_info *fb)
  268. {
  269. /* save PXA-270 pin settings before enabling 2700G */
  270. save_lcd_regs[0] = GPDR1;
  271. save_lcd_regs[1] = GPDR2;
  272. save_lcd_regs[2] = GAFR1_U;
  273. save_lcd_regs[3] = GAFR2_L;
  274. save_lcd_regs[4] = GAFR2_U;
  275. /* Disable PXA-270 on-chip controller driving pins */
  276. GPDR1 &= ~(0xfc000000);
  277. GPDR2 &= ~(0x00c03fff);
  278. GAFR1_U &= ~(0xfff00000);
  279. GAFR2_L &= ~(0x0fffffff);
  280. GAFR2_U &= ~(0x0000f000);
  281. return 0;
  282. }
  283. static int cmx270_marathon_remove(struct fb_info *fb)
  284. {
  285. GPDR1 = save_lcd_regs[0];
  286. GPDR2 = save_lcd_regs[1];
  287. GAFR1_U = save_lcd_regs[2];
  288. GAFR2_L = save_lcd_regs[3];
  289. GAFR2_U = save_lcd_regs[4];
  290. return 0;
  291. }
  292. static struct mbxfb_platform_data cmx270_2700G_data = {
  293. .xres = {
  294. .min = 240,
  295. .max = 1200,
  296. .defval = 640,
  297. },
  298. .yres = {
  299. .min = 240,
  300. .max = 1200,
  301. .defval = 480,
  302. },
  303. .bpp = {
  304. .min = 16,
  305. .max = 32,
  306. .defval = 16,
  307. },
  308. .memsize = 8*1024*1024,
  309. .probe = cmx270_marathon_probe,
  310. .remove = cmx270_marathon_remove,
  311. };
  312. static struct platform_device cmx270_2700G = {
  313. .name = "mbx-fb",
  314. .dev = {
  315. .platform_data = &cmx270_2700G_data,
  316. .dma_mask = &fb_dma_mask,
  317. .coherent_dma_mask = 0xffffffff,
  318. },
  319. .num_resources = ARRAY_SIZE(cmx270_2700G_resource),
  320. .resource = cmx270_2700G_resource,
  321. .id = -1,
  322. };
  323. static void __init cmx270_init_2700G(void)
  324. {
  325. platform_device_register(&cmx270_2700G);
  326. }
  327. #else
  328. static inline void cmx270_init_2700G(void) {}
  329. #endif
  330. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  331. /*
  332. Display definitions
  333. keep these for backwards compatibility, although symbolic names (as
  334. e.g. in lpd270.c) looks better
  335. */
  336. #define MTYPE_STN320x240 0
  337. #define MTYPE_TFT640x480 1
  338. #define MTYPE_CRT640x480 2
  339. #define MTYPE_CRT800x600 3
  340. #define MTYPE_TFT320x240 6
  341. #define MTYPE_STN640x480 7
  342. static struct pxafb_mode_info generic_stn_320x240_mode = {
  343. .pixclock = 76923,
  344. .bpp = 8,
  345. .xres = 320,
  346. .yres = 240,
  347. .hsync_len = 3,
  348. .vsync_len = 2,
  349. .left_margin = 3,
  350. .upper_margin = 0,
  351. .right_margin = 3,
  352. .lower_margin = 0,
  353. .sync = (FB_SYNC_HOR_HIGH_ACT |
  354. FB_SYNC_VERT_HIGH_ACT),
  355. .cmap_greyscale = 0,
  356. };
  357. static struct pxafb_mach_info generic_stn_320x240 = {
  358. .modes = &generic_stn_320x240_mode,
  359. .num_modes = 1,
  360. .lccr0 = 0,
  361. .lccr3 = (LCCR3_PixClkDiv(0x03) |
  362. LCCR3_Acb(0xff) |
  363. LCCR3_PCP),
  364. .cmap_inverse = 0,
  365. .cmap_static = 0,
  366. };
  367. static struct pxafb_mode_info generic_tft_640x480_mode = {
  368. .pixclock = 38461,
  369. .bpp = 8,
  370. .xres = 640,
  371. .yres = 480,
  372. .hsync_len = 60,
  373. .vsync_len = 2,
  374. .left_margin = 70,
  375. .upper_margin = 10,
  376. .right_margin = 70,
  377. .lower_margin = 5,
  378. .sync = 0,
  379. .cmap_greyscale = 0,
  380. };
  381. static struct pxafb_mach_info generic_tft_640x480 = {
  382. .modes = &generic_tft_640x480_mode,
  383. .num_modes = 1,
  384. .lccr0 = (LCCR0_PAS),
  385. .lccr3 = (LCCR3_PixClkDiv(0x01) |
  386. LCCR3_Acb(0xff) |
  387. LCCR3_PCP),
  388. .cmap_inverse = 0,
  389. .cmap_static = 0,
  390. };
  391. static struct pxafb_mode_info generic_crt_640x480_mode = {
  392. .pixclock = 38461,
  393. .bpp = 8,
  394. .xres = 640,
  395. .yres = 480,
  396. .hsync_len = 63,
  397. .vsync_len = 2,
  398. .left_margin = 81,
  399. .upper_margin = 33,
  400. .right_margin = 16,
  401. .lower_margin = 10,
  402. .sync = (FB_SYNC_HOR_HIGH_ACT |
  403. FB_SYNC_VERT_HIGH_ACT),
  404. .cmap_greyscale = 0,
  405. };
  406. static struct pxafb_mach_info generic_crt_640x480 = {
  407. .modes = &generic_crt_640x480_mode,
  408. .num_modes = 1,
  409. .lccr0 = (LCCR0_PAS),
  410. .lccr3 = (LCCR3_PixClkDiv(0x01) |
  411. LCCR3_Acb(0xff)),
  412. .cmap_inverse = 0,
  413. .cmap_static = 0,
  414. };
  415. static struct pxafb_mode_info generic_crt_800x600_mode = {
  416. .pixclock = 28846,
  417. .bpp = 8,
  418. .xres = 800,
  419. .yres = 600,
  420. .hsync_len = 63,
  421. .vsync_len = 2,
  422. .left_margin = 26,
  423. .upper_margin = 21,
  424. .right_margin = 26,
  425. .lower_margin = 11,
  426. .sync = (FB_SYNC_HOR_HIGH_ACT |
  427. FB_SYNC_VERT_HIGH_ACT),
  428. .cmap_greyscale = 0,
  429. };
  430. static struct pxafb_mach_info generic_crt_800x600 = {
  431. .modes = &generic_crt_800x600_mode,
  432. .num_modes = 1,
  433. .lccr0 = (LCCR0_PAS),
  434. .lccr3 = (LCCR3_PixClkDiv(0x02) |
  435. LCCR3_Acb(0xff)),
  436. .cmap_inverse = 0,
  437. .cmap_static = 0,
  438. };
  439. static struct pxafb_mode_info generic_tft_320x240_mode = {
  440. .pixclock = 134615,
  441. .bpp = 16,
  442. .xres = 320,
  443. .yres = 240,
  444. .hsync_len = 63,
  445. .vsync_len = 7,
  446. .left_margin = 75,
  447. .upper_margin = 0,
  448. .right_margin = 15,
  449. .lower_margin = 15,
  450. .sync = 0,
  451. .cmap_greyscale = 0,
  452. };
  453. static struct pxafb_mach_info generic_tft_320x240 = {
  454. .modes = &generic_tft_320x240_mode,
  455. .num_modes = 1,
  456. .lccr0 = (LCCR0_PAS),
  457. .lccr3 = (LCCR3_PixClkDiv(0x06) |
  458. LCCR3_Acb(0xff) |
  459. LCCR3_PCP),
  460. .cmap_inverse = 0,
  461. .cmap_static = 0,
  462. };
  463. static struct pxafb_mode_info generic_stn_640x480_mode = {
  464. .pixclock = 57692,
  465. .bpp = 8,
  466. .xres = 640,
  467. .yres = 480,
  468. .hsync_len = 4,
  469. .vsync_len = 2,
  470. .left_margin = 10,
  471. .upper_margin = 5,
  472. .right_margin = 10,
  473. .lower_margin = 5,
  474. .sync = (FB_SYNC_HOR_HIGH_ACT |
  475. FB_SYNC_VERT_HIGH_ACT),
  476. .cmap_greyscale = 0,
  477. };
  478. static struct pxafb_mach_info generic_stn_640x480 = {
  479. .modes = &generic_stn_640x480_mode,
  480. .num_modes = 1,
  481. .lccr0 = 0,
  482. .lccr3 = (LCCR3_PixClkDiv(0x02) |
  483. LCCR3_Acb(0xff)),
  484. .cmap_inverse = 0,
  485. .cmap_static = 0,
  486. };
  487. static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
  488. static int __init cmx2xx_set_display(char *str)
  489. {
  490. int disp_type = simple_strtol(str, NULL, 0);
  491. switch (disp_type) {
  492. case MTYPE_STN320x240:
  493. cmx2xx_display = &generic_stn_320x240;
  494. break;
  495. case MTYPE_TFT640x480:
  496. cmx2xx_display = &generic_tft_640x480;
  497. break;
  498. case MTYPE_CRT640x480:
  499. cmx2xx_display = &generic_crt_640x480;
  500. break;
  501. case MTYPE_CRT800x600:
  502. cmx2xx_display = &generic_crt_800x600;
  503. break;
  504. case MTYPE_TFT320x240:
  505. cmx2xx_display = &generic_tft_320x240;
  506. break;
  507. case MTYPE_STN640x480:
  508. cmx2xx_display = &generic_stn_640x480;
  509. break;
  510. default: /* fallback to CRT 640x480 */
  511. cmx2xx_display = &generic_crt_640x480;
  512. break;
  513. }
  514. return 1;
  515. }
  516. /*
  517. This should be done really early to get proper configuration for
  518. frame buffer.
  519. Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
  520. has limitied line length for kernel command line, and also it will
  521. break compatibitlty with proprietary releases already in field.
  522. */
  523. __setup("monitor=", cmx2xx_set_display);
  524. static void __init cmx2xx_init_display(void)
  525. {
  526. set_pxa_fb_info(cmx2xx_display);
  527. }
  528. #else
  529. static inline void cmx2xx_init_display(void) {}
  530. #endif
  531. /* PXA27x OHCI controller setup */
  532. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  533. static int cmx270_ohci_init(struct device *dev)
  534. {
  535. /* Set the Power Control Polarity Low */
  536. UHCHR = (UHCHR | UHCHR_PCPL) &
  537. ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
  538. return 0;
  539. }
  540. static struct pxaohci_platform_data cmx270_ohci_platform_data = {
  541. .port_mode = PMM_PERPORT_MODE,
  542. .init = cmx270_ohci_init,
  543. };
  544. static void __init cmx270_init_ohci(void)
  545. {
  546. pxa_set_ohci_info(&cmx270_ohci_platform_data);
  547. }
  548. #else
  549. static inline void cmx270_init_ohci(void) {}
  550. #endif
  551. #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
  552. static int cmx270_mci_init(struct device *dev,
  553. irq_handler_t cmx270_detect_int,
  554. void *data)
  555. {
  556. int err;
  557. err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
  558. if (err) {
  559. dev_warn(dev, "power gpio unavailable\n");
  560. return err;
  561. }
  562. gpio_direction_output(GPIO105_MMC_POWER, 0);
  563. err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
  564. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  565. "MMC card detect", data);
  566. if (err) {
  567. gpio_free(GPIO105_MMC_POWER);
  568. dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
  569. " request MMC card detect IRQ\n");
  570. }
  571. return err;
  572. }
  573. static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
  574. {
  575. struct pxamci_platform_data *p_d = dev->platform_data;
  576. if ((1 << vdd) & p_d->ocr_mask) {
  577. dev_dbg(dev, "power on\n");
  578. gpio_set_value(GPIO105_MMC_POWER, 0);
  579. } else {
  580. gpio_set_value(GPIO105_MMC_POWER, 1);
  581. dev_dbg(dev, "power off\n");
  582. }
  583. }
  584. static void cmx270_mci_exit(struct device *dev, void *data)
  585. {
  586. free_irq(CMX270_MMC_IRQ, data);
  587. gpio_free(GPIO105_MMC_POWER);
  588. }
  589. static struct pxamci_platform_data cmx270_mci_platform_data = {
  590. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  591. .init = cmx270_mci_init,
  592. .setpower = cmx270_mci_setpower,
  593. .exit = cmx270_mci_exit,
  594. };
  595. static void __init cmx270_init_mmc(void)
  596. {
  597. pxa_set_mci_info(&cmx270_mci_platform_data);
  598. }
  599. #else
  600. static inline void cmx270_init_mmc(void) {}
  601. #endif
  602. #ifdef CONFIG_PM
  603. static unsigned long sleep_save_msc[10];
  604. static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state)
  605. {
  606. cmx2xx_pci_suspend();
  607. /* save MSC registers */
  608. sleep_save_msc[0] = MSC0;
  609. sleep_save_msc[1] = MSC1;
  610. sleep_save_msc[2] = MSC2;
  611. /* setup power saving mode registers */
  612. PCFR = 0x0;
  613. PSLR = 0xff400000;
  614. PMCR = 0x00000005;
  615. PWER = 0x80000000;
  616. PFER = 0x00000000;
  617. PRER = 0x00000000;
  618. PGSR0 = 0xC0018800;
  619. PGSR1 = 0x004F0002;
  620. PGSR2 = 0x6021C000;
  621. PGSR3 = 0x00020000;
  622. return 0;
  623. }
  624. static int cmx2xx_resume(struct sys_device *dev)
  625. {
  626. cmx2xx_pci_resume();
  627. /* restore MSC registers */
  628. MSC0 = sleep_save_msc[0];
  629. MSC1 = sleep_save_msc[1];
  630. MSC2 = sleep_save_msc[2];
  631. return 0;
  632. }
  633. static struct sysdev_class cmx2xx_pm_sysclass = {
  634. .name = "pm",
  635. .resume = cmx2xx_resume,
  636. .suspend = cmx2xx_suspend,
  637. };
  638. static struct sys_device cmx2xx_pm_device = {
  639. .cls = &cmx2xx_pm_sysclass,
  640. };
  641. static int __init cmx2xx_pm_init(void)
  642. {
  643. int error;
  644. error = sysdev_class_register(&cmx2xx_pm_sysclass);
  645. if (error == 0)
  646. error = sysdev_register(&cmx2xx_pm_device);
  647. return error;
  648. }
  649. #else
  650. static int __init cmx2xx_pm_init(void) { return 0; }
  651. #endif
  652. #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
  653. static void __init cmx2xx_init_ac97(void)
  654. {
  655. pxa_set_ac97_info(NULL);
  656. }
  657. #else
  658. static inline void cmx2xx_init_ac97(void) {}
  659. #endif
  660. static void __init cmx270_init(void)
  661. {
  662. pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
  663. cmx270_init_rtc();
  664. cmx270_init_mmc();
  665. cmx270_init_ohci();
  666. cmx270_init_2700G();
  667. }
  668. static void __init cmx2xx_init(void)
  669. {
  670. cmx2xx_pm_init();
  671. cmx270_init();
  672. cmx2xx_init_dm9000();
  673. cmx2xx_init_display();
  674. cmx2xx_init_ac97();
  675. cmx2xx_init_touchscreen();
  676. cmx2xx_init_leds();
  677. }
  678. static void __init cmx2xx_init_irq(void)
  679. {
  680. pxa27x_init_irq();
  681. cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
  682. }
  683. #ifdef CONFIG_PCI
  684. /* Map PCI companion statically */
  685. static struct map_desc cmx2xx_io_desc[] __initdata = {
  686. [0] = { /* PCI bridge */
  687. .virtual = CMX2XX_IT8152_VIRT,
  688. .pfn = __phys_to_pfn(PXA_CS4_PHYS),
  689. .length = SZ_64M,
  690. .type = MT_DEVICE
  691. },
  692. };
  693. static void __init cmx2xx_map_io(void)
  694. {
  695. pxa_map_io();
  696. iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
  697. it8152_base_address = CMX2XX_IT8152_VIRT;
  698. }
  699. #else
  700. static void __init cmx2xx_map_io(void)
  701. {
  702. pxa_map_io();
  703. }
  704. #endif
  705. MACHINE_START(ARMCORE, "Compulab CM-X2XX")
  706. .boot_params = 0xa0000100,
  707. .phys_io = 0x40000000,
  708. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  709. .map_io = cmx2xx_map_io,
  710. .init_irq = cmx2xx_init_irq,
  711. .timer = &pxa_timer,
  712. .init_machine = cmx2xx_init,
  713. MACHINE_END