cx88-video.c 55 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/delay.h>
  37. #include <linux/kthread.h>
  38. #include <asm/div64.h>
  39. #include "cx88.h"
  40. #include <media/v4l2-common.h>
  41. #include <media/v4l2-ioctl.h>
  42. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  43. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  44. MODULE_LICENSE("GPL");
  45. /* ------------------------------------------------------------------ */
  46. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  47. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  48. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. module_param_array(video_nr, int, NULL, 0444);
  50. module_param_array(vbi_nr, int, NULL, 0444);
  51. module_param_array(radio_nr, int, NULL, 0444);
  52. MODULE_PARM_DESC(video_nr,"video device numbers");
  53. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  54. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  55. static unsigned int video_debug;
  56. module_param(video_debug,int,0644);
  57. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  58. static unsigned int irq_debug;
  59. module_param(irq_debug,int,0644);
  60. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  61. static unsigned int vid_limit = 16;
  62. module_param(vid_limit,int,0644);
  63. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  64. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  65. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  66. /* ------------------------------------------------------------------- */
  67. /* static data */
  68. static const struct cx8800_fmt formats[] = {
  69. {
  70. .name = "8 bpp, gray",
  71. .fourcc = V4L2_PIX_FMT_GREY,
  72. .cxformat = ColorFormatY8,
  73. .depth = 8,
  74. .flags = FORMAT_FLAGS_PACKED,
  75. },{
  76. .name = "15 bpp RGB, le",
  77. .fourcc = V4L2_PIX_FMT_RGB555,
  78. .cxformat = ColorFormatRGB15,
  79. .depth = 16,
  80. .flags = FORMAT_FLAGS_PACKED,
  81. },{
  82. .name = "15 bpp RGB, be",
  83. .fourcc = V4L2_PIX_FMT_RGB555X,
  84. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  85. .depth = 16,
  86. .flags = FORMAT_FLAGS_PACKED,
  87. },{
  88. .name = "16 bpp RGB, le",
  89. .fourcc = V4L2_PIX_FMT_RGB565,
  90. .cxformat = ColorFormatRGB16,
  91. .depth = 16,
  92. .flags = FORMAT_FLAGS_PACKED,
  93. },{
  94. .name = "16 bpp RGB, be",
  95. .fourcc = V4L2_PIX_FMT_RGB565X,
  96. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  97. .depth = 16,
  98. .flags = FORMAT_FLAGS_PACKED,
  99. },{
  100. .name = "24 bpp RGB, le",
  101. .fourcc = V4L2_PIX_FMT_BGR24,
  102. .cxformat = ColorFormatRGB24,
  103. .depth = 24,
  104. .flags = FORMAT_FLAGS_PACKED,
  105. },{
  106. .name = "32 bpp RGB, le",
  107. .fourcc = V4L2_PIX_FMT_BGR32,
  108. .cxformat = ColorFormatRGB32,
  109. .depth = 32,
  110. .flags = FORMAT_FLAGS_PACKED,
  111. },{
  112. .name = "32 bpp RGB, be",
  113. .fourcc = V4L2_PIX_FMT_RGB32,
  114. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  115. .depth = 32,
  116. .flags = FORMAT_FLAGS_PACKED,
  117. },{
  118. .name = "4:2:2, packed, YUYV",
  119. .fourcc = V4L2_PIX_FMT_YUYV,
  120. .cxformat = ColorFormatYUY2,
  121. .depth = 16,
  122. .flags = FORMAT_FLAGS_PACKED,
  123. },{
  124. .name = "4:2:2, packed, UYVY",
  125. .fourcc = V4L2_PIX_FMT_UYVY,
  126. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  127. .depth = 16,
  128. .flags = FORMAT_FLAGS_PACKED,
  129. },
  130. };
  131. static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  132. {
  133. unsigned int i;
  134. for (i = 0; i < ARRAY_SIZE(formats); i++)
  135. if (formats[i].fourcc == fourcc)
  136. return formats+i;
  137. return NULL;
  138. }
  139. /* ------------------------------------------------------------------- */
  140. static const struct v4l2_queryctrl no_ctl = {
  141. .name = "42",
  142. .flags = V4L2_CTRL_FLAG_DISABLED,
  143. };
  144. static const struct cx88_ctrl cx8800_ctls[] = {
  145. /* --- video --- */
  146. {
  147. .v = {
  148. .id = V4L2_CID_BRIGHTNESS,
  149. .name = "Brightness",
  150. .minimum = 0x00,
  151. .maximum = 0xff,
  152. .step = 1,
  153. .default_value = 0x7f,
  154. .type = V4L2_CTRL_TYPE_INTEGER,
  155. },
  156. .off = 128,
  157. .reg = MO_CONTR_BRIGHT,
  158. .mask = 0x00ff,
  159. .shift = 0,
  160. },{
  161. .v = {
  162. .id = V4L2_CID_CONTRAST,
  163. .name = "Contrast",
  164. .minimum = 0,
  165. .maximum = 0xff,
  166. .step = 1,
  167. .default_value = 0x3f,
  168. .type = V4L2_CTRL_TYPE_INTEGER,
  169. },
  170. .off = 0,
  171. .reg = MO_CONTR_BRIGHT,
  172. .mask = 0xff00,
  173. .shift = 8,
  174. },{
  175. .v = {
  176. .id = V4L2_CID_HUE,
  177. .name = "Hue",
  178. .minimum = 0,
  179. .maximum = 0xff,
  180. .step = 1,
  181. .default_value = 0x7f,
  182. .type = V4L2_CTRL_TYPE_INTEGER,
  183. },
  184. .off = 128,
  185. .reg = MO_HUE,
  186. .mask = 0x00ff,
  187. .shift = 0,
  188. },{
  189. /* strictly, this only describes only U saturation.
  190. * V saturation is handled specially through code.
  191. */
  192. .v = {
  193. .id = V4L2_CID_SATURATION,
  194. .name = "Saturation",
  195. .minimum = 0,
  196. .maximum = 0xff,
  197. .step = 1,
  198. .default_value = 0x7f,
  199. .type = V4L2_CTRL_TYPE_INTEGER,
  200. },
  201. .off = 0,
  202. .reg = MO_UV_SATURATION,
  203. .mask = 0x00ff,
  204. .shift = 0,
  205. },{
  206. .v = {
  207. .id = V4L2_CID_CHROMA_AGC,
  208. .name = "Chroma AGC",
  209. .minimum = 0,
  210. .maximum = 1,
  211. .default_value = 0x1,
  212. .type = V4L2_CTRL_TYPE_BOOLEAN,
  213. },
  214. .reg = MO_INPUT_FORMAT,
  215. .mask = 1 << 10,
  216. .shift = 10,
  217. }, {
  218. .v = {
  219. .id = V4L2_CID_COLOR_KILLER,
  220. .name = "Color killer",
  221. .minimum = 0,
  222. .maximum = 1,
  223. .default_value = 0x1,
  224. .type = V4L2_CTRL_TYPE_BOOLEAN,
  225. },
  226. .reg = MO_INPUT_FORMAT,
  227. .mask = 1 << 9,
  228. .shift = 9,
  229. }, {
  230. /* --- audio --- */
  231. .v = {
  232. .id = V4L2_CID_AUDIO_MUTE,
  233. .name = "Mute",
  234. .minimum = 0,
  235. .maximum = 1,
  236. .default_value = 1,
  237. .type = V4L2_CTRL_TYPE_BOOLEAN,
  238. },
  239. .reg = AUD_VOL_CTL,
  240. .sreg = SHADOW_AUD_VOL_CTL,
  241. .mask = (1 << 6),
  242. .shift = 6,
  243. },{
  244. .v = {
  245. .id = V4L2_CID_AUDIO_VOLUME,
  246. .name = "Volume",
  247. .minimum = 0,
  248. .maximum = 0x3f,
  249. .step = 1,
  250. .default_value = 0x3f,
  251. .type = V4L2_CTRL_TYPE_INTEGER,
  252. },
  253. .reg = AUD_VOL_CTL,
  254. .sreg = SHADOW_AUD_VOL_CTL,
  255. .mask = 0x3f,
  256. .shift = 0,
  257. },{
  258. .v = {
  259. .id = V4L2_CID_AUDIO_BALANCE,
  260. .name = "Balance",
  261. .minimum = 0,
  262. .maximum = 0x7f,
  263. .step = 1,
  264. .default_value = 0x40,
  265. .type = V4L2_CTRL_TYPE_INTEGER,
  266. },
  267. .reg = AUD_BAL_CTL,
  268. .sreg = SHADOW_AUD_BAL_CTL,
  269. .mask = 0x7f,
  270. .shift = 0,
  271. }
  272. };
  273. enum { CX8800_CTLS = ARRAY_SIZE(cx8800_ctls) };
  274. /* Must be sorted from low to high control ID! */
  275. const u32 cx88_user_ctrls[] = {
  276. V4L2_CID_USER_CLASS,
  277. V4L2_CID_BRIGHTNESS,
  278. V4L2_CID_CONTRAST,
  279. V4L2_CID_SATURATION,
  280. V4L2_CID_HUE,
  281. V4L2_CID_AUDIO_VOLUME,
  282. V4L2_CID_AUDIO_BALANCE,
  283. V4L2_CID_AUDIO_MUTE,
  284. V4L2_CID_CHROMA_AGC,
  285. V4L2_CID_COLOR_KILLER,
  286. 0
  287. };
  288. EXPORT_SYMBOL(cx88_user_ctrls);
  289. static const u32 * const ctrl_classes[] = {
  290. cx88_user_ctrls,
  291. NULL
  292. };
  293. int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
  294. {
  295. int i;
  296. if (qctrl->id < V4L2_CID_BASE ||
  297. qctrl->id >= V4L2_CID_LASTP1)
  298. return -EINVAL;
  299. for (i = 0; i < CX8800_CTLS; i++)
  300. if (cx8800_ctls[i].v.id == qctrl->id)
  301. break;
  302. if (i == CX8800_CTLS) {
  303. *qctrl = no_ctl;
  304. return 0;
  305. }
  306. *qctrl = cx8800_ctls[i].v;
  307. /* Report chroma AGC as inactive when SECAM is selected */
  308. if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
  309. core->tvnorm & V4L2_STD_SECAM)
  310. qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
  311. return 0;
  312. }
  313. EXPORT_SYMBOL(cx8800_ctrl_query);
  314. /* ------------------------------------------------------------------- */
  315. /* resource management */
  316. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  317. {
  318. struct cx88_core *core = dev->core;
  319. if (fh->resources & bit)
  320. /* have it already allocated */
  321. return 1;
  322. /* is it free? */
  323. mutex_lock(&core->lock);
  324. if (dev->resources & bit) {
  325. /* no, someone else uses it */
  326. mutex_unlock(&core->lock);
  327. return 0;
  328. }
  329. /* it's free, grab it */
  330. fh->resources |= bit;
  331. dev->resources |= bit;
  332. dprintk(1,"res: get %d\n",bit);
  333. mutex_unlock(&core->lock);
  334. return 1;
  335. }
  336. static
  337. int res_check(struct cx8800_fh *fh, unsigned int bit)
  338. {
  339. return (fh->resources & bit);
  340. }
  341. static
  342. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  343. {
  344. return (dev->resources & bit);
  345. }
  346. static
  347. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  348. {
  349. struct cx88_core *core = dev->core;
  350. BUG_ON((fh->resources & bits) != bits);
  351. mutex_lock(&core->lock);
  352. fh->resources &= ~bits;
  353. dev->resources &= ~bits;
  354. dprintk(1,"res: put %d\n",bits);
  355. mutex_unlock(&core->lock);
  356. }
  357. /* ------------------------------------------------------------------ */
  358. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  359. {
  360. /* struct cx88_core *core = dev->core; */
  361. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  362. input, INPUT(input).vmux,
  363. INPUT(input).gpio0,INPUT(input).gpio1,
  364. INPUT(input).gpio2,INPUT(input).gpio3);
  365. core->input = input;
  366. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  367. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  368. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  369. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  370. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  371. switch (INPUT(input).type) {
  372. case CX88_VMUX_SVIDEO:
  373. cx_set(MO_AFECFG_IO, 0x00000001);
  374. cx_set(MO_INPUT_FORMAT, 0x00010010);
  375. cx_set(MO_FILTER_EVEN, 0x00002020);
  376. cx_set(MO_FILTER_ODD, 0x00002020);
  377. break;
  378. default:
  379. cx_clear(MO_AFECFG_IO, 0x00000001);
  380. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  381. cx_clear(MO_FILTER_EVEN, 0x00002020);
  382. cx_clear(MO_FILTER_ODD, 0x00002020);
  383. break;
  384. }
  385. /* if there are audioroutes defined, we have an external
  386. ADC to deal with audio */
  387. if (INPUT(input).audioroute) {
  388. /* The wm8775 module has the "2" route hardwired into
  389. the initialization. Some boards may use different
  390. routes for different inputs. HVR-1300 surely does */
  391. if (core->board.audio_chip &&
  392. core->board.audio_chip == V4L2_IDENT_WM8775) {
  393. call_all(core, audio, s_routing,
  394. INPUT(input).audioroute, 0, 0);
  395. }
  396. /* cx2388's C-ADC is connected to the tuner only.
  397. When used with S-Video, that ADC is busy dealing with
  398. chroma, so an external must be used for baseband audio */
  399. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  400. INPUT(input).type != CX88_VMUX_CABLE) {
  401. /* "I2S ADC mode" */
  402. core->tvaudio = WW_I2SADC;
  403. cx88_set_tvaudio(core);
  404. } else {
  405. /* Normal mode */
  406. cx_write(AUD_I2SCNTL, 0x0);
  407. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  408. }
  409. }
  410. return 0;
  411. }
  412. EXPORT_SYMBOL(cx88_video_mux);
  413. /* ------------------------------------------------------------------ */
  414. static int start_video_dma(struct cx8800_dev *dev,
  415. struct cx88_dmaqueue *q,
  416. struct cx88_buffer *buf)
  417. {
  418. struct cx88_core *core = dev->core;
  419. /* setup fifo + format */
  420. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  421. buf->bpl, buf->risc.dma);
  422. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  423. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  424. /* reset counter */
  425. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  426. q->count = 1;
  427. /* enable irqs */
  428. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  429. /* Enables corresponding bits at PCI_INT_STAT:
  430. bits 0 to 4: video, audio, transport stream, VIP, Host
  431. bit 7: timer
  432. bits 8 and 9: DMA complete for: SRC, DST
  433. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  434. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  435. */
  436. cx_set(MO_VID_INTMSK, 0x0f0011);
  437. /* enable capture */
  438. cx_set(VID_CAPTURE_CONTROL,0x06);
  439. /* start dma */
  440. cx_set(MO_DEV_CNTRL2, (1<<5));
  441. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  442. return 0;
  443. }
  444. #ifdef CONFIG_PM
  445. static int stop_video_dma(struct cx8800_dev *dev)
  446. {
  447. struct cx88_core *core = dev->core;
  448. /* stop dma */
  449. cx_clear(MO_VID_DMACNTRL, 0x11);
  450. /* disable capture */
  451. cx_clear(VID_CAPTURE_CONTROL,0x06);
  452. /* disable irqs */
  453. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  454. cx_clear(MO_VID_INTMSK, 0x0f0011);
  455. return 0;
  456. }
  457. #endif
  458. static int restart_video_queue(struct cx8800_dev *dev,
  459. struct cx88_dmaqueue *q)
  460. {
  461. struct cx88_core *core = dev->core;
  462. struct cx88_buffer *buf, *prev;
  463. if (!list_empty(&q->active)) {
  464. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  465. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  466. buf, buf->vb.i);
  467. start_video_dma(dev, q, buf);
  468. list_for_each_entry(buf, &q->active, vb.queue)
  469. buf->count = q->count++;
  470. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  471. return 0;
  472. }
  473. prev = NULL;
  474. for (;;) {
  475. if (list_empty(&q->queued))
  476. return 0;
  477. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  478. if (NULL == prev) {
  479. list_move_tail(&buf->vb.queue, &q->active);
  480. start_video_dma(dev, q, buf);
  481. buf->vb.state = VIDEOBUF_ACTIVE;
  482. buf->count = q->count++;
  483. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  484. dprintk(2,"[%p/%d] restart_queue - first active\n",
  485. buf,buf->vb.i);
  486. } else if (prev->vb.width == buf->vb.width &&
  487. prev->vb.height == buf->vb.height &&
  488. prev->fmt == buf->fmt) {
  489. list_move_tail(&buf->vb.queue, &q->active);
  490. buf->vb.state = VIDEOBUF_ACTIVE;
  491. buf->count = q->count++;
  492. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  493. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  494. buf,buf->vb.i);
  495. } else {
  496. return 0;
  497. }
  498. prev = buf;
  499. }
  500. }
  501. /* ------------------------------------------------------------------ */
  502. static int
  503. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  504. {
  505. struct cx8800_fh *fh = q->priv_data;
  506. *size = fh->fmt->depth*fh->width*fh->height >> 3;
  507. if (0 == *count)
  508. *count = 32;
  509. if (*size * *count > vid_limit * 1024 * 1024)
  510. *count = (vid_limit * 1024 * 1024) / *size;
  511. return 0;
  512. }
  513. static int
  514. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  515. enum v4l2_field field)
  516. {
  517. struct cx8800_fh *fh = q->priv_data;
  518. struct cx8800_dev *dev = fh->dev;
  519. struct cx88_core *core = dev->core;
  520. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  521. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  522. int rc, init_buffer = 0;
  523. BUG_ON(NULL == fh->fmt);
  524. if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
  525. fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
  526. return -EINVAL;
  527. buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
  528. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  529. return -EINVAL;
  530. if (buf->fmt != fh->fmt ||
  531. buf->vb.width != fh->width ||
  532. buf->vb.height != fh->height ||
  533. buf->vb.field != field) {
  534. buf->fmt = fh->fmt;
  535. buf->vb.width = fh->width;
  536. buf->vb.height = fh->height;
  537. buf->vb.field = field;
  538. init_buffer = 1;
  539. }
  540. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  541. init_buffer = 1;
  542. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  543. goto fail;
  544. }
  545. if (init_buffer) {
  546. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  547. switch (buf->vb.field) {
  548. case V4L2_FIELD_TOP:
  549. cx88_risc_buffer(dev->pci, &buf->risc,
  550. dma->sglist, 0, UNSET,
  551. buf->bpl, 0, buf->vb.height);
  552. break;
  553. case V4L2_FIELD_BOTTOM:
  554. cx88_risc_buffer(dev->pci, &buf->risc,
  555. dma->sglist, UNSET, 0,
  556. buf->bpl, 0, buf->vb.height);
  557. break;
  558. case V4L2_FIELD_INTERLACED:
  559. cx88_risc_buffer(dev->pci, &buf->risc,
  560. dma->sglist, 0, buf->bpl,
  561. buf->bpl, buf->bpl,
  562. buf->vb.height >> 1);
  563. break;
  564. case V4L2_FIELD_SEQ_TB:
  565. cx88_risc_buffer(dev->pci, &buf->risc,
  566. dma->sglist,
  567. 0, buf->bpl * (buf->vb.height >> 1),
  568. buf->bpl, 0,
  569. buf->vb.height >> 1);
  570. break;
  571. case V4L2_FIELD_SEQ_BT:
  572. cx88_risc_buffer(dev->pci, &buf->risc,
  573. dma->sglist,
  574. buf->bpl * (buf->vb.height >> 1), 0,
  575. buf->bpl, 0,
  576. buf->vb.height >> 1);
  577. break;
  578. default:
  579. BUG();
  580. }
  581. }
  582. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  583. buf, buf->vb.i,
  584. fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
  585. (unsigned long)buf->risc.dma);
  586. buf->vb.state = VIDEOBUF_PREPARED;
  587. return 0;
  588. fail:
  589. cx88_free_buffer(q,buf);
  590. return rc;
  591. }
  592. static void
  593. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  594. {
  595. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  596. struct cx88_buffer *prev;
  597. struct cx8800_fh *fh = vq->priv_data;
  598. struct cx8800_dev *dev = fh->dev;
  599. struct cx88_core *core = dev->core;
  600. struct cx88_dmaqueue *q = &dev->vidq;
  601. /* add jump to stopper */
  602. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  603. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  604. if (!list_empty(&q->queued)) {
  605. list_add_tail(&buf->vb.queue,&q->queued);
  606. buf->vb.state = VIDEOBUF_QUEUED;
  607. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  608. buf, buf->vb.i);
  609. } else if (list_empty(&q->active)) {
  610. list_add_tail(&buf->vb.queue,&q->active);
  611. start_video_dma(dev, q, buf);
  612. buf->vb.state = VIDEOBUF_ACTIVE;
  613. buf->count = q->count++;
  614. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  615. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  616. buf, buf->vb.i);
  617. } else {
  618. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  619. if (prev->vb.width == buf->vb.width &&
  620. prev->vb.height == buf->vb.height &&
  621. prev->fmt == buf->fmt) {
  622. list_add_tail(&buf->vb.queue,&q->active);
  623. buf->vb.state = VIDEOBUF_ACTIVE;
  624. buf->count = q->count++;
  625. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  626. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  627. buf, buf->vb.i);
  628. } else {
  629. list_add_tail(&buf->vb.queue,&q->queued);
  630. buf->vb.state = VIDEOBUF_QUEUED;
  631. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  632. buf, buf->vb.i);
  633. }
  634. }
  635. }
  636. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  637. {
  638. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  639. cx88_free_buffer(q,buf);
  640. }
  641. static const struct videobuf_queue_ops cx8800_video_qops = {
  642. .buf_setup = buffer_setup,
  643. .buf_prepare = buffer_prepare,
  644. .buf_queue = buffer_queue,
  645. .buf_release = buffer_release,
  646. };
  647. /* ------------------------------------------------------------------ */
  648. /* ------------------------------------------------------------------ */
  649. static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
  650. {
  651. switch (fh->type) {
  652. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  653. return &fh->vidq;
  654. case V4L2_BUF_TYPE_VBI_CAPTURE:
  655. return &fh->vbiq;
  656. default:
  657. BUG();
  658. return NULL;
  659. }
  660. }
  661. static int get_ressource(struct cx8800_fh *fh)
  662. {
  663. switch (fh->type) {
  664. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  665. return RESOURCE_VIDEO;
  666. case V4L2_BUF_TYPE_VBI_CAPTURE:
  667. return RESOURCE_VBI;
  668. default:
  669. BUG();
  670. return 0;
  671. }
  672. }
  673. static int video_open(struct file *file)
  674. {
  675. struct video_device *vdev = video_devdata(file);
  676. struct cx8800_dev *dev = video_drvdata(file);
  677. struct cx88_core *core;
  678. struct cx8800_fh *fh;
  679. enum v4l2_buf_type type = 0;
  680. int radio = 0;
  681. switch (vdev->vfl_type) {
  682. case VFL_TYPE_GRABBER:
  683. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  684. break;
  685. case VFL_TYPE_VBI:
  686. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  687. break;
  688. case VFL_TYPE_RADIO:
  689. radio = 1;
  690. break;
  691. }
  692. dprintk(1, "open dev=%s radio=%d type=%s\n",
  693. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  694. /* allocate + initialize per filehandle data */
  695. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  696. if (unlikely(!fh))
  697. return -ENOMEM;
  698. file->private_data = fh;
  699. fh->dev = dev;
  700. fh->radio = radio;
  701. fh->type = type;
  702. fh->width = 320;
  703. fh->height = 240;
  704. fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  705. mutex_lock(&core->lock);
  706. core = dev->core;
  707. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  708. &dev->pci->dev, &dev->slock,
  709. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  710. V4L2_FIELD_INTERLACED,
  711. sizeof(struct cx88_buffer),
  712. fh);
  713. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  714. &dev->pci->dev, &dev->slock,
  715. V4L2_BUF_TYPE_VBI_CAPTURE,
  716. V4L2_FIELD_SEQ_TB,
  717. sizeof(struct cx88_buffer),
  718. fh);
  719. if (fh->radio) {
  720. dprintk(1,"video_open: setting radio device\n");
  721. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  722. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  723. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  724. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  725. if (core->board.radio.audioroute) {
  726. if(core->board.audio_chip &&
  727. core->board.audio_chip == V4L2_IDENT_WM8775) {
  728. call_all(core, audio, s_routing,
  729. core->board.radio.audioroute, 0, 0);
  730. }
  731. /* "I2S ADC mode" */
  732. core->tvaudio = WW_I2SADC;
  733. cx88_set_tvaudio(core);
  734. } else {
  735. /* FM Mode */
  736. core->tvaudio = WW_FM;
  737. cx88_set_tvaudio(core);
  738. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  739. }
  740. call_all(core, tuner, s_radio);
  741. }
  742. atomic_inc(&core->users);
  743. mutex_unlock(&core->lock);
  744. return 0;
  745. }
  746. static ssize_t
  747. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  748. {
  749. struct cx8800_fh *fh = file->private_data;
  750. switch (fh->type) {
  751. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  752. if (res_locked(fh->dev,RESOURCE_VIDEO))
  753. return -EBUSY;
  754. return videobuf_read_one(&fh->vidq, data, count, ppos,
  755. file->f_flags & O_NONBLOCK);
  756. case V4L2_BUF_TYPE_VBI_CAPTURE:
  757. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  758. return -EBUSY;
  759. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  760. file->f_flags & O_NONBLOCK);
  761. default:
  762. BUG();
  763. return 0;
  764. }
  765. }
  766. static unsigned int
  767. video_poll(struct file *file, struct poll_table_struct *wait)
  768. {
  769. struct cx8800_fh *fh = file->private_data;
  770. struct cx88_buffer *buf;
  771. unsigned int rc = POLLERR;
  772. if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
  773. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  774. return POLLERR;
  775. return videobuf_poll_stream(file, &fh->vbiq, wait);
  776. }
  777. mutex_lock(&fh->vidq.vb_lock);
  778. if (res_check(fh,RESOURCE_VIDEO)) {
  779. /* streaming capture */
  780. if (list_empty(&fh->vidq.stream))
  781. goto done;
  782. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  783. } else {
  784. /* read() capture */
  785. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  786. if (NULL == buf)
  787. goto done;
  788. }
  789. poll_wait(file, &buf->vb.done, wait);
  790. if (buf->vb.state == VIDEOBUF_DONE ||
  791. buf->vb.state == VIDEOBUF_ERROR)
  792. rc = POLLIN|POLLRDNORM;
  793. else
  794. rc = 0;
  795. done:
  796. mutex_unlock(&fh->vidq.vb_lock);
  797. return rc;
  798. }
  799. static int video_release(struct file *file)
  800. {
  801. struct cx8800_fh *fh = file->private_data;
  802. struct cx8800_dev *dev = fh->dev;
  803. /* turn off overlay */
  804. if (res_check(fh, RESOURCE_OVERLAY)) {
  805. /* FIXME */
  806. res_free(dev,fh,RESOURCE_OVERLAY);
  807. }
  808. /* stop video capture */
  809. if (res_check(fh, RESOURCE_VIDEO)) {
  810. videobuf_queue_cancel(&fh->vidq);
  811. res_free(dev,fh,RESOURCE_VIDEO);
  812. }
  813. if (fh->vidq.read_buf) {
  814. buffer_release(&fh->vidq,fh->vidq.read_buf);
  815. kfree(fh->vidq.read_buf);
  816. }
  817. /* stop vbi capture */
  818. if (res_check(fh, RESOURCE_VBI)) {
  819. videobuf_stop(&fh->vbiq);
  820. res_free(dev,fh,RESOURCE_VBI);
  821. }
  822. videobuf_mmap_free(&fh->vidq);
  823. videobuf_mmap_free(&fh->vbiq);
  824. mutex_lock(&dev->core->lock);
  825. file->private_data = NULL;
  826. kfree(fh);
  827. if(atomic_dec_and_test(&dev->core->users))
  828. call_all(dev->core, core, s_power, 0);
  829. mutex_unlock(&dev->core->lock);
  830. return 0;
  831. }
  832. static int
  833. video_mmap(struct file *file, struct vm_area_struct * vma)
  834. {
  835. struct cx8800_fh *fh = file->private_data;
  836. return videobuf_mmap_mapper(get_queue(fh), vma);
  837. }
  838. /* ------------------------------------------------------------------ */
  839. /* VIDEO CTRL IOCTLS */
  840. int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
  841. {
  842. const struct cx88_ctrl *c = NULL;
  843. u32 value;
  844. int i;
  845. for (i = 0; i < CX8800_CTLS; i++)
  846. if (cx8800_ctls[i].v.id == ctl->id)
  847. c = &cx8800_ctls[i];
  848. if (unlikely(NULL == c))
  849. return -EINVAL;
  850. value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
  851. switch (ctl->id) {
  852. case V4L2_CID_AUDIO_BALANCE:
  853. ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
  854. : (0x7f - (value & 0x7f));
  855. break;
  856. case V4L2_CID_AUDIO_VOLUME:
  857. ctl->value = 0x3f - (value & 0x3f);
  858. break;
  859. default:
  860. ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
  861. break;
  862. }
  863. dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  864. ctl->id, c->v.name, ctl->value, c->reg,
  865. value,c->mask, c->sreg ? " [shadowed]" : "");
  866. return 0;
  867. }
  868. EXPORT_SYMBOL(cx88_get_control);
  869. int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
  870. {
  871. const struct cx88_ctrl *c = NULL;
  872. u32 value,mask;
  873. int i;
  874. for (i = 0; i < CX8800_CTLS; i++) {
  875. if (cx8800_ctls[i].v.id == ctl->id) {
  876. c = &cx8800_ctls[i];
  877. }
  878. }
  879. if (unlikely(NULL == c))
  880. return -EINVAL;
  881. if (ctl->value < c->v.minimum)
  882. ctl->value = c->v.minimum;
  883. if (ctl->value > c->v.maximum)
  884. ctl->value = c->v.maximum;
  885. mask=c->mask;
  886. switch (ctl->id) {
  887. case V4L2_CID_AUDIO_BALANCE:
  888. value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
  889. break;
  890. case V4L2_CID_AUDIO_VOLUME:
  891. value = 0x3f - (ctl->value & 0x3f);
  892. break;
  893. case V4L2_CID_SATURATION:
  894. /* special v_sat handling */
  895. value = ((ctl->value - c->off) << c->shift) & c->mask;
  896. if (core->tvnorm & V4L2_STD_SECAM) {
  897. /* For SECAM, both U and V sat should be equal */
  898. value=value<<8|value;
  899. } else {
  900. /* Keeps U Saturation proportional to V Sat */
  901. value=(value*0x5a)/0x7f<<8|value;
  902. }
  903. mask=0xffff;
  904. break;
  905. case V4L2_CID_CHROMA_AGC:
  906. /* Do not allow chroma AGC to be enabled for SECAM */
  907. value = ((ctl->value - c->off) << c->shift) & c->mask;
  908. if (core->tvnorm & V4L2_STD_SECAM && value)
  909. return -EINVAL;
  910. break;
  911. default:
  912. value = ((ctl->value - c->off) << c->shift) & c->mask;
  913. break;
  914. }
  915. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  916. ctl->id, c->v.name, ctl->value, c->reg, value,
  917. mask, c->sreg ? " [shadowed]" : "");
  918. if (c->sreg) {
  919. cx_sandor(c->sreg, c->reg, mask, value);
  920. } else {
  921. cx_andor(c->reg, mask, value);
  922. }
  923. return 0;
  924. }
  925. EXPORT_SYMBOL(cx88_set_control);
  926. static void init_controls(struct cx88_core *core)
  927. {
  928. struct v4l2_control ctrl;
  929. int i;
  930. for (i = 0; i < CX8800_CTLS; i++) {
  931. ctrl.id=cx8800_ctls[i].v.id;
  932. ctrl.value=cx8800_ctls[i].v.default_value;
  933. cx88_set_control(core, &ctrl);
  934. }
  935. }
  936. /* ------------------------------------------------------------------ */
  937. /* VIDEO IOCTLS */
  938. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  939. struct v4l2_format *f)
  940. {
  941. struct cx8800_fh *fh = priv;
  942. f->fmt.pix.width = fh->width;
  943. f->fmt.pix.height = fh->height;
  944. f->fmt.pix.field = fh->vidq.field;
  945. f->fmt.pix.pixelformat = fh->fmt->fourcc;
  946. f->fmt.pix.bytesperline =
  947. (f->fmt.pix.width * fh->fmt->depth) >> 3;
  948. f->fmt.pix.sizeimage =
  949. f->fmt.pix.height * f->fmt.pix.bytesperline;
  950. return 0;
  951. }
  952. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  953. struct v4l2_format *f)
  954. {
  955. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  956. const struct cx8800_fmt *fmt;
  957. enum v4l2_field field;
  958. unsigned int maxw, maxh;
  959. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  960. if (NULL == fmt)
  961. return -EINVAL;
  962. field = f->fmt.pix.field;
  963. maxw = norm_maxw(core->tvnorm);
  964. maxh = norm_maxh(core->tvnorm);
  965. if (V4L2_FIELD_ANY == field) {
  966. field = (f->fmt.pix.height > maxh/2)
  967. ? V4L2_FIELD_INTERLACED
  968. : V4L2_FIELD_BOTTOM;
  969. }
  970. switch (field) {
  971. case V4L2_FIELD_TOP:
  972. case V4L2_FIELD_BOTTOM:
  973. maxh = maxh / 2;
  974. break;
  975. case V4L2_FIELD_INTERLACED:
  976. break;
  977. default:
  978. return -EINVAL;
  979. }
  980. f->fmt.pix.field = field;
  981. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  982. &f->fmt.pix.height, 32, maxh, 0, 0);
  983. f->fmt.pix.bytesperline =
  984. (f->fmt.pix.width * fmt->depth) >> 3;
  985. f->fmt.pix.sizeimage =
  986. f->fmt.pix.height * f->fmt.pix.bytesperline;
  987. return 0;
  988. }
  989. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  990. struct v4l2_format *f)
  991. {
  992. struct cx8800_fh *fh = priv;
  993. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  994. if (0 != err)
  995. return err;
  996. fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  997. fh->width = f->fmt.pix.width;
  998. fh->height = f->fmt.pix.height;
  999. fh->vidq.field = f->fmt.pix.field;
  1000. return 0;
  1001. }
  1002. static int vidioc_querycap (struct file *file, void *priv,
  1003. struct v4l2_capability *cap)
  1004. {
  1005. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  1006. struct cx88_core *core = dev->core;
  1007. strcpy(cap->driver, "cx8800");
  1008. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  1009. sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
  1010. cap->version = CX88_VERSION_CODE;
  1011. cap->capabilities =
  1012. V4L2_CAP_VIDEO_CAPTURE |
  1013. V4L2_CAP_READWRITE |
  1014. V4L2_CAP_STREAMING |
  1015. V4L2_CAP_VBI_CAPTURE;
  1016. if (UNSET != core->board.tuner_type)
  1017. cap->capabilities |= V4L2_CAP_TUNER;
  1018. return 0;
  1019. }
  1020. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  1021. struct v4l2_fmtdesc *f)
  1022. {
  1023. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  1024. return -EINVAL;
  1025. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  1026. f->pixelformat = formats[f->index].fourcc;
  1027. return 0;
  1028. }
  1029. #ifdef CONFIG_VIDEO_V4L1_COMPAT
  1030. static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
  1031. {
  1032. struct cx8800_fh *fh = priv;
  1033. return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
  1034. }
  1035. #endif
  1036. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  1037. {
  1038. struct cx8800_fh *fh = priv;
  1039. return (videobuf_reqbufs(get_queue(fh), p));
  1040. }
  1041. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1042. {
  1043. struct cx8800_fh *fh = priv;
  1044. return (videobuf_querybuf(get_queue(fh), p));
  1045. }
  1046. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1047. {
  1048. struct cx8800_fh *fh = priv;
  1049. return (videobuf_qbuf(get_queue(fh), p));
  1050. }
  1051. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1052. {
  1053. struct cx8800_fh *fh = priv;
  1054. return (videobuf_dqbuf(get_queue(fh), p,
  1055. file->f_flags & O_NONBLOCK));
  1056. }
  1057. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1058. {
  1059. struct cx8800_fh *fh = priv;
  1060. struct cx8800_dev *dev = fh->dev;
  1061. /* We should remember that this driver also supports teletext, */
  1062. /* so we have to test if the v4l2_buf_type is VBI capture data. */
  1063. if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1064. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
  1065. return -EINVAL;
  1066. if (unlikely(i != fh->type))
  1067. return -EINVAL;
  1068. if (unlikely(!res_get(dev,fh,get_ressource(fh))))
  1069. return -EBUSY;
  1070. return videobuf_streamon(get_queue(fh));
  1071. }
  1072. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1073. {
  1074. struct cx8800_fh *fh = priv;
  1075. struct cx8800_dev *dev = fh->dev;
  1076. int err, res;
  1077. if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1078. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
  1079. return -EINVAL;
  1080. if (i != fh->type)
  1081. return -EINVAL;
  1082. res = get_ressource(fh);
  1083. err = videobuf_streamoff(get_queue(fh));
  1084. if (err < 0)
  1085. return err;
  1086. res_free(dev,fh,res);
  1087. return 0;
  1088. }
  1089. static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
  1090. {
  1091. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1092. mutex_lock(&core->lock);
  1093. cx88_set_tvnorm(core,*tvnorms);
  1094. mutex_unlock(&core->lock);
  1095. return 0;
  1096. }
  1097. /* only one input in this sample driver */
  1098. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1099. {
  1100. static const char * const iname[] = {
  1101. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1102. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1103. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1104. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1105. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1106. [ CX88_VMUX_TELEVISION ] = "Television",
  1107. [ CX88_VMUX_CABLE ] = "Cable TV",
  1108. [ CX88_VMUX_DVB ] = "DVB",
  1109. [ CX88_VMUX_DEBUG ] = "for debug only",
  1110. };
  1111. unsigned int n = i->index;
  1112. if (n >= 4)
  1113. return -EINVAL;
  1114. if (0 == INPUT(n).type)
  1115. return -EINVAL;
  1116. i->type = V4L2_INPUT_TYPE_CAMERA;
  1117. strcpy(i->name,iname[INPUT(n).type]);
  1118. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1119. (CX88_VMUX_CABLE == INPUT(n).type)) {
  1120. i->type = V4L2_INPUT_TYPE_TUNER;
  1121. i->std = CX88_NORMS;
  1122. }
  1123. return 0;
  1124. }
  1125. EXPORT_SYMBOL(cx88_enum_input);
  1126. static int vidioc_enum_input (struct file *file, void *priv,
  1127. struct v4l2_input *i)
  1128. {
  1129. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1130. return cx88_enum_input (core,i);
  1131. }
  1132. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1133. {
  1134. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1135. *i = core->input;
  1136. return 0;
  1137. }
  1138. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1139. {
  1140. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1141. if (i >= 4)
  1142. return -EINVAL;
  1143. mutex_lock(&core->lock);
  1144. cx88_newstation(core);
  1145. cx88_video_mux(core,i);
  1146. mutex_unlock(&core->lock);
  1147. return 0;
  1148. }
  1149. static int vidioc_queryctrl (struct file *file, void *priv,
  1150. struct v4l2_queryctrl *qctrl)
  1151. {
  1152. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1153. qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
  1154. if (unlikely(qctrl->id == 0))
  1155. return -EINVAL;
  1156. return cx8800_ctrl_query(core, qctrl);
  1157. }
  1158. static int vidioc_g_ctrl (struct file *file, void *priv,
  1159. struct v4l2_control *ctl)
  1160. {
  1161. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1162. return
  1163. cx88_get_control(core,ctl);
  1164. }
  1165. static int vidioc_s_ctrl (struct file *file, void *priv,
  1166. struct v4l2_control *ctl)
  1167. {
  1168. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1169. return
  1170. cx88_set_control(core,ctl);
  1171. }
  1172. static int vidioc_g_tuner (struct file *file, void *priv,
  1173. struct v4l2_tuner *t)
  1174. {
  1175. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1176. u32 reg;
  1177. if (unlikely(UNSET == core->board.tuner_type))
  1178. return -EINVAL;
  1179. if (0 != t->index)
  1180. return -EINVAL;
  1181. strcpy(t->name, "Television");
  1182. t->type = V4L2_TUNER_ANALOG_TV;
  1183. t->capability = V4L2_TUNER_CAP_NORM;
  1184. t->rangehigh = 0xffffffffUL;
  1185. cx88_get_stereo(core ,t);
  1186. reg = cx_read(MO_DEVICE_STATUS);
  1187. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1188. return 0;
  1189. }
  1190. static int vidioc_s_tuner (struct file *file, void *priv,
  1191. struct v4l2_tuner *t)
  1192. {
  1193. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1194. if (UNSET == core->board.tuner_type)
  1195. return -EINVAL;
  1196. if (0 != t->index)
  1197. return -EINVAL;
  1198. cx88_set_stereo(core, t->audmode, 1);
  1199. return 0;
  1200. }
  1201. static int vidioc_g_frequency (struct file *file, void *priv,
  1202. struct v4l2_frequency *f)
  1203. {
  1204. struct cx8800_fh *fh = priv;
  1205. struct cx88_core *core = fh->dev->core;
  1206. if (unlikely(UNSET == core->board.tuner_type))
  1207. return -EINVAL;
  1208. /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
  1209. f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
  1210. f->frequency = core->freq;
  1211. call_all(core, tuner, g_frequency, f);
  1212. return 0;
  1213. }
  1214. int cx88_set_freq (struct cx88_core *core,
  1215. struct v4l2_frequency *f)
  1216. {
  1217. if (unlikely(UNSET == core->board.tuner_type))
  1218. return -EINVAL;
  1219. if (unlikely(f->tuner != 0))
  1220. return -EINVAL;
  1221. mutex_lock(&core->lock);
  1222. core->freq = f->frequency;
  1223. cx88_newstation(core);
  1224. call_all(core, tuner, s_frequency, f);
  1225. /* When changing channels it is required to reset TVAUDIO */
  1226. msleep (10);
  1227. cx88_set_tvaudio(core);
  1228. mutex_unlock(&core->lock);
  1229. return 0;
  1230. }
  1231. EXPORT_SYMBOL(cx88_set_freq);
  1232. static int vidioc_s_frequency (struct file *file, void *priv,
  1233. struct v4l2_frequency *f)
  1234. {
  1235. struct cx8800_fh *fh = priv;
  1236. struct cx88_core *core = fh->dev->core;
  1237. if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
  1238. return -EINVAL;
  1239. if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
  1240. return -EINVAL;
  1241. return
  1242. cx88_set_freq (core,f);
  1243. }
  1244. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1245. static int vidioc_g_register (struct file *file, void *fh,
  1246. struct v4l2_dbg_register *reg)
  1247. {
  1248. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1249. if (!v4l2_chip_match_host(&reg->match))
  1250. return -EINVAL;
  1251. /* cx2388x has a 24-bit register space */
  1252. reg->val = cx_read(reg->reg & 0xffffff);
  1253. reg->size = 4;
  1254. return 0;
  1255. }
  1256. static int vidioc_s_register (struct file *file, void *fh,
  1257. struct v4l2_dbg_register *reg)
  1258. {
  1259. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1260. if (!v4l2_chip_match_host(&reg->match))
  1261. return -EINVAL;
  1262. cx_write(reg->reg & 0xffffff, reg->val);
  1263. return 0;
  1264. }
  1265. #endif
  1266. /* ----------------------------------------------------------- */
  1267. /* RADIO ESPECIFIC IOCTLS */
  1268. /* ----------------------------------------------------------- */
  1269. static int radio_querycap (struct file *file, void *priv,
  1270. struct v4l2_capability *cap)
  1271. {
  1272. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  1273. struct cx88_core *core = dev->core;
  1274. strcpy(cap->driver, "cx8800");
  1275. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  1276. sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
  1277. cap->version = CX88_VERSION_CODE;
  1278. cap->capabilities = V4L2_CAP_TUNER;
  1279. return 0;
  1280. }
  1281. static int radio_g_tuner (struct file *file, void *priv,
  1282. struct v4l2_tuner *t)
  1283. {
  1284. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1285. if (unlikely(t->index > 0))
  1286. return -EINVAL;
  1287. strcpy(t->name, "Radio");
  1288. t->type = V4L2_TUNER_RADIO;
  1289. call_all(core, tuner, g_tuner, t);
  1290. return 0;
  1291. }
  1292. static int radio_enum_input (struct file *file, void *priv,
  1293. struct v4l2_input *i)
  1294. {
  1295. if (i->index != 0)
  1296. return -EINVAL;
  1297. strcpy(i->name,"Radio");
  1298. i->type = V4L2_INPUT_TYPE_TUNER;
  1299. return 0;
  1300. }
  1301. static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
  1302. {
  1303. if (unlikely(a->index))
  1304. return -EINVAL;
  1305. strcpy(a->name,"Radio");
  1306. return 0;
  1307. }
  1308. /* FIXME: Should add a standard for radio */
  1309. static int radio_s_tuner (struct file *file, void *priv,
  1310. struct v4l2_tuner *t)
  1311. {
  1312. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1313. if (0 != t->index)
  1314. return -EINVAL;
  1315. call_all(core, tuner, s_tuner, t);
  1316. return 0;
  1317. }
  1318. static int radio_s_audio (struct file *file, void *fh,
  1319. struct v4l2_audio *a)
  1320. {
  1321. return 0;
  1322. }
  1323. static int radio_s_input (struct file *file, void *fh, unsigned int i)
  1324. {
  1325. return 0;
  1326. }
  1327. static int radio_queryctrl (struct file *file, void *priv,
  1328. struct v4l2_queryctrl *c)
  1329. {
  1330. int i;
  1331. if (c->id < V4L2_CID_BASE ||
  1332. c->id >= V4L2_CID_LASTP1)
  1333. return -EINVAL;
  1334. if (c->id == V4L2_CID_AUDIO_MUTE) {
  1335. for (i = 0; i < CX8800_CTLS; i++) {
  1336. if (cx8800_ctls[i].v.id == c->id)
  1337. break;
  1338. }
  1339. if (i == CX8800_CTLS)
  1340. return -EINVAL;
  1341. *c = cx8800_ctls[i].v;
  1342. } else
  1343. *c = no_ctl;
  1344. return 0;
  1345. }
  1346. /* ----------------------------------------------------------- */
  1347. static void cx8800_vid_timeout(unsigned long data)
  1348. {
  1349. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1350. struct cx88_core *core = dev->core;
  1351. struct cx88_dmaqueue *q = &dev->vidq;
  1352. struct cx88_buffer *buf;
  1353. unsigned long flags;
  1354. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1355. cx_clear(MO_VID_DMACNTRL, 0x11);
  1356. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1357. spin_lock_irqsave(&dev->slock,flags);
  1358. while (!list_empty(&q->active)) {
  1359. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1360. list_del(&buf->vb.queue);
  1361. buf->vb.state = VIDEOBUF_ERROR;
  1362. wake_up(&buf->vb.done);
  1363. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1364. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1365. }
  1366. restart_video_queue(dev,q);
  1367. spin_unlock_irqrestore(&dev->slock,flags);
  1368. }
  1369. static const char *cx88_vid_irqs[32] = {
  1370. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1371. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1372. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1373. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1374. "opc_err", "par_err", "rip_err", "pci_abort",
  1375. };
  1376. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1377. {
  1378. struct cx88_core *core = dev->core;
  1379. u32 status, mask, count;
  1380. status = cx_read(MO_VID_INTSTAT);
  1381. mask = cx_read(MO_VID_INTMSK);
  1382. if (0 == (status & mask))
  1383. return;
  1384. cx_write(MO_VID_INTSTAT, status);
  1385. if (irq_debug || (status & mask & ~0xff))
  1386. cx88_print_irqbits(core->name, "irq vid",
  1387. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1388. status, mask);
  1389. /* risc op code error */
  1390. if (status & (1 << 16)) {
  1391. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1392. cx_clear(MO_VID_DMACNTRL, 0x11);
  1393. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1394. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1395. }
  1396. /* risc1 y */
  1397. if (status & 0x01) {
  1398. spin_lock(&dev->slock);
  1399. count = cx_read(MO_VIDY_GPCNT);
  1400. cx88_wakeup(core, &dev->vidq, count);
  1401. spin_unlock(&dev->slock);
  1402. }
  1403. /* risc1 vbi */
  1404. if (status & 0x08) {
  1405. spin_lock(&dev->slock);
  1406. count = cx_read(MO_VBI_GPCNT);
  1407. cx88_wakeup(core, &dev->vbiq, count);
  1408. spin_unlock(&dev->slock);
  1409. }
  1410. /* risc2 y */
  1411. if (status & 0x10) {
  1412. dprintk(2,"stopper video\n");
  1413. spin_lock(&dev->slock);
  1414. restart_video_queue(dev,&dev->vidq);
  1415. spin_unlock(&dev->slock);
  1416. }
  1417. /* risc2 vbi */
  1418. if (status & 0x80) {
  1419. dprintk(2,"stopper vbi\n");
  1420. spin_lock(&dev->slock);
  1421. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1422. spin_unlock(&dev->slock);
  1423. }
  1424. }
  1425. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1426. {
  1427. struct cx8800_dev *dev = dev_id;
  1428. struct cx88_core *core = dev->core;
  1429. u32 status;
  1430. int loop, handled = 0;
  1431. for (loop = 0; loop < 10; loop++) {
  1432. status = cx_read(MO_PCI_INTSTAT) &
  1433. (core->pci_irqmask | PCI_INT_VIDINT);
  1434. if (0 == status)
  1435. goto out;
  1436. cx_write(MO_PCI_INTSTAT, status);
  1437. handled = 1;
  1438. if (status & core->pci_irqmask)
  1439. cx88_core_irq(core,status);
  1440. if (status & PCI_INT_VIDINT)
  1441. cx8800_vid_irq(dev);
  1442. };
  1443. if (10 == loop) {
  1444. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1445. core->name);
  1446. cx_write(MO_PCI_INTMSK,0);
  1447. }
  1448. out:
  1449. return IRQ_RETVAL(handled);
  1450. }
  1451. /* ----------------------------------------------------------- */
  1452. /* exported stuff */
  1453. static const struct v4l2_file_operations video_fops =
  1454. {
  1455. .owner = THIS_MODULE,
  1456. .open = video_open,
  1457. .release = video_release,
  1458. .read = video_read,
  1459. .poll = video_poll,
  1460. .mmap = video_mmap,
  1461. .ioctl = video_ioctl2,
  1462. };
  1463. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1464. .vidioc_querycap = vidioc_querycap,
  1465. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1466. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1467. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1468. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1469. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1470. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1471. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1472. .vidioc_reqbufs = vidioc_reqbufs,
  1473. .vidioc_querybuf = vidioc_querybuf,
  1474. .vidioc_qbuf = vidioc_qbuf,
  1475. .vidioc_dqbuf = vidioc_dqbuf,
  1476. .vidioc_s_std = vidioc_s_std,
  1477. .vidioc_enum_input = vidioc_enum_input,
  1478. .vidioc_g_input = vidioc_g_input,
  1479. .vidioc_s_input = vidioc_s_input,
  1480. .vidioc_queryctrl = vidioc_queryctrl,
  1481. .vidioc_g_ctrl = vidioc_g_ctrl,
  1482. .vidioc_s_ctrl = vidioc_s_ctrl,
  1483. .vidioc_streamon = vidioc_streamon,
  1484. .vidioc_streamoff = vidioc_streamoff,
  1485. #ifdef CONFIG_VIDEO_V4L1_COMPAT
  1486. .vidiocgmbuf = vidiocgmbuf,
  1487. #endif
  1488. .vidioc_g_tuner = vidioc_g_tuner,
  1489. .vidioc_s_tuner = vidioc_s_tuner,
  1490. .vidioc_g_frequency = vidioc_g_frequency,
  1491. .vidioc_s_frequency = vidioc_s_frequency,
  1492. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1493. .vidioc_g_register = vidioc_g_register,
  1494. .vidioc_s_register = vidioc_s_register,
  1495. #endif
  1496. };
  1497. static struct video_device cx8800_vbi_template;
  1498. static const struct video_device cx8800_video_template = {
  1499. .name = "cx8800-video",
  1500. .fops = &video_fops,
  1501. .ioctl_ops = &video_ioctl_ops,
  1502. .tvnorms = CX88_NORMS,
  1503. .current_norm = V4L2_STD_NTSC_M,
  1504. };
  1505. static const struct v4l2_file_operations radio_fops =
  1506. {
  1507. .owner = THIS_MODULE,
  1508. .open = video_open,
  1509. .release = video_release,
  1510. .ioctl = video_ioctl2,
  1511. };
  1512. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1513. .vidioc_querycap = radio_querycap,
  1514. .vidioc_g_tuner = radio_g_tuner,
  1515. .vidioc_enum_input = radio_enum_input,
  1516. .vidioc_g_audio = radio_g_audio,
  1517. .vidioc_s_tuner = radio_s_tuner,
  1518. .vidioc_s_audio = radio_s_audio,
  1519. .vidioc_s_input = radio_s_input,
  1520. .vidioc_queryctrl = radio_queryctrl,
  1521. .vidioc_g_ctrl = vidioc_g_ctrl,
  1522. .vidioc_s_ctrl = vidioc_s_ctrl,
  1523. .vidioc_g_frequency = vidioc_g_frequency,
  1524. .vidioc_s_frequency = vidioc_s_frequency,
  1525. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1526. .vidioc_g_register = vidioc_g_register,
  1527. .vidioc_s_register = vidioc_s_register,
  1528. #endif
  1529. };
  1530. static const struct video_device cx8800_radio_template = {
  1531. .name = "cx8800-radio",
  1532. .fops = &radio_fops,
  1533. .ioctl_ops = &radio_ioctl_ops,
  1534. };
  1535. /* ----------------------------------------------------------- */
  1536. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1537. {
  1538. if (dev->radio_dev) {
  1539. if (video_is_registered(dev->radio_dev))
  1540. video_unregister_device(dev->radio_dev);
  1541. else
  1542. video_device_release(dev->radio_dev);
  1543. dev->radio_dev = NULL;
  1544. }
  1545. if (dev->vbi_dev) {
  1546. if (video_is_registered(dev->vbi_dev))
  1547. video_unregister_device(dev->vbi_dev);
  1548. else
  1549. video_device_release(dev->vbi_dev);
  1550. dev->vbi_dev = NULL;
  1551. }
  1552. if (dev->video_dev) {
  1553. if (video_is_registered(dev->video_dev))
  1554. video_unregister_device(dev->video_dev);
  1555. else
  1556. video_device_release(dev->video_dev);
  1557. dev->video_dev = NULL;
  1558. }
  1559. }
  1560. static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
  1561. const struct pci_device_id *pci_id)
  1562. {
  1563. struct cx8800_dev *dev;
  1564. struct cx88_core *core;
  1565. int err;
  1566. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1567. if (NULL == dev)
  1568. return -ENOMEM;
  1569. /* pci init */
  1570. dev->pci = pci_dev;
  1571. if (pci_enable_device(pci_dev)) {
  1572. err = -EIO;
  1573. goto fail_free;
  1574. }
  1575. core = cx88_core_get(dev->pci);
  1576. if (NULL == core) {
  1577. err = -EINVAL;
  1578. goto fail_free;
  1579. }
  1580. dev->core = core;
  1581. /* print pci info */
  1582. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
  1583. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1584. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1585. "latency: %d, mmio: 0x%llx\n", core->name,
  1586. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1587. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1588. pci_set_master(pci_dev);
  1589. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1590. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1591. err = -EIO;
  1592. goto fail_core;
  1593. }
  1594. /* Initialize VBI template */
  1595. memcpy( &cx8800_vbi_template, &cx8800_video_template,
  1596. sizeof(cx8800_vbi_template) );
  1597. strcpy(cx8800_vbi_template.name,"cx8800-vbi");
  1598. /* initialize driver struct */
  1599. spin_lock_init(&dev->slock);
  1600. core->tvnorm = cx8800_video_template.current_norm;
  1601. /* init video dma queues */
  1602. INIT_LIST_HEAD(&dev->vidq.active);
  1603. INIT_LIST_HEAD(&dev->vidq.queued);
  1604. dev->vidq.timeout.function = cx8800_vid_timeout;
  1605. dev->vidq.timeout.data = (unsigned long)dev;
  1606. init_timer(&dev->vidq.timeout);
  1607. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1608. MO_VID_DMACNTRL,0x11,0x00);
  1609. /* init vbi dma queues */
  1610. INIT_LIST_HEAD(&dev->vbiq.active);
  1611. INIT_LIST_HEAD(&dev->vbiq.queued);
  1612. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1613. dev->vbiq.timeout.data = (unsigned long)dev;
  1614. init_timer(&dev->vbiq.timeout);
  1615. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1616. MO_VID_DMACNTRL,0x88,0x00);
  1617. /* get irq */
  1618. err = request_irq(pci_dev->irq, cx8800_irq,
  1619. IRQF_SHARED | IRQF_DISABLED, core->name, dev);
  1620. if (err < 0) {
  1621. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1622. core->name,pci_dev->irq);
  1623. goto fail_core;
  1624. }
  1625. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1626. /* load and configure helper modules */
  1627. if (core->board.audio_chip == V4L2_IDENT_WM8775)
  1628. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1629. "wm8775", "wm8775", 0x36 >> 1, NULL);
  1630. if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
  1631. /* This probes for a tda9874 as is used on some
  1632. Pixelview Ultra boards. */
  1633. v4l2_i2c_new_subdev(&core->v4l2_dev,
  1634. &core->i2c_adap,
  1635. "tvaudio", "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1636. }
  1637. switch (core->boardnr) {
  1638. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1639. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1640. static const struct i2c_board_info rtc_info = {
  1641. I2C_BOARD_INFO("isl1208", 0x6f)
  1642. };
  1643. request_module("rtc-isl1208");
  1644. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1645. }
  1646. /* break intentionally omitted */
  1647. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1648. request_module("ir-kbd-i2c");
  1649. }
  1650. /* register v4l devices */
  1651. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1652. &cx8800_video_template,"video");
  1653. video_set_drvdata(dev->video_dev, dev);
  1654. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1655. video_nr[core->nr]);
  1656. if (err < 0) {
  1657. printk(KERN_ERR "%s/0: can't register video device\n",
  1658. core->name);
  1659. goto fail_unreg;
  1660. }
  1661. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1662. core->name, video_device_node_name(dev->video_dev));
  1663. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1664. video_set_drvdata(dev->vbi_dev, dev);
  1665. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1666. vbi_nr[core->nr]);
  1667. if (err < 0) {
  1668. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1669. core->name);
  1670. goto fail_unreg;
  1671. }
  1672. printk(KERN_INFO "%s/0: registered device %s\n",
  1673. core->name, video_device_node_name(dev->vbi_dev));
  1674. if (core->board.radio.type == CX88_RADIO) {
  1675. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1676. &cx8800_radio_template,"radio");
  1677. video_set_drvdata(dev->radio_dev, dev);
  1678. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1679. radio_nr[core->nr]);
  1680. if (err < 0) {
  1681. printk(KERN_ERR "%s/0: can't register radio device\n",
  1682. core->name);
  1683. goto fail_unreg;
  1684. }
  1685. printk(KERN_INFO "%s/0: registered device %s\n",
  1686. core->name, video_device_node_name(dev->radio_dev));
  1687. }
  1688. /* everything worked */
  1689. pci_set_drvdata(pci_dev,dev);
  1690. /* initial device configuration */
  1691. mutex_lock(&core->lock);
  1692. cx88_set_tvnorm(core,core->tvnorm);
  1693. init_controls(core);
  1694. cx88_video_mux(core,0);
  1695. mutex_unlock(&core->lock);
  1696. /* start tvaudio thread */
  1697. if (core->board.tuner_type != TUNER_ABSENT) {
  1698. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1699. if (IS_ERR(core->kthread)) {
  1700. err = PTR_ERR(core->kthread);
  1701. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1702. core->name, err);
  1703. }
  1704. }
  1705. return 0;
  1706. fail_unreg:
  1707. cx8800_unregister_video(dev);
  1708. free_irq(pci_dev->irq, dev);
  1709. fail_core:
  1710. cx88_core_put(core,dev->pci);
  1711. fail_free:
  1712. kfree(dev);
  1713. return err;
  1714. }
  1715. static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
  1716. {
  1717. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1718. struct cx88_core *core = dev->core;
  1719. /* stop thread */
  1720. if (core->kthread) {
  1721. kthread_stop(core->kthread);
  1722. core->kthread = NULL;
  1723. }
  1724. if (core->ir)
  1725. cx88_ir_stop(core);
  1726. cx88_shutdown(core); /* FIXME */
  1727. pci_disable_device(pci_dev);
  1728. /* unregister stuff */
  1729. free_irq(pci_dev->irq, dev);
  1730. cx8800_unregister_video(dev);
  1731. pci_set_drvdata(pci_dev, NULL);
  1732. /* free memory */
  1733. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1734. cx88_core_put(core,dev->pci);
  1735. kfree(dev);
  1736. }
  1737. #ifdef CONFIG_PM
  1738. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1739. {
  1740. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1741. struct cx88_core *core = dev->core;
  1742. /* stop video+vbi capture */
  1743. spin_lock(&dev->slock);
  1744. if (!list_empty(&dev->vidq.active)) {
  1745. printk("%s/0: suspend video\n", core->name);
  1746. stop_video_dma(dev);
  1747. del_timer(&dev->vidq.timeout);
  1748. }
  1749. if (!list_empty(&dev->vbiq.active)) {
  1750. printk("%s/0: suspend vbi\n", core->name);
  1751. cx8800_stop_vbi_dma(dev);
  1752. del_timer(&dev->vbiq.timeout);
  1753. }
  1754. spin_unlock(&dev->slock);
  1755. if (core->ir)
  1756. cx88_ir_stop(core);
  1757. /* FIXME -- shutdown device */
  1758. cx88_shutdown(core);
  1759. pci_save_state(pci_dev);
  1760. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1761. pci_disable_device(pci_dev);
  1762. dev->state.disabled = 1;
  1763. }
  1764. return 0;
  1765. }
  1766. static int cx8800_resume(struct pci_dev *pci_dev)
  1767. {
  1768. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1769. struct cx88_core *core = dev->core;
  1770. int err;
  1771. if (dev->state.disabled) {
  1772. err=pci_enable_device(pci_dev);
  1773. if (err) {
  1774. printk(KERN_ERR "%s/0: can't enable device\n",
  1775. core->name);
  1776. return err;
  1777. }
  1778. dev->state.disabled = 0;
  1779. }
  1780. err= pci_set_power_state(pci_dev, PCI_D0);
  1781. if (err) {
  1782. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1783. pci_disable_device(pci_dev);
  1784. dev->state.disabled = 1;
  1785. return err;
  1786. }
  1787. pci_restore_state(pci_dev);
  1788. /* FIXME: re-initialize hardware */
  1789. cx88_reset(core);
  1790. if (core->ir)
  1791. cx88_ir_start(core);
  1792. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1793. /* restart video+vbi capture */
  1794. spin_lock(&dev->slock);
  1795. if (!list_empty(&dev->vidq.active)) {
  1796. printk("%s/0: resume video\n", core->name);
  1797. restart_video_queue(dev,&dev->vidq);
  1798. }
  1799. if (!list_empty(&dev->vbiq.active)) {
  1800. printk("%s/0: resume vbi\n", core->name);
  1801. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1802. }
  1803. spin_unlock(&dev->slock);
  1804. return 0;
  1805. }
  1806. #endif
  1807. /* ----------------------------------------------------------- */
  1808. static const struct pci_device_id cx8800_pci_tbl[] = {
  1809. {
  1810. .vendor = 0x14f1,
  1811. .device = 0x8800,
  1812. .subvendor = PCI_ANY_ID,
  1813. .subdevice = PCI_ANY_ID,
  1814. },{
  1815. /* --- end of list --- */
  1816. }
  1817. };
  1818. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1819. static struct pci_driver cx8800_pci_driver = {
  1820. .name = "cx8800",
  1821. .id_table = cx8800_pci_tbl,
  1822. .probe = cx8800_initdev,
  1823. .remove = __devexit_p(cx8800_finidev),
  1824. #ifdef CONFIG_PM
  1825. .suspend = cx8800_suspend,
  1826. .resume = cx8800_resume,
  1827. #endif
  1828. };
  1829. static int __init cx8800_init(void)
  1830. {
  1831. printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
  1832. (CX88_VERSION_CODE >> 16) & 0xff,
  1833. (CX88_VERSION_CODE >> 8) & 0xff,
  1834. CX88_VERSION_CODE & 0xff);
  1835. #ifdef SNAPSHOT
  1836. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1837. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1838. #endif
  1839. return pci_register_driver(&cx8800_pci_driver);
  1840. }
  1841. static void __exit cx8800_fini(void)
  1842. {
  1843. pci_unregister_driver(&cx8800_pci_driver);
  1844. }
  1845. module_init(cx8800_init);
  1846. module_exit(cx8800_fini);
  1847. /* ----------------------------------------------------------- */
  1848. /*
  1849. * Local variables:
  1850. * c-basic-offset: 8
  1851. * End:
  1852. * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
  1853. */