sfe4001.c 11 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2007-2008 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. /*****************************************************************************
  10. * Support for the SFE4001 and SFN4111T NICs.
  11. *
  12. * The SFE4001 does not power-up fully at reset due to its high power
  13. * consumption. We control its power via a PCA9539 I/O expander.
  14. * Both boards have a MAX6647 temperature monitor which we expose to
  15. * the lm90 driver.
  16. *
  17. * This also provides minimal support for reflashing the PHY, which is
  18. * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
  19. * On SFE4001 rev A2 and later this is connected to the 3V3X output of
  20. * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
  21. * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
  22. * exclusive with the network device being open.
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/rtnetlink.h>
  26. #include "net_driver.h"
  27. #include "efx.h"
  28. #include "phy.h"
  29. #include "boards.h"
  30. #include "falcon.h"
  31. #include "falcon_hwdefs.h"
  32. #include "falcon_io.h"
  33. #include "mac.h"
  34. #include "workarounds.h"
  35. /**************************************************************************
  36. *
  37. * I2C IO Expander device
  38. *
  39. **************************************************************************/
  40. #define PCA9539 0x74
  41. #define P0_IN 0x00
  42. #define P0_OUT 0x02
  43. #define P0_INVERT 0x04
  44. #define P0_CONFIG 0x06
  45. #define P0_EN_1V0X_LBN 0
  46. #define P0_EN_1V0X_WIDTH 1
  47. #define P0_EN_1V2_LBN 1
  48. #define P0_EN_1V2_WIDTH 1
  49. #define P0_EN_2V5_LBN 2
  50. #define P0_EN_2V5_WIDTH 1
  51. #define P0_EN_3V3X_LBN 3
  52. #define P0_EN_3V3X_WIDTH 1
  53. #define P0_EN_5V_LBN 4
  54. #define P0_EN_5V_WIDTH 1
  55. #define P0_SHORTEN_JTAG_LBN 5
  56. #define P0_SHORTEN_JTAG_WIDTH 1
  57. #define P0_X_TRST_LBN 6
  58. #define P0_X_TRST_WIDTH 1
  59. #define P0_DSP_RESET_LBN 7
  60. #define P0_DSP_RESET_WIDTH 1
  61. #define P1_IN 0x01
  62. #define P1_OUT 0x03
  63. #define P1_INVERT 0x05
  64. #define P1_CONFIG 0x07
  65. #define P1_AFE_PWD_LBN 0
  66. #define P1_AFE_PWD_WIDTH 1
  67. #define P1_DSP_PWD25_LBN 1
  68. #define P1_DSP_PWD25_WIDTH 1
  69. #define P1_RESERVED_LBN 2
  70. #define P1_RESERVED_WIDTH 2
  71. #define P1_SPARE_LBN 4
  72. #define P1_SPARE_WIDTH 4
  73. /* Temperature Sensor */
  74. #define MAX664X_REG_RSL 0x02
  75. #define MAX664X_REG_WLHO 0x0B
  76. static void sfe4001_poweroff(struct efx_nic *efx)
  77. {
  78. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  79. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  80. /* Turn off all power rails and disable outputs */
  81. i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
  82. i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
  83. i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
  84. /* Clear any over-temperature alert */
  85. i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  86. }
  87. static int sfe4001_poweron(struct efx_nic *efx)
  88. {
  89. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  90. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  91. unsigned int i, j;
  92. int rc;
  93. u8 out;
  94. /* Clear any previous over-temperature alert */
  95. rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  96. if (rc < 0)
  97. return rc;
  98. /* Enable port 0 and port 1 outputs on IO expander */
  99. rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
  100. if (rc)
  101. return rc;
  102. rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
  103. 0xff & ~(1 << P1_SPARE_LBN));
  104. if (rc)
  105. goto fail_on;
  106. /* If PHY power is on, turn it all off and wait 1 second to
  107. * ensure a full reset.
  108. */
  109. rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
  110. if (rc < 0)
  111. goto fail_on;
  112. out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
  113. (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
  114. (0 << P0_EN_1V0X_LBN));
  115. if (rc != out) {
  116. EFX_INFO(efx, "power-cycling PHY\n");
  117. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  118. if (rc)
  119. goto fail_on;
  120. schedule_timeout_uninterruptible(HZ);
  121. }
  122. for (i = 0; i < 20; ++i) {
  123. /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
  124. out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
  125. (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
  126. (1 << P0_X_TRST_LBN));
  127. if (efx->phy_mode & PHY_MODE_SPECIAL)
  128. out |= 1 << P0_EN_3V3X_LBN;
  129. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  130. if (rc)
  131. goto fail_on;
  132. msleep(10);
  133. /* Turn on 1V power rail */
  134. out &= ~(1 << P0_EN_1V0X_LBN);
  135. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  136. if (rc)
  137. goto fail_on;
  138. EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
  139. /* In flash config mode, DSP does not turn on AFE, so
  140. * just wait 1 second.
  141. */
  142. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  143. schedule_timeout_uninterruptible(HZ);
  144. return 0;
  145. }
  146. for (j = 0; j < 10; ++j) {
  147. msleep(100);
  148. /* Check DSP has asserted AFE power line */
  149. rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
  150. if (rc < 0)
  151. goto fail_on;
  152. if (rc & (1 << P1_AFE_PWD_LBN))
  153. return 0;
  154. }
  155. }
  156. EFX_INFO(efx, "timed out waiting for DSP boot\n");
  157. rc = -ETIMEDOUT;
  158. fail_on:
  159. sfe4001_poweroff(efx);
  160. return rc;
  161. }
  162. static int sfn4111t_reset(struct efx_nic *efx)
  163. {
  164. efx_oword_t reg;
  165. /* GPIO pins are also used for I2C, so block that temporarily */
  166. mutex_lock(&efx->i2c_adap.bus_lock);
  167. falcon_read(efx, &reg, GPIO_CTL_REG_KER);
  168. EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
  169. EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, false);
  170. falcon_write(efx, &reg, GPIO_CTL_REG_KER);
  171. msleep(1000);
  172. EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, true);
  173. EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, true);
  174. EFX_SET_OWORD_FIELD(reg, GPIO3_OUT,
  175. !(efx->phy_mode & PHY_MODE_SPECIAL));
  176. falcon_write(efx, &reg, GPIO_CTL_REG_KER);
  177. mutex_unlock(&efx->i2c_adap.bus_lock);
  178. ssleep(1);
  179. return 0;
  180. }
  181. static ssize_t show_phy_flash_cfg(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  185. return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
  186. }
  187. static ssize_t set_phy_flash_cfg(struct device *dev,
  188. struct device_attribute *attr,
  189. const char *buf, size_t count)
  190. {
  191. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  192. enum efx_phy_mode old_mode, new_mode;
  193. int err;
  194. rtnl_lock();
  195. old_mode = efx->phy_mode;
  196. if (count == 0 || *buf == '0')
  197. new_mode = old_mode & ~PHY_MODE_SPECIAL;
  198. else
  199. new_mode = PHY_MODE_SPECIAL;
  200. if (old_mode == new_mode) {
  201. err = 0;
  202. } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
  203. err = -EBUSY;
  204. } else {
  205. efx->phy_mode = new_mode;
  206. if (efx->board_info.type == EFX_BOARD_SFE4001)
  207. err = sfe4001_poweron(efx);
  208. else
  209. err = sfn4111t_reset(efx);
  210. efx_reconfigure_port(efx);
  211. }
  212. rtnl_unlock();
  213. return err ? err : count;
  214. }
  215. static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
  216. static void sfe4001_fini(struct efx_nic *efx)
  217. {
  218. EFX_INFO(efx, "%s\n", __func__);
  219. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  220. sfe4001_poweroff(efx);
  221. i2c_unregister_device(efx->board_info.ioexp_client);
  222. i2c_unregister_device(efx->board_info.hwmon_client);
  223. }
  224. static int sfe4001_check_hw(struct efx_nic *efx)
  225. {
  226. s32 status;
  227. /* If XAUI link is up then do not monitor */
  228. if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
  229. return 0;
  230. /* Check the powered status of the PHY. Lack of power implies that
  231. * the MAX6647 has shut down power to it, probably due to a temp.
  232. * alarm. Reading the power status rather than the MAX6647 status
  233. * directly because the later is read-to-clear and would thus
  234. * start to power up the PHY again when polled, causing us to blip
  235. * the power undesirably.
  236. * We know we can read from the IO expander because we did
  237. * it during power-on. Assume failure now is bad news. */
  238. status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
  239. if (status >= 0 &&
  240. (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
  241. return 0;
  242. /* Use board power control, not PHY power control */
  243. sfe4001_poweroff(efx);
  244. efx->phy_mode = PHY_MODE_OFF;
  245. return (status < 0) ? -EIO : -ERANGE;
  246. }
  247. static struct i2c_board_info sfe4001_hwmon_info = {
  248. I2C_BOARD_INFO("max6647", 0x4e),
  249. .irq = -1,
  250. };
  251. /* This board uses an I2C expander to provider power to the PHY, which needs to
  252. * be turned on before the PHY can be used.
  253. * Context: Process context, rtnl lock held
  254. */
  255. int sfe4001_init(struct efx_nic *efx)
  256. {
  257. int rc;
  258. #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
  259. efx->board_info.hwmon_client =
  260. i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
  261. #else
  262. efx->board_info.hwmon_client =
  263. i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
  264. #endif
  265. if (!efx->board_info.hwmon_client)
  266. return -EIO;
  267. /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
  268. rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
  269. MAX664X_REG_WLHO, 90);
  270. if (rc)
  271. goto fail_hwmon;
  272. efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
  273. if (!efx->board_info.ioexp_client) {
  274. rc = -EIO;
  275. goto fail_hwmon;
  276. }
  277. /* 10Xpress has fixed-function LED pins, so there is no board-specific
  278. * blink code. */
  279. efx->board_info.blink = tenxpress_phy_blink;
  280. efx->board_info.monitor = sfe4001_check_hw;
  281. efx->board_info.fini = sfe4001_fini;
  282. rc = sfe4001_poweron(efx);
  283. if (rc)
  284. goto fail_ioexp;
  285. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  286. if (rc)
  287. goto fail_on;
  288. EFX_INFO(efx, "PHY is powered on\n");
  289. return 0;
  290. fail_on:
  291. sfe4001_poweroff(efx);
  292. fail_ioexp:
  293. i2c_unregister_device(efx->board_info.ioexp_client);
  294. fail_hwmon:
  295. i2c_unregister_device(efx->board_info.hwmon_client);
  296. return rc;
  297. }
  298. static int sfn4111t_check_hw(struct efx_nic *efx)
  299. {
  300. s32 status;
  301. /* If XAUI link is up then do not monitor */
  302. if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
  303. return 0;
  304. /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
  305. status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
  306. MAX664X_REG_RSL);
  307. if (status < 0)
  308. return -EIO;
  309. if (status & 0x57)
  310. return -ERANGE;
  311. return 0;
  312. }
  313. static void sfn4111t_fini(struct efx_nic *efx)
  314. {
  315. EFX_INFO(efx, "%s\n", __func__);
  316. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  317. i2c_unregister_device(efx->board_info.hwmon_client);
  318. }
  319. static struct i2c_board_info sfn4111t_hwmon_info = {
  320. I2C_BOARD_INFO("max6647", 0x4e),
  321. .irq = -1,
  322. };
  323. int sfn4111t_init(struct efx_nic *efx)
  324. {
  325. int rc;
  326. efx->board_info.hwmon_client =
  327. i2c_new_device(&efx->i2c_adap, &sfn4111t_hwmon_info);
  328. if (!efx->board_info.hwmon_client)
  329. return -EIO;
  330. efx->board_info.blink = tenxpress_phy_blink;
  331. efx->board_info.monitor = sfn4111t_check_hw;
  332. efx->board_info.fini = sfn4111t_fini;
  333. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  334. if (rc)
  335. goto fail_hwmon;
  336. if (efx->phy_mode & PHY_MODE_SPECIAL)
  337. sfn4111t_reset(efx);
  338. return 0;
  339. fail_hwmon:
  340. i2c_unregister_device(efx->board_info.hwmon_client);
  341. return rc;
  342. }