core.h 24 KB

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  1. /*
  2. * core.h -- Core Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_CORE_H_
  13. #define __LINUX_MFD_WM8350_CORE_H_
  14. #include <linux/kernel.h>
  15. #include <linux/mutex.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/mfd/wm8350/pmic.h>
  18. /*
  19. * Register values.
  20. */
  21. #define WM8350_RESET_ID 0x00
  22. #define WM8350_ID 0x01
  23. #define WM8350_SYSTEM_CONTROL_1 0x03
  24. #define WM8350_SYSTEM_CONTROL_2 0x04
  25. #define WM8350_SYSTEM_HIBERNATE 0x05
  26. #define WM8350_INTERFACE_CONTROL 0x06
  27. #define WM8350_POWER_MGMT_1 0x08
  28. #define WM8350_POWER_MGMT_2 0x09
  29. #define WM8350_POWER_MGMT_3 0x0A
  30. #define WM8350_POWER_MGMT_4 0x0B
  31. #define WM8350_POWER_MGMT_5 0x0C
  32. #define WM8350_POWER_MGMT_6 0x0D
  33. #define WM8350_POWER_MGMT_7 0x0E
  34. #define WM8350_SYSTEM_INTERRUPTS 0x18
  35. #define WM8350_INT_STATUS_1 0x19
  36. #define WM8350_INT_STATUS_2 0x1A
  37. #define WM8350_POWER_UP_INT_STATUS 0x1B
  38. #define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
  39. #define WM8350_OVER_CURRENT_INT_STATUS 0x1D
  40. #define WM8350_GPIO_INT_STATUS 0x1E
  41. #define WM8350_COMPARATOR_INT_STATUS 0x1F
  42. #define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
  43. #define WM8350_INT_STATUS_1_MASK 0x21
  44. #define WM8350_INT_STATUS_2_MASK 0x22
  45. #define WM8350_POWER_UP_INT_STATUS_MASK 0x23
  46. #define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
  47. #define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
  48. #define WM8350_GPIO_INT_STATUS_MASK 0x26
  49. #define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
  50. #define WM8350_MAX_REGISTER 0xFF
  51. /*
  52. * Field Definitions.
  53. */
  54. /*
  55. * R0 (0x00) - Reset/ID
  56. */
  57. #define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
  58. /*
  59. * R1 (0x01) - ID
  60. */
  61. #define WM8350_CHIP_REV_MASK 0x7000
  62. #define WM8350_CONF_STS_MASK 0x0C00
  63. #define WM8350_CUST_ID_MASK 0x00FF
  64. /*
  65. * R3 (0x03) - System Control 1
  66. */
  67. #define WM8350_CHIP_ON 0x8000
  68. #define WM8350_POWERCYCLE 0x2000
  69. #define WM8350_VCC_FAULT_OV 0x1000
  70. #define WM8350_REG_RSTB_TIME_MASK 0x0C00
  71. #define WM8350_BG_SLEEP 0x0200
  72. #define WM8350_MEM_VALID 0x0020
  73. #define WM8350_CHIP_SET_UP 0x0010
  74. #define WM8350_ON_DEB_T 0x0008
  75. #define WM8350_ON_POL 0x0002
  76. #define WM8350_IRQ_POL 0x0001
  77. /*
  78. * R4 (0x04) - System Control 2
  79. */
  80. #define WM8350_USB_SUSPEND_8MA 0x8000
  81. #define WM8350_USB_SUSPEND 0x4000
  82. #define WM8350_USB_MSTR 0x2000
  83. #define WM8350_USB_MSTR_SRC 0x1000
  84. #define WM8350_USB_500MA 0x0800
  85. #define WM8350_USB_NOLIM 0x0400
  86. /*
  87. * R5 (0x05) - System Hibernate
  88. */
  89. #define WM8350_HIBERNATE 0x8000
  90. #define WM8350_WDOG_HIB_MODE 0x0080
  91. #define WM8350_REG_HIB_STARTUP_SEQ 0x0040
  92. #define WM8350_REG_RESET_HIB_MODE 0x0020
  93. #define WM8350_RST_HIB_MODE 0x0010
  94. #define WM8350_IRQ_HIB_MODE 0x0008
  95. #define WM8350_MEMRST_HIB_MODE 0x0004
  96. #define WM8350_PCCOMP_HIB_MODE 0x0002
  97. #define WM8350_TEMPMON_HIB_MODE 0x0001
  98. /*
  99. * R6 (0x06) - Interface Control
  100. */
  101. #define WM8350_USE_DEV_PINS 0x8000
  102. #define WM8350_USE_DEV_PINS_MASK 0x8000
  103. #define WM8350_USE_DEV_PINS_SHIFT 15
  104. #define WM8350_DEV_ADDR_MASK 0x6000
  105. #define WM8350_DEV_ADDR_SHIFT 13
  106. #define WM8350_CONFIG_DONE 0x1000
  107. #define WM8350_CONFIG_DONE_MASK 0x1000
  108. #define WM8350_CONFIG_DONE_SHIFT 12
  109. #define WM8350_RECONFIG_AT_ON 0x0800
  110. #define WM8350_RECONFIG_AT_ON_MASK 0x0800
  111. #define WM8350_RECONFIG_AT_ON_SHIFT 11
  112. #define WM8350_AUTOINC 0x0200
  113. #define WM8350_AUTOINC_MASK 0x0200
  114. #define WM8350_AUTOINC_SHIFT 9
  115. #define WM8350_ARA 0x0100
  116. #define WM8350_ARA_MASK 0x0100
  117. #define WM8350_ARA_SHIFT 8
  118. #define WM8350_SPI_CFG 0x0008
  119. #define WM8350_SPI_CFG_MASK 0x0008
  120. #define WM8350_SPI_CFG_SHIFT 3
  121. #define WM8350_SPI_4WIRE 0x0004
  122. #define WM8350_SPI_4WIRE_MASK 0x0004
  123. #define WM8350_SPI_4WIRE_SHIFT 2
  124. #define WM8350_SPI_3WIRE 0x0002
  125. #define WM8350_SPI_3WIRE_MASK 0x0002
  126. #define WM8350_SPI_3WIRE_SHIFT 1
  127. /* Bit values for R06 (0x06) */
  128. #define WM8350_USE_DEV_PINS_PRIMARY 0
  129. #define WM8350_USE_DEV_PINS_DEV 1
  130. #define WM8350_DEV_ADDR_34 0
  131. #define WM8350_DEV_ADDR_36 1
  132. #define WM8350_DEV_ADDR_3C 2
  133. #define WM8350_DEV_ADDR_3E 3
  134. #define WM8350_CONFIG_DONE_OFF 0
  135. #define WM8350_CONFIG_DONE_DONE 1
  136. #define WM8350_RECONFIG_AT_ON_OFF 0
  137. #define WM8350_RECONFIG_AT_ON_ON 1
  138. #define WM8350_AUTOINC_OFF 0
  139. #define WM8350_AUTOINC_ON 1
  140. #define WM8350_ARA_OFF 0
  141. #define WM8350_ARA_ON 1
  142. #define WM8350_SPI_CFG_CMOS 0
  143. #define WM8350_SPI_CFG_OD 1
  144. #define WM8350_SPI_4WIRE_3WIRE 0
  145. #define WM8350_SPI_4WIRE_4WIRE 1
  146. #define WM8350_SPI_3WIRE_I2C 0
  147. #define WM8350_SPI_3WIRE_SPI 1
  148. /*
  149. * R8 (0x08) - Power mgmt (1)
  150. */
  151. #define WM8350_CODEC_ISEL_MASK 0xC000
  152. #define WM8350_VBUFEN 0x2000
  153. #define WM8350_OUTPUT_DRAIN_EN 0x0400
  154. #define WM8350_MIC_DET_ENA 0x0100
  155. #define WM8350_BIASEN 0x0020
  156. #define WM8350_MICBEN 0x0010
  157. #define WM8350_VMIDEN 0x0004
  158. #define WM8350_VMID_MASK 0x0003
  159. #define WM8350_VMID_SHIFT 0
  160. /*
  161. * R9 (0x09) - Power mgmt (2)
  162. */
  163. #define WM8350_IN3R_ENA 0x0800
  164. #define WM8350_IN3L_ENA 0x0400
  165. #define WM8350_INR_ENA 0x0200
  166. #define WM8350_INL_ENA 0x0100
  167. #define WM8350_MIXINR_ENA 0x0080
  168. #define WM8350_MIXINL_ENA 0x0040
  169. #define WM8350_OUT4_ENA 0x0020
  170. #define WM8350_OUT3_ENA 0x0010
  171. #define WM8350_MIXOUTR_ENA 0x0002
  172. #define WM8350_MIXOUTL_ENA 0x0001
  173. /*
  174. * R10 (0x0A) - Power mgmt (3)
  175. */
  176. #define WM8350_IN3R_TO_OUT2R 0x0080
  177. #define WM8350_OUT2R_ENA 0x0008
  178. #define WM8350_OUT2L_ENA 0x0004
  179. #define WM8350_OUT1R_ENA 0x0002
  180. #define WM8350_OUT1L_ENA 0x0001
  181. /*
  182. * R11 (0x0B) - Power mgmt (4)
  183. */
  184. #define WM8350_SYSCLK_ENA 0x4000
  185. #define WM8350_ADC_HPF_ENA 0x2000
  186. #define WM8350_FLL_ENA 0x0800
  187. #define WM8350_FLL_OSC_ENA 0x0400
  188. #define WM8350_TOCLK_ENA 0x0100
  189. #define WM8350_DACR_ENA 0x0020
  190. #define WM8350_DACL_ENA 0x0010
  191. #define WM8350_ADCR_ENA 0x0008
  192. #define WM8350_ADCL_ENA 0x0004
  193. /*
  194. * R12 (0x0C) - Power mgmt (5)
  195. */
  196. #define WM8350_CODEC_ENA 0x1000
  197. #define WM8350_RTC_TICK_ENA 0x0800
  198. #define WM8350_OSC32K_ENA 0x0400
  199. #define WM8350_CHG_ENA 0x0200
  200. #define WM8350_ACC_DET_ENA 0x0100
  201. #define WM8350_AUXADC_ENA 0x0080
  202. #define WM8350_DCMP4_ENA 0x0008
  203. #define WM8350_DCMP3_ENA 0x0004
  204. #define WM8350_DCMP2_ENA 0x0002
  205. #define WM8350_DCMP1_ENA 0x0001
  206. /*
  207. * R13 (0x0D) - Power mgmt (6)
  208. */
  209. #define WM8350_LS_ENA 0x8000
  210. #define WM8350_LDO4_ENA 0x0800
  211. #define WM8350_LDO3_ENA 0x0400
  212. #define WM8350_LDO2_ENA 0x0200
  213. #define WM8350_LDO1_ENA 0x0100
  214. #define WM8350_DC6_ENA 0x0020
  215. #define WM8350_DC5_ENA 0x0010
  216. #define WM8350_DC4_ENA 0x0008
  217. #define WM8350_DC3_ENA 0x0004
  218. #define WM8350_DC2_ENA 0x0002
  219. #define WM8350_DC1_ENA 0x0001
  220. /*
  221. * R14 (0x0E) - Power mgmt (7)
  222. */
  223. #define WM8350_CS2_ENA 0x0002
  224. #define WM8350_CS1_ENA 0x0001
  225. /*
  226. * R24 (0x18) - System Interrupts
  227. */
  228. #define WM8350_OC_INT 0x2000
  229. #define WM8350_UV_INT 0x1000
  230. #define WM8350_PUTO_INT 0x0800
  231. #define WM8350_CS_INT 0x0200
  232. #define WM8350_EXT_INT 0x0100
  233. #define WM8350_CODEC_INT 0x0080
  234. #define WM8350_GP_INT 0x0040
  235. #define WM8350_AUXADC_INT 0x0020
  236. #define WM8350_RTC_INT 0x0010
  237. #define WM8350_SYS_INT 0x0008
  238. #define WM8350_CHG_INT 0x0004
  239. #define WM8350_USB_INT 0x0002
  240. #define WM8350_WKUP_INT 0x0001
  241. /*
  242. * R25 (0x19) - Interrupt Status 1
  243. */
  244. #define WM8350_CHG_BAT_HOT_EINT 0x8000
  245. #define WM8350_CHG_BAT_COLD_EINT 0x4000
  246. #define WM8350_CHG_BAT_FAIL_EINT 0x2000
  247. #define WM8350_CHG_TO_EINT 0x1000
  248. #define WM8350_CHG_END_EINT 0x0800
  249. #define WM8350_CHG_START_EINT 0x0400
  250. #define WM8350_CHG_FAST_RDY_EINT 0x0200
  251. #define WM8350_RTC_PER_EINT 0x0080
  252. #define WM8350_RTC_SEC_EINT 0x0040
  253. #define WM8350_RTC_ALM_EINT 0x0020
  254. #define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
  255. #define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
  256. #define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
  257. /*
  258. * R26 (0x1A) - Interrupt Status 2
  259. */
  260. #define WM8350_CS1_EINT 0x2000
  261. #define WM8350_CS2_EINT 0x1000
  262. #define WM8350_USB_LIMIT_EINT 0x0400
  263. #define WM8350_AUXADC_DATARDY_EINT 0x0100
  264. #define WM8350_AUXADC_DCOMP4_EINT 0x0080
  265. #define WM8350_AUXADC_DCOMP3_EINT 0x0040
  266. #define WM8350_AUXADC_DCOMP2_EINT 0x0020
  267. #define WM8350_AUXADC_DCOMP1_EINT 0x0010
  268. #define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
  269. #define WM8350_SYS_CHIP_GT115_EINT 0x0004
  270. #define WM8350_SYS_CHIP_GT140_EINT 0x0002
  271. #define WM8350_SYS_WDOG_TO_EINT 0x0001
  272. /*
  273. * R27 (0x1B) - Power Up Interrupt Status
  274. */
  275. #define WM8350_PUTO_LDO4_EINT 0x0800
  276. #define WM8350_PUTO_LDO3_EINT 0x0400
  277. #define WM8350_PUTO_LDO2_EINT 0x0200
  278. #define WM8350_PUTO_LDO1_EINT 0x0100
  279. #define WM8350_PUTO_DC6_EINT 0x0020
  280. #define WM8350_PUTO_DC5_EINT 0x0010
  281. #define WM8350_PUTO_DC4_EINT 0x0008
  282. #define WM8350_PUTO_DC3_EINT 0x0004
  283. #define WM8350_PUTO_DC2_EINT 0x0002
  284. #define WM8350_PUTO_DC1_EINT 0x0001
  285. /*
  286. * R28 (0x1C) - Under Voltage Interrupt status
  287. */
  288. #define WM8350_UV_LDO4_EINT 0x0800
  289. #define WM8350_UV_LDO3_EINT 0x0400
  290. #define WM8350_UV_LDO2_EINT 0x0200
  291. #define WM8350_UV_LDO1_EINT 0x0100
  292. #define WM8350_UV_DC6_EINT 0x0020
  293. #define WM8350_UV_DC5_EINT 0x0010
  294. #define WM8350_UV_DC4_EINT 0x0008
  295. #define WM8350_UV_DC3_EINT 0x0004
  296. #define WM8350_UV_DC2_EINT 0x0002
  297. #define WM8350_UV_DC1_EINT 0x0001
  298. /*
  299. * R29 (0x1D) - Over Current Interrupt status
  300. */
  301. #define WM8350_OC_LS_EINT 0x8000
  302. /*
  303. * R30 (0x1E) - GPIO Interrupt Status
  304. */
  305. #define WM8350_GP12_EINT 0x1000
  306. #define WM8350_GP11_EINT 0x0800
  307. #define WM8350_GP10_EINT 0x0400
  308. #define WM8350_GP9_EINT 0x0200
  309. #define WM8350_GP8_EINT 0x0100
  310. #define WM8350_GP7_EINT 0x0080
  311. #define WM8350_GP6_EINT 0x0040
  312. #define WM8350_GP5_EINT 0x0020
  313. #define WM8350_GP4_EINT 0x0010
  314. #define WM8350_GP3_EINT 0x0008
  315. #define WM8350_GP2_EINT 0x0004
  316. #define WM8350_GP1_EINT 0x0002
  317. #define WM8350_GP0_EINT 0x0001
  318. /*
  319. * R31 (0x1F) - Comparator Interrupt Status
  320. */
  321. #define WM8350_EXT_USB_FB_EINT 0x8000
  322. #define WM8350_EXT_WALL_FB_EINT 0x4000
  323. #define WM8350_EXT_BAT_FB_EINT 0x2000
  324. #define WM8350_CODEC_JCK_DET_L_EINT 0x0800
  325. #define WM8350_CODEC_JCK_DET_R_EINT 0x0400
  326. #define WM8350_CODEC_MICSCD_EINT 0x0200
  327. #define WM8350_CODEC_MICD_EINT 0x0100
  328. #define WM8350_WKUP_OFF_STATE_EINT 0x0040
  329. #define WM8350_WKUP_HIB_STATE_EINT 0x0020
  330. #define WM8350_WKUP_CONV_FAULT_EINT 0x0010
  331. #define WM8350_WKUP_WDOG_RST_EINT 0x0008
  332. #define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
  333. #define WM8350_WKUP_ONKEY_EINT 0x0002
  334. #define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
  335. /*
  336. * R32 (0x20) - System Interrupts Mask
  337. */
  338. #define WM8350_IM_OC_INT 0x2000
  339. #define WM8350_IM_UV_INT 0x1000
  340. #define WM8350_IM_PUTO_INT 0x0800
  341. #define WM8350_IM_SPARE_INT 0x0400
  342. #define WM8350_IM_CS_INT 0x0200
  343. #define WM8350_IM_EXT_INT 0x0100
  344. #define WM8350_IM_CODEC_INT 0x0080
  345. #define WM8350_IM_GP_INT 0x0040
  346. #define WM8350_IM_AUXADC_INT 0x0020
  347. #define WM8350_IM_RTC_INT 0x0010
  348. #define WM8350_IM_SYS_INT 0x0008
  349. #define WM8350_IM_CHG_INT 0x0004
  350. #define WM8350_IM_USB_INT 0x0002
  351. #define WM8350_IM_WKUP_INT 0x0001
  352. /*
  353. * R33 (0x21) - Interrupt Status 1 Mask
  354. */
  355. #define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
  356. #define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
  357. #define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
  358. #define WM8350_IM_CHG_TO_EINT 0x1000
  359. #define WM8350_IM_CHG_END_EINT 0x0800
  360. #define WM8350_IM_CHG_START_EINT 0x0400
  361. #define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
  362. #define WM8350_IM_RTC_PER_EINT 0x0080
  363. #define WM8350_IM_RTC_SEC_EINT 0x0040
  364. #define WM8350_IM_RTC_ALM_EINT 0x0020
  365. #define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
  366. #define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
  367. #define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
  368. /*
  369. * R34 (0x22) - Interrupt Status 2 Mask
  370. */
  371. #define WM8350_IM_SPARE2_EINT 0x8000
  372. #define WM8350_IM_SPARE1_EINT 0x4000
  373. #define WM8350_IM_CS1_EINT 0x2000
  374. #define WM8350_IM_CS2_EINT 0x1000
  375. #define WM8350_IM_USB_LIMIT_EINT 0x0400
  376. #define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
  377. #define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
  378. #define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
  379. #define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
  380. #define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
  381. #define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
  382. #define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
  383. #define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
  384. #define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
  385. /*
  386. * R35 (0x23) - Power Up Interrupt Status Mask
  387. */
  388. #define WM8350_IM_PUTO_LDO4_EINT 0x0800
  389. #define WM8350_IM_PUTO_LDO3_EINT 0x0400
  390. #define WM8350_IM_PUTO_LDO2_EINT 0x0200
  391. #define WM8350_IM_PUTO_LDO1_EINT 0x0100
  392. #define WM8350_IM_PUTO_DC6_EINT 0x0020
  393. #define WM8350_IM_PUTO_DC5_EINT 0x0010
  394. #define WM8350_IM_PUTO_DC4_EINT 0x0008
  395. #define WM8350_IM_PUTO_DC3_EINT 0x0004
  396. #define WM8350_IM_PUTO_DC2_EINT 0x0002
  397. #define WM8350_IM_PUTO_DC1_EINT 0x0001
  398. /*
  399. * R36 (0x24) - Under Voltage Interrupt status Mask
  400. */
  401. #define WM8350_IM_UV_LDO4_EINT 0x0800
  402. #define WM8350_IM_UV_LDO3_EINT 0x0400
  403. #define WM8350_IM_UV_LDO2_EINT 0x0200
  404. #define WM8350_IM_UV_LDO1_EINT 0x0100
  405. #define WM8350_IM_UV_DC6_EINT 0x0020
  406. #define WM8350_IM_UV_DC5_EINT 0x0010
  407. #define WM8350_IM_UV_DC4_EINT 0x0008
  408. #define WM8350_IM_UV_DC3_EINT 0x0004
  409. #define WM8350_IM_UV_DC2_EINT 0x0002
  410. #define WM8350_IM_UV_DC1_EINT 0x0001
  411. /*
  412. * R37 (0x25) - Over Current Interrupt status Mask
  413. */
  414. #define WM8350_IM_OC_LS_EINT 0x8000
  415. /*
  416. * R38 (0x26) - GPIO Interrupt Status Mask
  417. */
  418. #define WM8350_IM_GP12_EINT 0x1000
  419. #define WM8350_IM_GP11_EINT 0x0800
  420. #define WM8350_IM_GP10_EINT 0x0400
  421. #define WM8350_IM_GP9_EINT 0x0200
  422. #define WM8350_IM_GP8_EINT 0x0100
  423. #define WM8350_IM_GP7_EINT 0x0080
  424. #define WM8350_IM_GP6_EINT 0x0040
  425. #define WM8350_IM_GP5_EINT 0x0020
  426. #define WM8350_IM_GP4_EINT 0x0010
  427. #define WM8350_IM_GP3_EINT 0x0008
  428. #define WM8350_IM_GP2_EINT 0x0004
  429. #define WM8350_IM_GP1_EINT 0x0002
  430. #define WM8350_IM_GP0_EINT 0x0001
  431. /*
  432. * R39 (0x27) - Comparator Interrupt Status Mask
  433. */
  434. #define WM8350_IM_EXT_USB_FB_EINT 0x8000
  435. #define WM8350_IM_EXT_WALL_FB_EINT 0x4000
  436. #define WM8350_IM_EXT_BAT_FB_EINT 0x2000
  437. #define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
  438. #define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
  439. #define WM8350_IM_CODEC_MICSCD_EINT 0x0200
  440. #define WM8350_IM_CODEC_MICD_EINT 0x0100
  441. #define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
  442. #define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
  443. #define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
  444. #define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
  445. #define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
  446. #define WM8350_IM_WKUP_ONKEY_EINT 0x0002
  447. #define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
  448. /*
  449. * R220 (0xDC) - RAM BIST 1
  450. */
  451. #define WM8350_READ_STATUS 0x0800
  452. #define WM8350_TSTRAM_CLK 0x0100
  453. #define WM8350_TSTRAM_CLK_ENA 0x0080
  454. #define WM8350_STARTSEQ 0x0040
  455. #define WM8350_READ_SRC 0x0020
  456. #define WM8350_COUNT_DIR 0x0010
  457. #define WM8350_TSTRAM_MODE_MASK 0x000E
  458. #define WM8350_TSTRAM_ENA 0x0001
  459. /*
  460. * R225 (0xE1) - DCDC/LDO status
  461. */
  462. #define WM8350_LS_STS 0x8000
  463. #define WM8350_LDO4_STS 0x0800
  464. #define WM8350_LDO3_STS 0x0400
  465. #define WM8350_LDO2_STS 0x0200
  466. #define WM8350_LDO1_STS 0x0100
  467. #define WM8350_DC6_STS 0x0020
  468. #define WM8350_DC5_STS 0x0010
  469. #define WM8350_DC4_STS 0x0008
  470. #define WM8350_DC3_STS 0x0004
  471. #define WM8350_DC2_STS 0x0002
  472. #define WM8350_DC1_STS 0x0001
  473. /* WM8350 wake up conditions */
  474. #define WM8350_IRQ_WKUP_OFF_STATE 43
  475. #define WM8350_IRQ_WKUP_HIB_STATE 44
  476. #define WM8350_IRQ_WKUP_CONV_FAULT 45
  477. #define WM8350_IRQ_WKUP_WDOG_RST 46
  478. #define WM8350_IRQ_WKUP_GP_PWR_ON 47
  479. #define WM8350_IRQ_WKUP_ONKEY 48
  480. #define WM8350_IRQ_WKUP_GP_WAKEUP 49
  481. /* wm8350 chip revisions */
  482. #define WM8350_REV_E 0x4
  483. #define WM8350_REV_F 0x5
  484. #define WM8350_REV_G 0x6
  485. #define WM8350_NUM_IRQ 63
  486. struct wm8350_reg_access {
  487. u16 readable; /* Mask of readable bits */
  488. u16 writable; /* Mask of writable bits */
  489. u16 vol; /* Mask of volatile bits */
  490. };
  491. extern const struct wm8350_reg_access wm8350_reg_io_map[];
  492. extern const u16 wm8350_mode0_defaults[];
  493. extern const u16 wm8350_mode1_defaults[];
  494. extern const u16 wm8350_mode2_defaults[];
  495. extern const u16 wm8350_mode3_defaults[];
  496. struct wm8350;
  497. struct wm8350_irq {
  498. void (*handler) (struct wm8350 *, int, void *);
  499. void *data;
  500. };
  501. struct wm8350 {
  502. int rev; /* chip revision */
  503. struct device *dev;
  504. /* device IO */
  505. union {
  506. struct i2c_client *i2c_client;
  507. struct spi_device *spi_device;
  508. };
  509. int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
  510. int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
  511. void *src);
  512. u16 *reg_cache;
  513. /* Interrupt handling */
  514. struct work_struct irq_work;
  515. struct mutex irq_mutex; /* IRQ table mutex */
  516. struct wm8350_irq irq[WM8350_NUM_IRQ];
  517. int chip_irq;
  518. /* Client devices */
  519. struct wm8350_pmic pmic;
  520. };
  521. /**
  522. * Data to be supplied by the platform to initialise the WM8350.
  523. *
  524. * @init: Function called during driver initialisation. Should be
  525. * used by the platform to configure GPIO functions and similar.
  526. */
  527. struct wm8350_platform_data {
  528. int (*init)(struct wm8350 *wm8350);
  529. };
  530. /*
  531. * WM8350 device initialisation and exit.
  532. */
  533. int wm8350_device_init(struct wm8350 *wm8350, int irq,
  534. struct wm8350_platform_data *pdata);
  535. void wm8350_device_exit(struct wm8350 *wm8350);
  536. /*
  537. * WM8350 device IO
  538. */
  539. int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  540. int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
  541. u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
  542. int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
  543. int wm8350_reg_lock(struct wm8350 *wm8350);
  544. int wm8350_reg_unlock(struct wm8350 *wm8350);
  545. int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
  546. int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
  547. /*
  548. * WM8350 internal interrupts
  549. */
  550. int wm8350_register_irq(struct wm8350 *wm8350, int irq,
  551. void (*handler) (struct wm8350 *, int, void *),
  552. void *data);
  553. int wm8350_free_irq(struct wm8350 *wm8350, int irq);
  554. int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
  555. int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);
  556. #endif