Kconfig 3.0 KB

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  1. if ARCH_TEGRA
  2. comment "NVIDIA Tegra options"
  3. config ARCH_TEGRA_2x_SOC
  4. bool "Enable support for Tegra20 family"
  5. select CPU_V7
  6. select ARM_GIC
  7. select ARCH_REQUIRE_GPIOLIB
  8. select PINCTRL
  9. select PINCTRL_TEGRA20
  10. select USB_ARCH_HAS_EHCI if USB_SUPPORT
  11. select USB_ULPI if USB
  12. select USB_ULPI_VIEWPORT if USB_SUPPORT
  13. select ARM_ERRATA_720789
  14. select ARM_ERRATA_742230
  15. select ARM_ERRATA_751472
  16. select ARM_ERRATA_754327
  17. select ARM_ERRATA_764369 if SMP
  18. select PL310_ERRATA_727915 if CACHE_L2X0
  19. select PL310_ERRATA_769419 if CACHE_L2X0
  20. select CPU_FREQ_TABLE if CPU_FREQ
  21. help
  22. Support for NVIDIA Tegra AP20 and T20 processors, based on the
  23. ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
  24. config ARCH_TEGRA_3x_SOC
  25. bool "Enable support for Tegra30 family"
  26. select CPU_V7
  27. select ARM_GIC
  28. select ARCH_REQUIRE_GPIOLIB
  29. select PINCTRL
  30. select PINCTRL_TEGRA30
  31. select USB_ARCH_HAS_EHCI if USB_SUPPORT
  32. select USB_ULPI if USB
  33. select USB_ULPI_VIEWPORT if USB_SUPPORT
  34. select ARM_ERRATA_743622
  35. select ARM_ERRATA_751472
  36. select ARM_ERRATA_754322
  37. select ARM_ERRATA_764369 if SMP
  38. select PL310_ERRATA_769419 if CACHE_L2X0
  39. select CPU_FREQ_TABLE if CPU_FREQ
  40. help
  41. Support for NVIDIA Tegra T30 processor family, based on the
  42. ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
  43. config TEGRA_PCI
  44. bool "PCI Express support"
  45. depends on ARCH_TEGRA_2x_SOC
  46. select PCI
  47. config TEGRA_AHB
  48. bool "Enable AHB driver for NVIDIA Tegra SoCs"
  49. default y
  50. help
  51. Adds AHB configuration functionality for NVIDIA Tegra SoCs,
  52. which controls AHB bus master arbitration and some
  53. perfomance parameters(priority, prefech size).
  54. choice
  55. prompt "Default low-level debug console UART"
  56. default TEGRA_DEBUG_UART_NONE
  57. config TEGRA_DEBUG_UART_NONE
  58. bool "None"
  59. config TEGRA_DEBUG_UARTA
  60. bool "UART-A"
  61. config TEGRA_DEBUG_UARTB
  62. bool "UART-B"
  63. config TEGRA_DEBUG_UARTC
  64. bool "UART-C"
  65. config TEGRA_DEBUG_UARTD
  66. bool "UART-D"
  67. config TEGRA_DEBUG_UARTE
  68. bool "UART-E"
  69. endchoice
  70. choice
  71. prompt "Automatic low-level debug console UART"
  72. default TEGRA_DEBUG_UART_AUTO_NONE
  73. config TEGRA_DEBUG_UART_AUTO_NONE
  74. bool "None"
  75. config TEGRA_DEBUG_UART_AUTO_ODMDATA
  76. bool "Via ODMDATA"
  77. help
  78. Automatically determines which UART to use for low-level debug based
  79. on the ODMDATA value. This value is part of the BCT, and is written
  80. to the boot memory device using nvflash, or other flashing tool.
  81. When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
  82. 0/1/2/3/4 are UART A/B/C/D/E.
  83. config TEGRA_DEBUG_UART_AUTO_SCRATCH
  84. bool "Via UART scratch register"
  85. help
  86. Automatically determines which UART to use for low-level debug based
  87. on the UART scratch register value. Some bootloaders put ASCII 'D'
  88. in this register when they initialize their own console UART output.
  89. Using this option allows the kernel to automatically pick the same
  90. UART.
  91. endchoice
  92. config TEGRA_EMC_SCALING_ENABLE
  93. bool "Enable scaling the memory frequency"
  94. endif