i915_debugfs.c 34 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. * Keith Packard <keithp@keithp.com>
  26. *
  27. */
  28. #include <linux/seq_file.h>
  29. #include <linux/debugfs.h>
  30. #include <linux/slab.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "intel_drv.h"
  34. #include "intel_ringbuffer.h"
  35. #include "i915_drm.h"
  36. #include "i915_drv.h"
  37. #define DRM_I915_RING_DEBUG 1
  38. #if defined(CONFIG_DEBUG_FS)
  39. enum {
  40. ACTIVE_LIST,
  41. FLUSHING_LIST,
  42. INACTIVE_LIST,
  43. PINNED_LIST,
  44. DEFERRED_FREE_LIST,
  45. };
  46. static const char *yesno(int v)
  47. {
  48. return v ? "yes" : "no";
  49. }
  50. static int i915_capabilities(struct seq_file *m, void *data)
  51. {
  52. struct drm_info_node *node = (struct drm_info_node *) m->private;
  53. struct drm_device *dev = node->minor->dev;
  54. const struct intel_device_info *info = INTEL_INFO(dev);
  55. seq_printf(m, "gen: %d\n", info->gen);
  56. #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  57. B(is_mobile);
  58. B(is_i85x);
  59. B(is_i915g);
  60. B(is_i945gm);
  61. B(is_g33);
  62. B(need_gfx_hws);
  63. B(is_g4x);
  64. B(is_pineview);
  65. B(is_broadwater);
  66. B(is_crestline);
  67. B(has_fbc);
  68. B(has_rc6);
  69. B(has_pipe_cxsr);
  70. B(has_hotplug);
  71. B(cursor_needs_physical);
  72. B(has_overlay);
  73. B(overlay_needs_physical);
  74. B(supports_tv);
  75. B(has_bsd_ring);
  76. B(has_blt_ring);
  77. #undef B
  78. return 0;
  79. }
  80. static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  81. {
  82. if (obj->user_pin_count > 0)
  83. return "P";
  84. else if (obj->pin_count > 0)
  85. return "p";
  86. else
  87. return " ";
  88. }
  89. static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
  90. {
  91. switch (obj->tiling_mode) {
  92. default:
  93. case I915_TILING_NONE: return " ";
  94. case I915_TILING_X: return "X";
  95. case I915_TILING_Y: return "Y";
  96. }
  97. }
  98. static void
  99. describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
  100. {
  101. seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s",
  102. &obj->base,
  103. get_pin_flag(obj),
  104. get_tiling_flag(obj),
  105. obj->base.size,
  106. obj->base.read_domains,
  107. obj->base.write_domain,
  108. obj->last_rendering_seqno,
  109. obj->last_fenced_seqno,
  110. obj->dirty ? " dirty" : "",
  111. obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
  112. if (obj->base.name)
  113. seq_printf(m, " (name: %d)", obj->base.name);
  114. if (obj->fence_reg != I915_FENCE_REG_NONE)
  115. seq_printf(m, " (fence: %d)", obj->fence_reg);
  116. if (obj->gtt_space != NULL)
  117. seq_printf(m, " (gtt offset: %08x, size: %08x)",
  118. obj->gtt_offset, (unsigned int)obj->gtt_space->size);
  119. if (obj->pin_mappable || obj->fault_mappable) {
  120. char s[3], *t = s;
  121. if (obj->pin_mappable)
  122. *t++ = 'p';
  123. if (obj->fault_mappable)
  124. *t++ = 'f';
  125. *t = '\0';
  126. seq_printf(m, " (%s mappable)", s);
  127. }
  128. if (obj->ring != NULL)
  129. seq_printf(m, " (%s)", obj->ring->name);
  130. }
  131. static int i915_gem_object_list_info(struct seq_file *m, void *data)
  132. {
  133. struct drm_info_node *node = (struct drm_info_node *) m->private;
  134. uintptr_t list = (uintptr_t) node->info_ent->data;
  135. struct list_head *head;
  136. struct drm_device *dev = node->minor->dev;
  137. drm_i915_private_t *dev_priv = dev->dev_private;
  138. struct drm_i915_gem_object *obj;
  139. size_t total_obj_size, total_gtt_size;
  140. int count, ret;
  141. ret = mutex_lock_interruptible(&dev->struct_mutex);
  142. if (ret)
  143. return ret;
  144. switch (list) {
  145. case ACTIVE_LIST:
  146. seq_printf(m, "Active:\n");
  147. head = &dev_priv->mm.active_list;
  148. break;
  149. case INACTIVE_LIST:
  150. seq_printf(m, "Inactive:\n");
  151. head = &dev_priv->mm.inactive_list;
  152. break;
  153. case PINNED_LIST:
  154. seq_printf(m, "Pinned:\n");
  155. head = &dev_priv->mm.pinned_list;
  156. break;
  157. case FLUSHING_LIST:
  158. seq_printf(m, "Flushing:\n");
  159. head = &dev_priv->mm.flushing_list;
  160. break;
  161. case DEFERRED_FREE_LIST:
  162. seq_printf(m, "Deferred free:\n");
  163. head = &dev_priv->mm.deferred_free_list;
  164. break;
  165. default:
  166. mutex_unlock(&dev->struct_mutex);
  167. return -EINVAL;
  168. }
  169. total_obj_size = total_gtt_size = count = 0;
  170. list_for_each_entry(obj, head, mm_list) {
  171. seq_printf(m, " ");
  172. describe_obj(m, obj);
  173. seq_printf(m, "\n");
  174. total_obj_size += obj->base.size;
  175. total_gtt_size += obj->gtt_space->size;
  176. count++;
  177. }
  178. mutex_unlock(&dev->struct_mutex);
  179. seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
  180. count, total_obj_size, total_gtt_size);
  181. return 0;
  182. }
  183. #define count_objects(list, member) do { \
  184. list_for_each_entry(obj, list, member) { \
  185. size += obj->gtt_space->size; \
  186. ++count; \
  187. if (obj->map_and_fenceable) { \
  188. mappable_size += obj->gtt_space->size; \
  189. ++mappable_count; \
  190. } \
  191. } \
  192. } while(0)
  193. static int i915_gem_object_info(struct seq_file *m, void* data)
  194. {
  195. struct drm_info_node *node = (struct drm_info_node *) m->private;
  196. struct drm_device *dev = node->minor->dev;
  197. struct drm_i915_private *dev_priv = dev->dev_private;
  198. u32 count, mappable_count;
  199. size_t size, mappable_size;
  200. struct drm_i915_gem_object *obj;
  201. int ret;
  202. ret = mutex_lock_interruptible(&dev->struct_mutex);
  203. if (ret)
  204. return ret;
  205. seq_printf(m, "%u objects, %zu bytes\n",
  206. dev_priv->mm.object_count,
  207. dev_priv->mm.object_memory);
  208. size = count = mappable_size = mappable_count = 0;
  209. count_objects(&dev_priv->mm.gtt_list, gtt_list);
  210. seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
  211. count, mappable_count, size, mappable_size);
  212. size = count = mappable_size = mappable_count = 0;
  213. count_objects(&dev_priv->mm.active_list, mm_list);
  214. count_objects(&dev_priv->mm.flushing_list, mm_list);
  215. seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
  216. count, mappable_count, size, mappable_size);
  217. size = count = mappable_size = mappable_count = 0;
  218. count_objects(&dev_priv->mm.pinned_list, mm_list);
  219. seq_printf(m, " %u [%u] pinned objects, %zu [%zu] bytes\n",
  220. count, mappable_count, size, mappable_size);
  221. size = count = mappable_size = mappable_count = 0;
  222. count_objects(&dev_priv->mm.inactive_list, mm_list);
  223. seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
  224. count, mappable_count, size, mappable_size);
  225. size = count = mappable_size = mappable_count = 0;
  226. count_objects(&dev_priv->mm.deferred_free_list, mm_list);
  227. seq_printf(m, " %u [%u] freed objects, %zu [%zu] bytes\n",
  228. count, mappable_count, size, mappable_size);
  229. size = count = mappable_size = mappable_count = 0;
  230. list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
  231. if (obj->fault_mappable) {
  232. size += obj->gtt_space->size;
  233. ++count;
  234. }
  235. if (obj->pin_mappable) {
  236. mappable_size += obj->gtt_space->size;
  237. ++mappable_count;
  238. }
  239. }
  240. seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
  241. mappable_count, mappable_size);
  242. seq_printf(m, "%u fault mappable objects, %zu bytes\n",
  243. count, size);
  244. seq_printf(m, "%zu [%zu] gtt total\n",
  245. dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
  246. mutex_unlock(&dev->struct_mutex);
  247. return 0;
  248. }
  249. static int i915_gem_pageflip_info(struct seq_file *m, void *data)
  250. {
  251. struct drm_info_node *node = (struct drm_info_node *) m->private;
  252. struct drm_device *dev = node->minor->dev;
  253. unsigned long flags;
  254. struct intel_crtc *crtc;
  255. list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
  256. const char *pipe = crtc->pipe ? "B" : "A";
  257. const char *plane = crtc->plane ? "B" : "A";
  258. struct intel_unpin_work *work;
  259. spin_lock_irqsave(&dev->event_lock, flags);
  260. work = crtc->unpin_work;
  261. if (work == NULL) {
  262. seq_printf(m, "No flip due on pipe %s (plane %s)\n",
  263. pipe, plane);
  264. } else {
  265. if (!work->pending) {
  266. seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
  267. pipe, plane);
  268. } else {
  269. seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
  270. pipe, plane);
  271. }
  272. if (work->enable_stall_check)
  273. seq_printf(m, "Stall check enabled, ");
  274. else
  275. seq_printf(m, "Stall check waiting for page flip ioctl, ");
  276. seq_printf(m, "%d prepares\n", work->pending);
  277. if (work->old_fb_obj) {
  278. struct drm_i915_gem_object *obj = work->old_fb_obj;
  279. if (obj)
  280. seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
  281. }
  282. if (work->pending_flip_obj) {
  283. struct drm_i915_gem_object *obj = work->pending_flip_obj;
  284. if (obj)
  285. seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
  286. }
  287. }
  288. spin_unlock_irqrestore(&dev->event_lock, flags);
  289. }
  290. return 0;
  291. }
  292. static int i915_gem_request_info(struct seq_file *m, void *data)
  293. {
  294. struct drm_info_node *node = (struct drm_info_node *) m->private;
  295. struct drm_device *dev = node->minor->dev;
  296. drm_i915_private_t *dev_priv = dev->dev_private;
  297. struct drm_i915_gem_request *gem_request;
  298. int ret, count;
  299. ret = mutex_lock_interruptible(&dev->struct_mutex);
  300. if (ret)
  301. return ret;
  302. count = 0;
  303. if (!list_empty(&dev_priv->render_ring.request_list)) {
  304. seq_printf(m, "Render requests:\n");
  305. list_for_each_entry(gem_request,
  306. &dev_priv->render_ring.request_list,
  307. list) {
  308. seq_printf(m, " %d @ %d\n",
  309. gem_request->seqno,
  310. (int) (jiffies - gem_request->emitted_jiffies));
  311. }
  312. count++;
  313. }
  314. if (!list_empty(&dev_priv->bsd_ring.request_list)) {
  315. seq_printf(m, "BSD requests:\n");
  316. list_for_each_entry(gem_request,
  317. &dev_priv->bsd_ring.request_list,
  318. list) {
  319. seq_printf(m, " %d @ %d\n",
  320. gem_request->seqno,
  321. (int) (jiffies - gem_request->emitted_jiffies));
  322. }
  323. count++;
  324. }
  325. if (!list_empty(&dev_priv->blt_ring.request_list)) {
  326. seq_printf(m, "BLT requests:\n");
  327. list_for_each_entry(gem_request,
  328. &dev_priv->blt_ring.request_list,
  329. list) {
  330. seq_printf(m, " %d @ %d\n",
  331. gem_request->seqno,
  332. (int) (jiffies - gem_request->emitted_jiffies));
  333. }
  334. count++;
  335. }
  336. mutex_unlock(&dev->struct_mutex);
  337. if (count == 0)
  338. seq_printf(m, "No requests\n");
  339. return 0;
  340. }
  341. static void i915_ring_seqno_info(struct seq_file *m,
  342. struct intel_ring_buffer *ring)
  343. {
  344. if (ring->get_seqno) {
  345. seq_printf(m, "Current sequence (%s): %d\n",
  346. ring->name, ring->get_seqno(ring));
  347. seq_printf(m, "Waiter sequence (%s): %d\n",
  348. ring->name, ring->waiting_seqno);
  349. seq_printf(m, "IRQ sequence (%s): %d\n",
  350. ring->name, ring->irq_seqno);
  351. }
  352. }
  353. static int i915_gem_seqno_info(struct seq_file *m, void *data)
  354. {
  355. struct drm_info_node *node = (struct drm_info_node *) m->private;
  356. struct drm_device *dev = node->minor->dev;
  357. drm_i915_private_t *dev_priv = dev->dev_private;
  358. int ret;
  359. ret = mutex_lock_interruptible(&dev->struct_mutex);
  360. if (ret)
  361. return ret;
  362. i915_ring_seqno_info(m, &dev_priv->render_ring);
  363. i915_ring_seqno_info(m, &dev_priv->bsd_ring);
  364. i915_ring_seqno_info(m, &dev_priv->blt_ring);
  365. mutex_unlock(&dev->struct_mutex);
  366. return 0;
  367. }
  368. static int i915_interrupt_info(struct seq_file *m, void *data)
  369. {
  370. struct drm_info_node *node = (struct drm_info_node *) m->private;
  371. struct drm_device *dev = node->minor->dev;
  372. drm_i915_private_t *dev_priv = dev->dev_private;
  373. int ret;
  374. ret = mutex_lock_interruptible(&dev->struct_mutex);
  375. if (ret)
  376. return ret;
  377. if (!HAS_PCH_SPLIT(dev)) {
  378. seq_printf(m, "Interrupt enable: %08x\n",
  379. I915_READ(IER));
  380. seq_printf(m, "Interrupt identity: %08x\n",
  381. I915_READ(IIR));
  382. seq_printf(m, "Interrupt mask: %08x\n",
  383. I915_READ(IMR));
  384. seq_printf(m, "Pipe A stat: %08x\n",
  385. I915_READ(PIPEASTAT));
  386. seq_printf(m, "Pipe B stat: %08x\n",
  387. I915_READ(PIPEBSTAT));
  388. } else {
  389. seq_printf(m, "North Display Interrupt enable: %08x\n",
  390. I915_READ(DEIER));
  391. seq_printf(m, "North Display Interrupt identity: %08x\n",
  392. I915_READ(DEIIR));
  393. seq_printf(m, "North Display Interrupt mask: %08x\n",
  394. I915_READ(DEIMR));
  395. seq_printf(m, "South Display Interrupt enable: %08x\n",
  396. I915_READ(SDEIER));
  397. seq_printf(m, "South Display Interrupt identity: %08x\n",
  398. I915_READ(SDEIIR));
  399. seq_printf(m, "South Display Interrupt mask: %08x\n",
  400. I915_READ(SDEIMR));
  401. seq_printf(m, "Graphics Interrupt enable: %08x\n",
  402. I915_READ(GTIER));
  403. seq_printf(m, "Graphics Interrupt identity: %08x\n",
  404. I915_READ(GTIIR));
  405. seq_printf(m, "Graphics Interrupt mask: %08x\n",
  406. I915_READ(GTIMR));
  407. }
  408. seq_printf(m, "Interrupts received: %d\n",
  409. atomic_read(&dev_priv->irq_received));
  410. i915_ring_seqno_info(m, &dev_priv->render_ring);
  411. i915_ring_seqno_info(m, &dev_priv->bsd_ring);
  412. i915_ring_seqno_info(m, &dev_priv->blt_ring);
  413. mutex_unlock(&dev->struct_mutex);
  414. return 0;
  415. }
  416. static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
  417. {
  418. struct drm_info_node *node = (struct drm_info_node *) m->private;
  419. struct drm_device *dev = node->minor->dev;
  420. drm_i915_private_t *dev_priv = dev->dev_private;
  421. int i, ret;
  422. ret = mutex_lock_interruptible(&dev->struct_mutex);
  423. if (ret)
  424. return ret;
  425. seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
  426. seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
  427. for (i = 0; i < dev_priv->num_fence_regs; i++) {
  428. struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
  429. seq_printf(m, "Fenced object[%2d] = ", i);
  430. if (obj == NULL)
  431. seq_printf(m, "unused");
  432. else
  433. describe_obj(m, obj);
  434. seq_printf(m, "\n");
  435. }
  436. mutex_unlock(&dev->struct_mutex);
  437. return 0;
  438. }
  439. static int i915_hws_info(struct seq_file *m, void *data)
  440. {
  441. struct drm_info_node *node = (struct drm_info_node *) m->private;
  442. struct drm_device *dev = node->minor->dev;
  443. drm_i915_private_t *dev_priv = dev->dev_private;
  444. struct intel_ring_buffer *ring;
  445. volatile u32 *hws;
  446. int i;
  447. switch ((uintptr_t)node->info_ent->data) {
  448. case RING_RENDER: ring = &dev_priv->render_ring; break;
  449. case RING_BSD: ring = &dev_priv->bsd_ring; break;
  450. case RING_BLT: ring = &dev_priv->blt_ring; break;
  451. default: return -EINVAL;
  452. }
  453. hws = (volatile u32 *)ring->status_page.page_addr;
  454. if (hws == NULL)
  455. return 0;
  456. for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
  457. seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
  458. i * 4,
  459. hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
  460. }
  461. return 0;
  462. }
  463. static void i915_dump_object(struct seq_file *m,
  464. struct io_mapping *mapping,
  465. struct drm_i915_gem_object *obj)
  466. {
  467. int page, page_count, i;
  468. page_count = obj->base.size / PAGE_SIZE;
  469. for (page = 0; page < page_count; page++) {
  470. u32 *mem = io_mapping_map_wc(mapping,
  471. obj->gtt_offset + page * PAGE_SIZE);
  472. for (i = 0; i < PAGE_SIZE; i += 4)
  473. seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
  474. io_mapping_unmap(mem);
  475. }
  476. }
  477. static int i915_batchbuffer_info(struct seq_file *m, void *data)
  478. {
  479. struct drm_info_node *node = (struct drm_info_node *) m->private;
  480. struct drm_device *dev = node->minor->dev;
  481. drm_i915_private_t *dev_priv = dev->dev_private;
  482. struct drm_i915_gem_object *obj;
  483. int ret;
  484. ret = mutex_lock_interruptible(&dev->struct_mutex);
  485. if (ret)
  486. return ret;
  487. list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
  488. if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
  489. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
  490. i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
  491. }
  492. }
  493. mutex_unlock(&dev->struct_mutex);
  494. return 0;
  495. }
  496. static int i915_ringbuffer_data(struct seq_file *m, void *data)
  497. {
  498. struct drm_info_node *node = (struct drm_info_node *) m->private;
  499. struct drm_device *dev = node->minor->dev;
  500. drm_i915_private_t *dev_priv = dev->dev_private;
  501. struct intel_ring_buffer *ring;
  502. int ret;
  503. switch ((uintptr_t)node->info_ent->data) {
  504. case RING_RENDER: ring = &dev_priv->render_ring; break;
  505. case RING_BSD: ring = &dev_priv->bsd_ring; break;
  506. case RING_BLT: ring = &dev_priv->blt_ring; break;
  507. default: return -EINVAL;
  508. }
  509. ret = mutex_lock_interruptible(&dev->struct_mutex);
  510. if (ret)
  511. return ret;
  512. if (!ring->obj) {
  513. seq_printf(m, "No ringbuffer setup\n");
  514. } else {
  515. u8 *virt = ring->virtual_start;
  516. uint32_t off;
  517. for (off = 0; off < ring->size; off += 4) {
  518. uint32_t *ptr = (uint32_t *)(virt + off);
  519. seq_printf(m, "%08x : %08x\n", off, *ptr);
  520. }
  521. }
  522. mutex_unlock(&dev->struct_mutex);
  523. return 0;
  524. }
  525. static int i915_ringbuffer_info(struct seq_file *m, void *data)
  526. {
  527. struct drm_info_node *node = (struct drm_info_node *) m->private;
  528. struct drm_device *dev = node->minor->dev;
  529. drm_i915_private_t *dev_priv = dev->dev_private;
  530. struct intel_ring_buffer *ring;
  531. switch ((uintptr_t)node->info_ent->data) {
  532. case RING_RENDER: ring = &dev_priv->render_ring; break;
  533. case RING_BSD: ring = &dev_priv->bsd_ring; break;
  534. case RING_BLT: ring = &dev_priv->blt_ring; break;
  535. default: return -EINVAL;
  536. }
  537. if (ring->size == 0)
  538. return 0;
  539. seq_printf(m, "Ring %s:\n", ring->name);
  540. seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
  541. seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
  542. seq_printf(m, " Size : %08x\n", ring->size);
  543. seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
  544. seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
  545. seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
  546. return 0;
  547. }
  548. static const char *ring_str(int ring)
  549. {
  550. switch (ring) {
  551. case RING_RENDER: return " render";
  552. case RING_BSD: return " bsd";
  553. case RING_BLT: return " blt";
  554. default: return "";
  555. }
  556. }
  557. static const char *pin_flag(int pinned)
  558. {
  559. if (pinned > 0)
  560. return " P";
  561. else if (pinned < 0)
  562. return " p";
  563. else
  564. return "";
  565. }
  566. static const char *tiling_flag(int tiling)
  567. {
  568. switch (tiling) {
  569. default:
  570. case I915_TILING_NONE: return "";
  571. case I915_TILING_X: return " X";
  572. case I915_TILING_Y: return " Y";
  573. }
  574. }
  575. static const char *dirty_flag(int dirty)
  576. {
  577. return dirty ? " dirty" : "";
  578. }
  579. static const char *purgeable_flag(int purgeable)
  580. {
  581. return purgeable ? " purgeable" : "";
  582. }
  583. static void print_error_buffers(struct seq_file *m,
  584. const char *name,
  585. struct drm_i915_error_buffer *err,
  586. int count)
  587. {
  588. seq_printf(m, "%s [%d]:\n", name, count);
  589. while (count--) {
  590. seq_printf(m, " %08x %8zd %04x %04x %08x%s%s%s%s%s",
  591. err->gtt_offset,
  592. err->size,
  593. err->read_domains,
  594. err->write_domain,
  595. err->seqno,
  596. pin_flag(err->pinned),
  597. tiling_flag(err->tiling),
  598. dirty_flag(err->dirty),
  599. purgeable_flag(err->purgeable),
  600. ring_str(err->ring));
  601. if (err->name)
  602. seq_printf(m, " (name: %d)", err->name);
  603. if (err->fence_reg != I915_FENCE_REG_NONE)
  604. seq_printf(m, " (fence: %d)", err->fence_reg);
  605. seq_printf(m, "\n");
  606. err++;
  607. }
  608. }
  609. static int i915_error_state(struct seq_file *m, void *unused)
  610. {
  611. struct drm_info_node *node = (struct drm_info_node *) m->private;
  612. struct drm_device *dev = node->minor->dev;
  613. drm_i915_private_t *dev_priv = dev->dev_private;
  614. struct drm_i915_error_state *error;
  615. unsigned long flags;
  616. int i, page, offset, elt;
  617. spin_lock_irqsave(&dev_priv->error_lock, flags);
  618. if (!dev_priv->first_error) {
  619. seq_printf(m, "no error state collected\n");
  620. goto out;
  621. }
  622. error = dev_priv->first_error;
  623. seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
  624. error->time.tv_usec);
  625. seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
  626. seq_printf(m, "EIR: 0x%08x\n", error->eir);
  627. seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
  628. if (INTEL_INFO(dev)->gen >= 6) {
  629. seq_printf(m, "ERROR: 0x%08x\n", error->error);
  630. seq_printf(m, "Blitter command stream:\n");
  631. seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
  632. seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
  633. seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
  634. seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
  635. seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
  636. seq_printf(m, "Video (BSD) command stream:\n");
  637. seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
  638. seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
  639. seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
  640. seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
  641. seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
  642. }
  643. seq_printf(m, "Render command stream:\n");
  644. seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
  645. seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
  646. seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
  647. seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
  648. if (INTEL_INFO(dev)->gen >= 4) {
  649. seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
  650. seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
  651. }
  652. seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
  653. seq_printf(m, " seqno: 0x%08x\n", error->seqno);
  654. for (i = 0; i < 16; i++)
  655. seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
  656. if (error->active_bo)
  657. print_error_buffers(m, "Active",
  658. error->active_bo,
  659. error->active_bo_count);
  660. if (error->pinned_bo)
  661. print_error_buffers(m, "Pinned",
  662. error->pinned_bo,
  663. error->pinned_bo_count);
  664. for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
  665. if (error->batchbuffer[i]) {
  666. struct drm_i915_error_object *obj = error->batchbuffer[i];
  667. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
  668. offset = 0;
  669. for (page = 0; page < obj->page_count; page++) {
  670. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  671. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  672. offset += 4;
  673. }
  674. }
  675. }
  676. }
  677. if (error->ringbuffer) {
  678. struct drm_i915_error_object *obj = error->ringbuffer;
  679. seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
  680. offset = 0;
  681. for (page = 0; page < obj->page_count; page++) {
  682. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  683. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  684. offset += 4;
  685. }
  686. }
  687. }
  688. if (error->overlay)
  689. intel_overlay_print_error_state(m, error->overlay);
  690. if (error->display)
  691. intel_display_print_error_state(m, dev, error->display);
  692. out:
  693. spin_unlock_irqrestore(&dev_priv->error_lock, flags);
  694. return 0;
  695. }
  696. static int i915_rstdby_delays(struct seq_file *m, void *unused)
  697. {
  698. struct drm_info_node *node = (struct drm_info_node *) m->private;
  699. struct drm_device *dev = node->minor->dev;
  700. drm_i915_private_t *dev_priv = dev->dev_private;
  701. u16 crstanddelay = I915_READ16(CRSTANDVID);
  702. seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
  703. return 0;
  704. }
  705. static int i915_cur_delayinfo(struct seq_file *m, void *unused)
  706. {
  707. struct drm_info_node *node = (struct drm_info_node *) m->private;
  708. struct drm_device *dev = node->minor->dev;
  709. drm_i915_private_t *dev_priv = dev->dev_private;
  710. u16 rgvswctl = I915_READ16(MEMSWCTL);
  711. u16 rgvstat = I915_READ16(MEMSTAT_ILK);
  712. seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
  713. seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
  714. seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
  715. MEMSTAT_VID_SHIFT);
  716. seq_printf(m, "Current P-state: %d\n",
  717. (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
  718. return 0;
  719. }
  720. static int i915_delayfreq_table(struct seq_file *m, void *unused)
  721. {
  722. struct drm_info_node *node = (struct drm_info_node *) m->private;
  723. struct drm_device *dev = node->minor->dev;
  724. drm_i915_private_t *dev_priv = dev->dev_private;
  725. u32 delayfreq;
  726. int i;
  727. for (i = 0; i < 16; i++) {
  728. delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
  729. seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
  730. (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
  731. }
  732. return 0;
  733. }
  734. static inline int MAP_TO_MV(int map)
  735. {
  736. return 1250 - (map * 25);
  737. }
  738. static int i915_inttoext_table(struct seq_file *m, void *unused)
  739. {
  740. struct drm_info_node *node = (struct drm_info_node *) m->private;
  741. struct drm_device *dev = node->minor->dev;
  742. drm_i915_private_t *dev_priv = dev->dev_private;
  743. u32 inttoext;
  744. int i;
  745. for (i = 1; i <= 32; i++) {
  746. inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
  747. seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
  748. }
  749. return 0;
  750. }
  751. static int i915_drpc_info(struct seq_file *m, void *unused)
  752. {
  753. struct drm_info_node *node = (struct drm_info_node *) m->private;
  754. struct drm_device *dev = node->minor->dev;
  755. drm_i915_private_t *dev_priv = dev->dev_private;
  756. u32 rgvmodectl = I915_READ(MEMMODECTL);
  757. u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
  758. u16 crstandvid = I915_READ16(CRSTANDVID);
  759. seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
  760. "yes" : "no");
  761. seq_printf(m, "Boost freq: %d\n",
  762. (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
  763. MEMMODE_BOOST_FREQ_SHIFT);
  764. seq_printf(m, "HW control enabled: %s\n",
  765. rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
  766. seq_printf(m, "SW control enabled: %s\n",
  767. rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
  768. seq_printf(m, "Gated voltage change: %s\n",
  769. rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
  770. seq_printf(m, "Starting frequency: P%d\n",
  771. (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
  772. seq_printf(m, "Max P-state: P%d\n",
  773. (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
  774. seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
  775. seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
  776. seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
  777. seq_printf(m, "Render standby enabled: %s\n",
  778. (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
  779. return 0;
  780. }
  781. static int i915_fbc_status(struct seq_file *m, void *unused)
  782. {
  783. struct drm_info_node *node = (struct drm_info_node *) m->private;
  784. struct drm_device *dev = node->minor->dev;
  785. drm_i915_private_t *dev_priv = dev->dev_private;
  786. if (!I915_HAS_FBC(dev)) {
  787. seq_printf(m, "FBC unsupported on this chipset\n");
  788. return 0;
  789. }
  790. if (intel_fbc_enabled(dev)) {
  791. seq_printf(m, "FBC enabled\n");
  792. } else {
  793. seq_printf(m, "FBC disabled: ");
  794. switch (dev_priv->no_fbc_reason) {
  795. case FBC_NO_OUTPUT:
  796. seq_printf(m, "no outputs");
  797. break;
  798. case FBC_STOLEN_TOO_SMALL:
  799. seq_printf(m, "not enough stolen memory");
  800. break;
  801. case FBC_UNSUPPORTED_MODE:
  802. seq_printf(m, "mode not supported");
  803. break;
  804. case FBC_MODE_TOO_LARGE:
  805. seq_printf(m, "mode too large");
  806. break;
  807. case FBC_BAD_PLANE:
  808. seq_printf(m, "FBC unsupported on plane");
  809. break;
  810. case FBC_NOT_TILED:
  811. seq_printf(m, "scanout buffer not tiled");
  812. break;
  813. case FBC_MULTIPLE_PIPES:
  814. seq_printf(m, "multiple pipes are enabled");
  815. break;
  816. default:
  817. seq_printf(m, "unknown reason");
  818. }
  819. seq_printf(m, "\n");
  820. }
  821. return 0;
  822. }
  823. static int i915_sr_status(struct seq_file *m, void *unused)
  824. {
  825. struct drm_info_node *node = (struct drm_info_node *) m->private;
  826. struct drm_device *dev = node->minor->dev;
  827. drm_i915_private_t *dev_priv = dev->dev_private;
  828. bool sr_enabled = false;
  829. if (IS_GEN5(dev))
  830. sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
  831. else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
  832. sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
  833. else if (IS_I915GM(dev))
  834. sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
  835. else if (IS_PINEVIEW(dev))
  836. sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
  837. seq_printf(m, "self-refresh: %s\n",
  838. sr_enabled ? "enabled" : "disabled");
  839. return 0;
  840. }
  841. static int i915_emon_status(struct seq_file *m, void *unused)
  842. {
  843. struct drm_info_node *node = (struct drm_info_node *) m->private;
  844. struct drm_device *dev = node->minor->dev;
  845. drm_i915_private_t *dev_priv = dev->dev_private;
  846. unsigned long temp, chipset, gfx;
  847. int ret;
  848. ret = mutex_lock_interruptible(&dev->struct_mutex);
  849. if (ret)
  850. return ret;
  851. temp = i915_mch_val(dev_priv);
  852. chipset = i915_chipset_val(dev_priv);
  853. gfx = i915_gfx_val(dev_priv);
  854. mutex_unlock(&dev->struct_mutex);
  855. seq_printf(m, "GMCH temp: %ld\n", temp);
  856. seq_printf(m, "Chipset power: %ld\n", chipset);
  857. seq_printf(m, "GFX power: %ld\n", gfx);
  858. seq_printf(m, "Total power: %ld\n", chipset + gfx);
  859. return 0;
  860. }
  861. static int i915_gfxec(struct seq_file *m, void *unused)
  862. {
  863. struct drm_info_node *node = (struct drm_info_node *) m->private;
  864. struct drm_device *dev = node->minor->dev;
  865. drm_i915_private_t *dev_priv = dev->dev_private;
  866. seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
  867. return 0;
  868. }
  869. static int i915_opregion(struct seq_file *m, void *unused)
  870. {
  871. struct drm_info_node *node = (struct drm_info_node *) m->private;
  872. struct drm_device *dev = node->minor->dev;
  873. drm_i915_private_t *dev_priv = dev->dev_private;
  874. struct intel_opregion *opregion = &dev_priv->opregion;
  875. int ret;
  876. ret = mutex_lock_interruptible(&dev->struct_mutex);
  877. if (ret)
  878. return ret;
  879. if (opregion->header)
  880. seq_write(m, opregion->header, OPREGION_SIZE);
  881. mutex_unlock(&dev->struct_mutex);
  882. return 0;
  883. }
  884. static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
  885. {
  886. struct drm_info_node *node = (struct drm_info_node *) m->private;
  887. struct drm_device *dev = node->minor->dev;
  888. drm_i915_private_t *dev_priv = dev->dev_private;
  889. struct intel_fbdev *ifbdev;
  890. struct intel_framebuffer *fb;
  891. int ret;
  892. ret = mutex_lock_interruptible(&dev->mode_config.mutex);
  893. if (ret)
  894. return ret;
  895. ifbdev = dev_priv->fbdev;
  896. fb = to_intel_framebuffer(ifbdev->helper.fb);
  897. seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
  898. fb->base.width,
  899. fb->base.height,
  900. fb->base.depth,
  901. fb->base.bits_per_pixel);
  902. describe_obj(m, fb->obj);
  903. seq_printf(m, "\n");
  904. list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
  905. if (&fb->base == ifbdev->helper.fb)
  906. continue;
  907. seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
  908. fb->base.width,
  909. fb->base.height,
  910. fb->base.depth,
  911. fb->base.bits_per_pixel);
  912. describe_obj(m, fb->obj);
  913. seq_printf(m, "\n");
  914. }
  915. mutex_unlock(&dev->mode_config.mutex);
  916. return 0;
  917. }
  918. static int
  919. i915_wedged_open(struct inode *inode,
  920. struct file *filp)
  921. {
  922. filp->private_data = inode->i_private;
  923. return 0;
  924. }
  925. static ssize_t
  926. i915_wedged_read(struct file *filp,
  927. char __user *ubuf,
  928. size_t max,
  929. loff_t *ppos)
  930. {
  931. struct drm_device *dev = filp->private_data;
  932. drm_i915_private_t *dev_priv = dev->dev_private;
  933. char buf[80];
  934. int len;
  935. len = snprintf(buf, sizeof (buf),
  936. "wedged : %d\n",
  937. atomic_read(&dev_priv->mm.wedged));
  938. if (len > sizeof (buf))
  939. len = sizeof (buf);
  940. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  941. }
  942. static ssize_t
  943. i915_wedged_write(struct file *filp,
  944. const char __user *ubuf,
  945. size_t cnt,
  946. loff_t *ppos)
  947. {
  948. struct drm_device *dev = filp->private_data;
  949. char buf[20];
  950. int val = 1;
  951. if (cnt > 0) {
  952. if (cnt > sizeof (buf) - 1)
  953. return -EINVAL;
  954. if (copy_from_user(buf, ubuf, cnt))
  955. return -EFAULT;
  956. buf[cnt] = 0;
  957. val = simple_strtoul(buf, NULL, 0);
  958. }
  959. DRM_INFO("Manually setting wedged to %d\n", val);
  960. i915_handle_error(dev, val);
  961. return cnt;
  962. }
  963. static const struct file_operations i915_wedged_fops = {
  964. .owner = THIS_MODULE,
  965. .open = i915_wedged_open,
  966. .read = i915_wedged_read,
  967. .write = i915_wedged_write,
  968. .llseek = default_llseek,
  969. };
  970. /* As the drm_debugfs_init() routines are called before dev->dev_private is
  971. * allocated we need to hook into the minor for release. */
  972. static int
  973. drm_add_fake_info_node(struct drm_minor *minor,
  974. struct dentry *ent,
  975. const void *key)
  976. {
  977. struct drm_info_node *node;
  978. node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
  979. if (node == NULL) {
  980. debugfs_remove(ent);
  981. return -ENOMEM;
  982. }
  983. node->minor = minor;
  984. node->dent = ent;
  985. node->info_ent = (void *) key;
  986. list_add(&node->list, &minor->debugfs_nodes.list);
  987. return 0;
  988. }
  989. static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
  990. {
  991. struct drm_device *dev = minor->dev;
  992. struct dentry *ent;
  993. ent = debugfs_create_file("i915_wedged",
  994. S_IRUGO | S_IWUSR,
  995. root, dev,
  996. &i915_wedged_fops);
  997. if (IS_ERR(ent))
  998. return PTR_ERR(ent);
  999. return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
  1000. }
  1001. static struct drm_info_list i915_debugfs_list[] = {
  1002. {"i915_capabilities", i915_capabilities, 0, 0},
  1003. {"i915_gem_objects", i915_gem_object_info, 0},
  1004. {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
  1005. {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
  1006. {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
  1007. {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
  1008. {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
  1009. {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
  1010. {"i915_gem_request", i915_gem_request_info, 0},
  1011. {"i915_gem_seqno", i915_gem_seqno_info, 0},
  1012. {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
  1013. {"i915_gem_interrupt", i915_interrupt_info, 0},
  1014. {"i915_gem_hws", i915_hws_info, 0, (void *)RING_RENDER},
  1015. {"i915_gem_hws_blt", i915_hws_info, 0, (void *)RING_BLT},
  1016. {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)RING_BSD},
  1017. {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_RENDER},
  1018. {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_RENDER},
  1019. {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BSD},
  1020. {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BSD},
  1021. {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RING_BLT},
  1022. {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RING_BLT},
  1023. {"i915_batchbuffers", i915_batchbuffer_info, 0},
  1024. {"i915_error_state", i915_error_state, 0},
  1025. {"i915_rstdby_delays", i915_rstdby_delays, 0},
  1026. {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
  1027. {"i915_delayfreq_table", i915_delayfreq_table, 0},
  1028. {"i915_inttoext_table", i915_inttoext_table, 0},
  1029. {"i915_drpc_info", i915_drpc_info, 0},
  1030. {"i915_emon_status", i915_emon_status, 0},
  1031. {"i915_gfxec", i915_gfxec, 0},
  1032. {"i915_fbc_status", i915_fbc_status, 0},
  1033. {"i915_sr_status", i915_sr_status, 0},
  1034. {"i915_opregion", i915_opregion, 0},
  1035. {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
  1036. };
  1037. #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
  1038. int i915_debugfs_init(struct drm_minor *minor)
  1039. {
  1040. int ret;
  1041. ret = i915_wedged_create(minor->debugfs_root, minor);
  1042. if (ret)
  1043. return ret;
  1044. return drm_debugfs_create_files(i915_debugfs_list,
  1045. I915_DEBUGFS_ENTRIES,
  1046. minor->debugfs_root, minor);
  1047. }
  1048. void i915_debugfs_cleanup(struct drm_minor *minor)
  1049. {
  1050. drm_debugfs_remove_files(i915_debugfs_list,
  1051. I915_DEBUGFS_ENTRIES, minor);
  1052. drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
  1053. 1, minor);
  1054. }
  1055. #endif /* CONFIG_DEBUG_FS */