Kconfig 9.6 KB

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  1. # arch/arm/plat-samsung/Kconfig
  2. #
  3. # Copyright 2009 Simtec Electronics
  4. #
  5. # Licensed under GPLv2
  6. config PLAT_SAMSUNG
  7. bool
  8. depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
  9. select NO_IOPORT
  10. select GENERIC_IRQ_CHIP
  11. default y
  12. help
  13. Base platform code for all Samsung SoC based systems
  14. if PLAT_SAMSUNG
  15. # boot configurations
  16. comment "Boot options"
  17. config S3C_BOOT_WATCHDOG
  18. bool "S3C Initialisation watchdog"
  19. depends on S3C2410_WATCHDOG
  20. help
  21. Say y to enable the watchdog during the kernel decompression
  22. stage. If the kernel fails to uncompress, then the watchdog
  23. will trigger a reset and the system should restart.
  24. config S3C_BOOT_ERROR_RESET
  25. bool "S3C Reboot on decompression error"
  26. help
  27. Say y here to use the watchdog to reset the system if the
  28. kernel decompressor detects an error during decompression.
  29. config S3C_BOOT_UART_FORCE_FIFO
  30. bool "Force UART FIFO on during boot process"
  31. default y
  32. help
  33. Say Y here to force the UART FIFOs on during the kernel
  34. uncompressor
  35. config S3C_LOWLEVEL_UART_PORT
  36. int "S3C UART to use for low-level messages"
  37. default 0
  38. help
  39. Choice of which UART port to use for the low-level messages,
  40. such as the `Uncompressing...` at start time. The value of
  41. this configuration should be between zero and two. The port
  42. must have been initialised by the boot-loader before use.
  43. # timer options
  44. config S5P_HRT
  45. bool
  46. select SAMSUNG_DEV_PWM
  47. help
  48. Use the High Resolution timer support
  49. # clock options
  50. config SAMSUNG_CLKSRC
  51. bool
  52. help
  53. Select the clock code for the clksrc implementation
  54. used by newer systems such as the S3C64XX.
  55. config S5P_CLOCK
  56. def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
  57. help
  58. Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs
  59. # options for IRQ support
  60. config SAMSUNG_IRQ_VIC_TIMER
  61. bool
  62. help
  63. Internal configuration to build the VIC timer interrupt code.
  64. config S5P_IRQ
  65. def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
  66. help
  67. Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
  68. config S5P_EXT_INT
  69. bool
  70. help
  71. Use the external interrupts (other than GPIO interrupts.)
  72. Note: Do not choose this for S5P6440 and S5P6450.
  73. config S5P_GPIO_INT
  74. bool
  75. help
  76. Common code for the GPIO interrupts (other than external interrupts.)
  77. # options for gpio configuration support
  78. config SAMSUNG_GPIOLIB_4BIT
  79. bool
  80. help
  81. GPIOlib file contains the 4 bit modification functions for gpio
  82. configuration. GPIOlib shall be compiled only for S3C64XX and S5P
  83. series of processors.
  84. config S3C_GPIO_CFG_S3C64XX
  85. bool
  86. help
  87. Internal configuration to enable S3C64XX style GPIO configuration
  88. functions.
  89. config S5P_GPIO_DRVSTR
  90. bool
  91. help
  92. Internal configuration to get and set correct GPIO driver strength
  93. helper
  94. config SAMSUNG_GPIO_EXTRA
  95. int "Number of additional GPIO pins"
  96. default 128 if SAMSUNG_GPIO_EXTRA128
  97. default 64 if SAMSUNG_GPIO_EXTRA64
  98. default 0
  99. help
  100. Use additional GPIO space in addition to the GPIO's the SOC
  101. provides. This allows expanding the GPIO space for use with
  102. GPIO expanders.
  103. config SAMSUNG_GPIO_EXTRA64
  104. bool
  105. config SAMSUNG_GPIO_EXTRA128
  106. bool
  107. config S3C_GPIO_SPACE
  108. int "Space between gpio banks"
  109. default 0
  110. help
  111. Add a number of spare GPIO entries between each bank for debugging
  112. purposes. This allows any problems where an counter overflows from
  113. one bank to another to be caught, at the expense of using a little
  114. more memory.
  115. config S3C_GPIO_TRACK
  116. bool
  117. help
  118. Internal configuration option to enable the s3c specific gpio
  119. chip tracking if the platform requires it.
  120. # uart options
  121. config S5P_DEV_UART
  122. def_bool y
  123. depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
  124. # ADC driver
  125. config S3C_ADC
  126. bool "ADC common driver support"
  127. help
  128. Core support for the ADC block found in the Samsung SoC systems
  129. for drivers such as the touchscreen and hwmon to use to share
  130. this resource.
  131. # device definitions to compile in
  132. config S3C_DEV_HSMMC
  133. bool
  134. help
  135. Compile in platform device definitions for HSMMC code
  136. config S3C_DEV_HSMMC1
  137. bool
  138. help
  139. Compile in platform device definitions for HSMMC channel 1
  140. config S3C_DEV_HSMMC2
  141. bool
  142. help
  143. Compile in platform device definitions for HSMMC channel 2
  144. config S3C_DEV_HSMMC3
  145. bool
  146. help
  147. Compile in platform device definitions for HSMMC channel 3
  148. config S3C_DEV_HWMON
  149. bool
  150. help
  151. Compile in platform device definitions for HWMON
  152. config S3C_DEV_I2C1
  153. bool
  154. help
  155. Compile in platform device definitions for I2C channel 1
  156. config S3C_DEV_I2C2
  157. bool
  158. help
  159. Compile in platform device definitions for I2C channel 2
  160. config S3C_DEV_I2C3
  161. bool
  162. help
  163. Compile in platform device definition for I2C controller 3
  164. config S3C_DEV_I2C4
  165. bool
  166. help
  167. Compile in platform device definition for I2C controller 4
  168. config S3C_DEV_I2C5
  169. bool
  170. help
  171. Compile in platform device definition for I2C controller 5
  172. config S3C_DEV_I2C6
  173. bool
  174. help
  175. Compile in platform device definition for I2C controller 6
  176. config S3C_DEV_I2C7
  177. bool
  178. help
  179. Compile in platform device definition for I2C controller 7
  180. config S3C_DEV_FB
  181. bool
  182. help
  183. Compile in platform device definition for framebuffer
  184. config S3C_DEV_USB_HOST
  185. bool
  186. help
  187. Compile in platform device definition for USB host.
  188. config S3C_DEV_USB_HSOTG
  189. bool
  190. help
  191. Compile in platform device definition for USB high-speed OtG
  192. config S3C_DEV_WDT
  193. bool
  194. default y if ARCH_S3C24XX
  195. help
  196. Complie in platform device definition for Watchdog Timer
  197. config S3C_DEV_NAND
  198. bool
  199. help
  200. Compile in platform device definition for NAND controller
  201. config S3C_DEV_ONENAND
  202. bool
  203. help
  204. Compile in platform device definition for OneNAND controller
  205. config S3C_DEV_RTC
  206. bool
  207. help
  208. Complie in platform device definition for RTC
  209. config SAMSUNG_DEV_ADC
  210. bool
  211. help
  212. Compile in platform device definition for ADC controller
  213. config SAMSUNG_DEV_IDE
  214. bool
  215. help
  216. Compile in platform device definitions for IDE
  217. config S3C64XX_DEV_SPI0
  218. bool
  219. help
  220. Compile in platform device definitions for S3C64XX's type
  221. SPI controller 0
  222. config S3C64XX_DEV_SPI1
  223. bool
  224. help
  225. Compile in platform device definitions for S3C64XX's type
  226. SPI controller 1
  227. config S3C64XX_DEV_SPI2
  228. bool
  229. help
  230. Compile in platform device definitions for S3C64XX's type
  231. SPI controller 2
  232. config SAMSUNG_DEV_TS
  233. bool
  234. help
  235. Common in platform device definitions for touchscreen device
  236. config SAMSUNG_DEV_KEYPAD
  237. bool
  238. help
  239. Compile in platform device definitions for keypad
  240. config SAMSUNG_DEV_PWM
  241. bool
  242. default y if ARCH_S3C24XX
  243. help
  244. Compile in platform device definition for PWM Timer
  245. config SAMSUNG_DEV_BACKLIGHT
  246. bool
  247. depends on SAMSUNG_DEV_PWM
  248. help
  249. Compile in platform device definition LCD backlight with PWM Timer
  250. config S5P_DEV_MFC
  251. bool
  252. help
  253. Compile in setup memory (init) code for MFC
  254. config S3C24XX_PWM
  255. bool "PWM device support"
  256. select HAVE_PWM
  257. help
  258. Support for exporting the PWM timer blocks via the pwm device
  259. system
  260. config S5P_SETUP_MIPIPHY
  261. bool
  262. help
  263. Compile in common setup code for MIPI-CSIS and MIPI-DSIM devices
  264. # DMA
  265. config S3C_DMA
  266. bool
  267. help
  268. Internal configuration for S3C DMA core
  269. config SAMSUNG_DMADEV
  270. bool
  271. select DMADEVICES
  272. select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
  273. CPU_S5P6450 || CPU_S5P6440)
  274. select ARM_AMBA
  275. help
  276. Use DMA device engine for PL330 DMAC.
  277. comment "Power management"
  278. config SAMSUNG_PM_DEBUG
  279. bool "S3C2410 PM Suspend debug"
  280. depends on PM
  281. help
  282. Say Y here if you want verbose debugging from the PM Suspend and
  283. Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  284. for more information.
  285. config S3C_PM_DEBUG_LED_SMDK
  286. bool "SMDK LED suspend/resume debugging"
  287. depends on PM && (MACH_SMDK6410)
  288. help
  289. Say Y here to enable the use of the SMDK LEDs on the baseboard
  290. for debugging of the state of the suspend and resume process.
  291. Note, this currently only works for S3C64XX based SMDK boards.
  292. config SAMSUNG_PM_CHECK
  293. bool "S3C2410 PM Suspend Memory CRC"
  294. depends on PM && CRC32
  295. help
  296. Enable the PM code's memory area checksum over sleep. This option
  297. will generate CRCs of all blocks of memory, and store them before
  298. going to sleep. The blocks are then checked on resume for any
  299. errors.
  300. Note, this can take several seconds depending on memory size
  301. and CPU speed.
  302. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  303. config SAMSUNG_PM_CHECK_CHUNKSIZE
  304. int "S3C2410 PM Suspend CRC Chunksize (KiB)"
  305. depends on PM && SAMSUNG_PM_CHECK
  306. default 64
  307. help
  308. Set the chunksize in Kilobytes of the CRC for checking memory
  309. corruption over suspend and resume. A smaller value will mean that
  310. the CRC data block will take more memory, but wil identify any
  311. faults with better precision.
  312. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  313. config SAMSUNG_WAKEMASK
  314. bool
  315. depends on PM
  316. help
  317. Compile support for wakeup-mask controls found on the S3C6400
  318. and above. This code allows a set of interrupt to wakeup-mask
  319. mappings. See <plat/wakeup-mask.h>
  320. config S5P_PM
  321. bool
  322. help
  323. Common code for power management support on S5P and newer SoCs
  324. Note: Do not select this for S5P6440 and S5P6450.
  325. config S5P_SLEEP
  326. bool
  327. help
  328. Internal config node to apply common S5P sleep management code.
  329. Can be selected by S5P and newer SoCs with similar sleep procedure.
  330. comment "Power Domain"
  331. config SAMSUNG_PD
  332. bool "Samsung Power Domain"
  333. depends on PM_RUNTIME
  334. help
  335. Say Y here if you want to control Power Domain by Runtime PM.
  336. config DEBUG_S3C_UART
  337. depends on PLAT_SAMSUNG
  338. int
  339. default "0" if DEBUG_S3C_UART0
  340. default "1" if DEBUG_S3C_UART1
  341. default "2" if DEBUG_S3C_UART2
  342. endif