mwl8k.c 112 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Module parameters */
  30. static unsigned ap_mode_default;
  31. module_param(ap_mode_default, bool, 0);
  32. MODULE_PARM_DESC(ap_mode_default,
  33. "Set to 1 to make ap mode the default instead of sta mode");
  34. /* Register definitions */
  35. #define MWL8K_HIU_GEN_PTR 0x00000c10
  36. #define MWL8K_MODE_STA 0x0000005a
  37. #define MWL8K_MODE_AP 0x000000a5
  38. #define MWL8K_HIU_INT_CODE 0x00000c14
  39. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  40. #define MWL8K_FWAP_READY 0xf1f2f4a5
  41. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  42. #define MWL8K_HIU_SCRATCH 0x00000c40
  43. /* Host->device communications */
  44. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  45. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  46. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  47. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  49. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  50. #define MWL8K_H2A_INT_RESET (1 << 15)
  51. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  52. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  53. /* Device->host communications */
  54. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  55. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  56. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  57. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  59. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  60. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  61. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  62. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  63. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  64. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  65. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  66. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  67. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  68. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  69. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  70. MWL8K_A2H_INT_CHNL_SWITCHED | \
  71. MWL8K_A2H_INT_QUEUE_EMPTY | \
  72. MWL8K_A2H_INT_RADAR_DETECT | \
  73. MWL8K_A2H_INT_RADIO_ON | \
  74. MWL8K_A2H_INT_RADIO_OFF | \
  75. MWL8K_A2H_INT_MAC_EVENT | \
  76. MWL8K_A2H_INT_OPC_DONE | \
  77. MWL8K_A2H_INT_RX_READY | \
  78. MWL8K_A2H_INT_TX_DONE)
  79. #define MWL8K_RX_QUEUES 1
  80. #define MWL8K_TX_QUEUES 4
  81. struct rxd_ops {
  82. int rxd_size;
  83. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  84. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  85. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  86. __le16 *qos, s8 *noise);
  87. };
  88. struct mwl8k_device_info {
  89. char *part_name;
  90. char *helper_image;
  91. char *fw_image_sta;
  92. char *fw_image_ap;
  93. struct rxd_ops *ap_rxd_ops;
  94. u32 fw_api_ap;
  95. };
  96. struct mwl8k_rx_queue {
  97. int rxd_count;
  98. /* hw receives here */
  99. int head;
  100. /* refill descs here */
  101. int tail;
  102. void *rxd;
  103. dma_addr_t rxd_dma;
  104. struct {
  105. struct sk_buff *skb;
  106. DEFINE_DMA_UNMAP_ADDR(dma);
  107. } *buf;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int head;
  112. /* sw appends here */
  113. int tail;
  114. unsigned int len;
  115. struct mwl8k_tx_desc *txd;
  116. dma_addr_t txd_dma;
  117. struct sk_buff **skb;
  118. };
  119. struct mwl8k_priv {
  120. struct ieee80211_hw *hw;
  121. struct pci_dev *pdev;
  122. struct mwl8k_device_info *device_info;
  123. void __iomem *sram;
  124. void __iomem *regs;
  125. /* firmware */
  126. const struct firmware *fw_helper;
  127. const struct firmware *fw_ucode;
  128. /* hardware/firmware parameters */
  129. bool ap_fw;
  130. struct rxd_ops *rxd_ops;
  131. struct ieee80211_supported_band band_24;
  132. struct ieee80211_channel channels_24[14];
  133. struct ieee80211_rate rates_24[14];
  134. struct ieee80211_supported_band band_50;
  135. struct ieee80211_channel channels_50[4];
  136. struct ieee80211_rate rates_50[9];
  137. u32 ap_macids_supported;
  138. u32 sta_macids_supported;
  139. /* firmware access */
  140. struct mutex fw_mutex;
  141. struct task_struct *fw_mutex_owner;
  142. int fw_mutex_depth;
  143. struct completion *hostcmd_wait;
  144. /* lock held over TX and TX reap */
  145. spinlock_t tx_lock;
  146. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  147. struct completion *tx_wait;
  148. /* List of interfaces. */
  149. u32 macids_used;
  150. struct list_head vif_list;
  151. /* power management status cookie from firmware */
  152. u32 *cookie;
  153. dma_addr_t cookie_dma;
  154. u16 num_mcaddrs;
  155. u8 hw_rev;
  156. u32 fw_rev;
  157. /*
  158. * Running count of TX packets in flight, to avoid
  159. * iterating over the transmit rings each time.
  160. */
  161. int pending_tx_pkts;
  162. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  163. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  164. bool radio_on;
  165. bool radio_short_preamble;
  166. bool sniffer_enabled;
  167. bool wmm_enabled;
  168. /* XXX need to convert this to handle multiple interfaces */
  169. bool capture_beacon;
  170. u8 capture_bssid[ETH_ALEN];
  171. struct sk_buff *beacon_skb;
  172. /*
  173. * This FJ worker has to be global as it is scheduled from the
  174. * RX handler. At this point we don't know which interface it
  175. * belongs to until the list of bssids waiting to complete join
  176. * is checked.
  177. */
  178. struct work_struct finalize_join_worker;
  179. /* Tasklet to perform TX reclaim. */
  180. struct tasklet_struct poll_tx_task;
  181. /* Tasklet to perform RX. */
  182. struct tasklet_struct poll_rx_task;
  183. /* Most recently reported noise in dBm */
  184. s8 noise;
  185. /*
  186. * preserve the queue configurations so they can be restored if/when
  187. * the firmware image is swapped.
  188. */
  189. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
  190. /* async firmware loading state */
  191. unsigned fw_state;
  192. char *fw_pref;
  193. char *fw_alt;
  194. struct completion firmware_loading_complete;
  195. };
  196. #define MAX_WEP_KEY_LEN 13
  197. #define NUM_WEP_KEYS 4
  198. /* Per interface specific private data */
  199. struct mwl8k_vif {
  200. struct list_head list;
  201. struct ieee80211_vif *vif;
  202. /* Firmware macid for this vif. */
  203. int macid;
  204. /* Non AMPDU sequence number assigned by driver. */
  205. u16 seqno;
  206. /* Saved WEP keys */
  207. struct {
  208. u8 enabled;
  209. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  210. } wep_key_conf[NUM_WEP_KEYS];
  211. /* BSSID */
  212. u8 bssid[ETH_ALEN];
  213. /* A flag to indicate is HW crypto is enabled for this bssid */
  214. bool is_hw_crypto_enabled;
  215. };
  216. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  217. struct mwl8k_sta {
  218. /* Index into station database. Returned by UPDATE_STADB. */
  219. u8 peer_id;
  220. };
  221. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  222. static const struct ieee80211_channel mwl8k_channels_24[] = {
  223. { .center_freq = 2412, .hw_value = 1, },
  224. { .center_freq = 2417, .hw_value = 2, },
  225. { .center_freq = 2422, .hw_value = 3, },
  226. { .center_freq = 2427, .hw_value = 4, },
  227. { .center_freq = 2432, .hw_value = 5, },
  228. { .center_freq = 2437, .hw_value = 6, },
  229. { .center_freq = 2442, .hw_value = 7, },
  230. { .center_freq = 2447, .hw_value = 8, },
  231. { .center_freq = 2452, .hw_value = 9, },
  232. { .center_freq = 2457, .hw_value = 10, },
  233. { .center_freq = 2462, .hw_value = 11, },
  234. { .center_freq = 2467, .hw_value = 12, },
  235. { .center_freq = 2472, .hw_value = 13, },
  236. { .center_freq = 2484, .hw_value = 14, },
  237. };
  238. static const struct ieee80211_rate mwl8k_rates_24[] = {
  239. { .bitrate = 10, .hw_value = 2, },
  240. { .bitrate = 20, .hw_value = 4, },
  241. { .bitrate = 55, .hw_value = 11, },
  242. { .bitrate = 110, .hw_value = 22, },
  243. { .bitrate = 220, .hw_value = 44, },
  244. { .bitrate = 60, .hw_value = 12, },
  245. { .bitrate = 90, .hw_value = 18, },
  246. { .bitrate = 120, .hw_value = 24, },
  247. { .bitrate = 180, .hw_value = 36, },
  248. { .bitrate = 240, .hw_value = 48, },
  249. { .bitrate = 360, .hw_value = 72, },
  250. { .bitrate = 480, .hw_value = 96, },
  251. { .bitrate = 540, .hw_value = 108, },
  252. { .bitrate = 720, .hw_value = 144, },
  253. };
  254. static const struct ieee80211_channel mwl8k_channels_50[] = {
  255. { .center_freq = 5180, .hw_value = 36, },
  256. { .center_freq = 5200, .hw_value = 40, },
  257. { .center_freq = 5220, .hw_value = 44, },
  258. { .center_freq = 5240, .hw_value = 48, },
  259. };
  260. static const struct ieee80211_rate mwl8k_rates_50[] = {
  261. { .bitrate = 60, .hw_value = 12, },
  262. { .bitrate = 90, .hw_value = 18, },
  263. { .bitrate = 120, .hw_value = 24, },
  264. { .bitrate = 180, .hw_value = 36, },
  265. { .bitrate = 240, .hw_value = 48, },
  266. { .bitrate = 360, .hw_value = 72, },
  267. { .bitrate = 480, .hw_value = 96, },
  268. { .bitrate = 540, .hw_value = 108, },
  269. { .bitrate = 720, .hw_value = 144, },
  270. };
  271. /* Set or get info from Firmware */
  272. #define MWL8K_CMD_GET 0x0000
  273. #define MWL8K_CMD_SET 0x0001
  274. #define MWL8K_CMD_SET_LIST 0x0002
  275. /* Firmware command codes */
  276. #define MWL8K_CMD_CODE_DNLD 0x0001
  277. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  278. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  279. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  280. #define MWL8K_CMD_GET_STAT 0x0014
  281. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  282. #define MWL8K_CMD_RF_TX_POWER 0x001e
  283. #define MWL8K_CMD_TX_POWER 0x001f
  284. #define MWL8K_CMD_RF_ANTENNA 0x0020
  285. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  286. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  287. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  288. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  289. #define MWL8K_CMD_SET_AID 0x010d
  290. #define MWL8K_CMD_SET_RATE 0x0110
  291. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  292. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  293. #define MWL8K_CMD_SET_SLOT 0x0114
  294. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  295. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  296. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  297. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  298. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  299. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  300. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  301. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  302. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  303. #define MWL8K_CMD_UPDATE_STADB 0x1123
  304. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  305. {
  306. u16 command = le16_to_cpu(cmd);
  307. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  308. snprintf(buf, bufsize, "%s", #x);\
  309. return buf;\
  310. } while (0)
  311. switch (command & ~0x8000) {
  312. MWL8K_CMDNAME(CODE_DNLD);
  313. MWL8K_CMDNAME(GET_HW_SPEC);
  314. MWL8K_CMDNAME(SET_HW_SPEC);
  315. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  316. MWL8K_CMDNAME(GET_STAT);
  317. MWL8K_CMDNAME(RADIO_CONTROL);
  318. MWL8K_CMDNAME(RF_TX_POWER);
  319. MWL8K_CMDNAME(TX_POWER);
  320. MWL8K_CMDNAME(RF_ANTENNA);
  321. MWL8K_CMDNAME(SET_BEACON);
  322. MWL8K_CMDNAME(SET_PRE_SCAN);
  323. MWL8K_CMDNAME(SET_POST_SCAN);
  324. MWL8K_CMDNAME(SET_RF_CHANNEL);
  325. MWL8K_CMDNAME(SET_AID);
  326. MWL8K_CMDNAME(SET_RATE);
  327. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  328. MWL8K_CMDNAME(RTS_THRESHOLD);
  329. MWL8K_CMDNAME(SET_SLOT);
  330. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  331. MWL8K_CMDNAME(SET_WMM_MODE);
  332. MWL8K_CMDNAME(MIMO_CONFIG);
  333. MWL8K_CMDNAME(USE_FIXED_RATE);
  334. MWL8K_CMDNAME(ENABLE_SNIFFER);
  335. MWL8K_CMDNAME(SET_MAC_ADDR);
  336. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  337. MWL8K_CMDNAME(BSS_START);
  338. MWL8K_CMDNAME(SET_NEW_STN);
  339. MWL8K_CMDNAME(UPDATE_STADB);
  340. default:
  341. snprintf(buf, bufsize, "0x%x", cmd);
  342. }
  343. #undef MWL8K_CMDNAME
  344. return buf;
  345. }
  346. /* Hardware and firmware reset */
  347. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  348. {
  349. iowrite32(MWL8K_H2A_INT_RESET,
  350. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  351. iowrite32(MWL8K_H2A_INT_RESET,
  352. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  353. msleep(20);
  354. }
  355. /* Release fw image */
  356. static void mwl8k_release_fw(const struct firmware **fw)
  357. {
  358. if (*fw == NULL)
  359. return;
  360. release_firmware(*fw);
  361. *fw = NULL;
  362. }
  363. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  364. {
  365. mwl8k_release_fw(&priv->fw_ucode);
  366. mwl8k_release_fw(&priv->fw_helper);
  367. }
  368. /* states for asynchronous f/w loading */
  369. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  370. enum {
  371. FW_STATE_INIT = 0,
  372. FW_STATE_LOADING_PREF,
  373. FW_STATE_LOADING_ALT,
  374. FW_STATE_ERROR,
  375. };
  376. /* Request fw image */
  377. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  378. const char *fname, const struct firmware **fw,
  379. bool nowait)
  380. {
  381. /* release current image */
  382. if (*fw != NULL)
  383. mwl8k_release_fw(fw);
  384. if (nowait)
  385. return request_firmware_nowait(THIS_MODULE, 1, fname,
  386. &priv->pdev->dev, GFP_KERNEL,
  387. priv, mwl8k_fw_state_machine);
  388. else
  389. return request_firmware(fw, fname, &priv->pdev->dev);
  390. }
  391. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  392. bool nowait)
  393. {
  394. struct mwl8k_device_info *di = priv->device_info;
  395. int rc;
  396. if (di->helper_image != NULL) {
  397. if (nowait)
  398. rc = mwl8k_request_fw(priv, di->helper_image,
  399. &priv->fw_helper, true);
  400. else
  401. rc = mwl8k_request_fw(priv, di->helper_image,
  402. &priv->fw_helper, false);
  403. if (rc)
  404. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  405. pci_name(priv->pdev), di->helper_image);
  406. if (rc || nowait)
  407. return rc;
  408. }
  409. if (nowait) {
  410. /*
  411. * if we get here, no helper image is needed. Skip the
  412. * FW_STATE_INIT state.
  413. */
  414. priv->fw_state = FW_STATE_LOADING_PREF;
  415. rc = mwl8k_request_fw(priv, fw_image,
  416. &priv->fw_ucode,
  417. true);
  418. } else
  419. rc = mwl8k_request_fw(priv, fw_image,
  420. &priv->fw_ucode, false);
  421. if (rc) {
  422. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  423. pci_name(priv->pdev), fw_image);
  424. mwl8k_release_fw(&priv->fw_helper);
  425. return rc;
  426. }
  427. return 0;
  428. }
  429. struct mwl8k_cmd_pkt {
  430. __le16 code;
  431. __le16 length;
  432. __u8 seq_num;
  433. __u8 macid;
  434. __le16 result;
  435. char payload[0];
  436. } __packed;
  437. /*
  438. * Firmware loading.
  439. */
  440. static int
  441. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  442. {
  443. void __iomem *regs = priv->regs;
  444. dma_addr_t dma_addr;
  445. int loops;
  446. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  447. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  448. return -ENOMEM;
  449. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  450. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  451. iowrite32(MWL8K_H2A_INT_DOORBELL,
  452. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  453. iowrite32(MWL8K_H2A_INT_DUMMY,
  454. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  455. loops = 1000;
  456. do {
  457. u32 int_code;
  458. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  459. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  460. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  461. break;
  462. }
  463. cond_resched();
  464. udelay(1);
  465. } while (--loops);
  466. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  467. return loops ? 0 : -ETIMEDOUT;
  468. }
  469. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  470. const u8 *data, size_t length)
  471. {
  472. struct mwl8k_cmd_pkt *cmd;
  473. int done;
  474. int rc = 0;
  475. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  476. if (cmd == NULL)
  477. return -ENOMEM;
  478. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  479. cmd->seq_num = 0;
  480. cmd->macid = 0;
  481. cmd->result = 0;
  482. done = 0;
  483. while (length) {
  484. int block_size = length > 256 ? 256 : length;
  485. memcpy(cmd->payload, data + done, block_size);
  486. cmd->length = cpu_to_le16(block_size);
  487. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  488. sizeof(*cmd) + block_size);
  489. if (rc)
  490. break;
  491. done += block_size;
  492. length -= block_size;
  493. }
  494. if (!rc) {
  495. cmd->length = 0;
  496. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  497. }
  498. kfree(cmd);
  499. return rc;
  500. }
  501. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  502. const u8 *data, size_t length)
  503. {
  504. unsigned char *buffer;
  505. int may_continue, rc = 0;
  506. u32 done, prev_block_size;
  507. buffer = kmalloc(1024, GFP_KERNEL);
  508. if (buffer == NULL)
  509. return -ENOMEM;
  510. done = 0;
  511. prev_block_size = 0;
  512. may_continue = 1000;
  513. while (may_continue > 0) {
  514. u32 block_size;
  515. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  516. if (block_size & 1) {
  517. block_size &= ~1;
  518. may_continue--;
  519. } else {
  520. done += prev_block_size;
  521. length -= prev_block_size;
  522. }
  523. if (block_size > 1024 || block_size > length) {
  524. rc = -EOVERFLOW;
  525. break;
  526. }
  527. if (length == 0) {
  528. rc = 0;
  529. break;
  530. }
  531. if (block_size == 0) {
  532. rc = -EPROTO;
  533. may_continue--;
  534. udelay(1);
  535. continue;
  536. }
  537. prev_block_size = block_size;
  538. memcpy(buffer, data + done, block_size);
  539. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  540. if (rc)
  541. break;
  542. }
  543. if (!rc && length != 0)
  544. rc = -EREMOTEIO;
  545. kfree(buffer);
  546. return rc;
  547. }
  548. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  549. {
  550. struct mwl8k_priv *priv = hw->priv;
  551. const struct firmware *fw = priv->fw_ucode;
  552. int rc;
  553. int loops;
  554. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  555. const struct firmware *helper = priv->fw_helper;
  556. if (helper == NULL) {
  557. printk(KERN_ERR "%s: helper image needed but none "
  558. "given\n", pci_name(priv->pdev));
  559. return -EINVAL;
  560. }
  561. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  562. if (rc) {
  563. printk(KERN_ERR "%s: unable to load firmware "
  564. "helper image\n", pci_name(priv->pdev));
  565. return rc;
  566. }
  567. msleep(5);
  568. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  569. } else {
  570. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  571. }
  572. if (rc) {
  573. printk(KERN_ERR "%s: unable to load firmware image\n",
  574. pci_name(priv->pdev));
  575. return rc;
  576. }
  577. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  578. loops = 500000;
  579. do {
  580. u32 ready_code;
  581. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  582. if (ready_code == MWL8K_FWAP_READY) {
  583. priv->ap_fw = 1;
  584. break;
  585. } else if (ready_code == MWL8K_FWSTA_READY) {
  586. priv->ap_fw = 0;
  587. break;
  588. }
  589. cond_resched();
  590. udelay(1);
  591. } while (--loops);
  592. return loops ? 0 : -ETIMEDOUT;
  593. }
  594. /* DMA header used by firmware and hardware. */
  595. struct mwl8k_dma_data {
  596. __le16 fwlen;
  597. struct ieee80211_hdr wh;
  598. char data[0];
  599. } __packed;
  600. /* Routines to add/remove DMA header from skb. */
  601. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  602. {
  603. struct mwl8k_dma_data *tr;
  604. int hdrlen;
  605. tr = (struct mwl8k_dma_data *)skb->data;
  606. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  607. if (hdrlen != sizeof(tr->wh)) {
  608. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  609. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  610. *((__le16 *)(tr->data - 2)) = qos;
  611. } else {
  612. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  613. }
  614. }
  615. if (hdrlen != sizeof(*tr))
  616. skb_pull(skb, sizeof(*tr) - hdrlen);
  617. }
  618. static void
  619. mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
  620. {
  621. struct ieee80211_hdr *wh;
  622. int hdrlen;
  623. int reqd_hdrlen;
  624. struct mwl8k_dma_data *tr;
  625. /*
  626. * Add a firmware DMA header; the firmware requires that we
  627. * present a 2-byte payload length followed by a 4-address
  628. * header (without QoS field), followed (optionally) by any
  629. * WEP/ExtIV header (but only filled in for CCMP).
  630. */
  631. wh = (struct ieee80211_hdr *)skb->data;
  632. hdrlen = ieee80211_hdrlen(wh->frame_control);
  633. reqd_hdrlen = sizeof(*tr);
  634. if (hdrlen != reqd_hdrlen)
  635. skb_push(skb, reqd_hdrlen - hdrlen);
  636. if (ieee80211_is_data_qos(wh->frame_control))
  637. hdrlen -= IEEE80211_QOS_CTL_LEN;
  638. tr = (struct mwl8k_dma_data *)skb->data;
  639. if (wh != &tr->wh)
  640. memmove(&tr->wh, wh, hdrlen);
  641. if (hdrlen != sizeof(tr->wh))
  642. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  643. /*
  644. * Firmware length is the length of the fully formed "802.11
  645. * payload". That is, everything except for the 802.11 header.
  646. * This includes all crypto material including the MIC.
  647. */
  648. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  649. }
  650. static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb)
  651. {
  652. struct ieee80211_hdr *wh;
  653. struct ieee80211_tx_info *tx_info;
  654. struct ieee80211_key_conf *key_conf;
  655. int data_pad;
  656. wh = (struct ieee80211_hdr *)skb->data;
  657. tx_info = IEEE80211_SKB_CB(skb);
  658. key_conf = NULL;
  659. if (ieee80211_is_data(wh->frame_control))
  660. key_conf = tx_info->control.hw_key;
  661. /*
  662. * Make sure the packet header is in the DMA header format (4-address
  663. * without QoS), the necessary crypto padding between the header and the
  664. * payload has already been provided by mac80211, but it doesn't add tail
  665. * padding when HW crypto is enabled.
  666. *
  667. * We have the following trailer padding requirements:
  668. * - WEP: 4 trailer bytes (ICV)
  669. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  670. * - CCMP: 8 trailer bytes (MIC)
  671. */
  672. data_pad = 0;
  673. if (key_conf != NULL) {
  674. switch (key_conf->cipher) {
  675. case WLAN_CIPHER_SUITE_WEP40:
  676. case WLAN_CIPHER_SUITE_WEP104:
  677. data_pad = 4;
  678. break;
  679. case WLAN_CIPHER_SUITE_TKIP:
  680. data_pad = 12;
  681. break;
  682. case WLAN_CIPHER_SUITE_CCMP:
  683. data_pad = 8;
  684. break;
  685. }
  686. }
  687. mwl8k_add_dma_header(skb, data_pad);
  688. }
  689. /*
  690. * Packet reception for 88w8366 AP firmware.
  691. */
  692. struct mwl8k_rxd_8366_ap {
  693. __le16 pkt_len;
  694. __u8 sq2;
  695. __u8 rate;
  696. __le32 pkt_phys_addr;
  697. __le32 next_rxd_phys_addr;
  698. __le16 qos_control;
  699. __le16 htsig2;
  700. __le32 hw_rssi_info;
  701. __le32 hw_noise_floor_info;
  702. __u8 noise_floor;
  703. __u8 pad0[3];
  704. __u8 rssi;
  705. __u8 rx_status;
  706. __u8 channel;
  707. __u8 rx_ctrl;
  708. } __packed;
  709. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  710. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  711. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  712. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  713. /* 8366 AP rx_status bits */
  714. #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  715. #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  716. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  717. #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  718. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  719. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  720. {
  721. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  722. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  723. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  724. }
  725. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  726. {
  727. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  728. rxd->pkt_len = cpu_to_le16(len);
  729. rxd->pkt_phys_addr = cpu_to_le32(addr);
  730. wmb();
  731. rxd->rx_ctrl = 0;
  732. }
  733. static int
  734. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  735. __le16 *qos, s8 *noise)
  736. {
  737. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  738. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  739. return -1;
  740. rmb();
  741. memset(status, 0, sizeof(*status));
  742. status->signal = -rxd->rssi;
  743. *noise = -rxd->noise_floor;
  744. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  745. status->flag |= RX_FLAG_HT;
  746. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  747. status->flag |= RX_FLAG_40MHZ;
  748. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  749. } else {
  750. int i;
  751. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  752. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  753. status->rate_idx = i;
  754. break;
  755. }
  756. }
  757. }
  758. if (rxd->channel > 14) {
  759. status->band = IEEE80211_BAND_5GHZ;
  760. if (!(status->flag & RX_FLAG_HT))
  761. status->rate_idx -= 5;
  762. } else {
  763. status->band = IEEE80211_BAND_2GHZ;
  764. }
  765. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  766. *qos = rxd->qos_control;
  767. if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  768. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  769. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  770. status->flag |= RX_FLAG_MMIC_ERROR;
  771. return le16_to_cpu(rxd->pkt_len);
  772. }
  773. static struct rxd_ops rxd_8366_ap_ops = {
  774. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  775. .rxd_init = mwl8k_rxd_8366_ap_init,
  776. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  777. .rxd_process = mwl8k_rxd_8366_ap_process,
  778. };
  779. /*
  780. * Packet reception for STA firmware.
  781. */
  782. struct mwl8k_rxd_sta {
  783. __le16 pkt_len;
  784. __u8 link_quality;
  785. __u8 noise_level;
  786. __le32 pkt_phys_addr;
  787. __le32 next_rxd_phys_addr;
  788. __le16 qos_control;
  789. __le16 rate_info;
  790. __le32 pad0[4];
  791. __u8 rssi;
  792. __u8 channel;
  793. __le16 pad1;
  794. __u8 rx_ctrl;
  795. __u8 rx_status;
  796. __u8 pad2[2];
  797. } __packed;
  798. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  799. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  800. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  801. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  802. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  803. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  804. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  805. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  806. /* ICV=0 or MIC=1 */
  807. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  808. /* Key is uploaded only in failure case */
  809. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  810. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  811. {
  812. struct mwl8k_rxd_sta *rxd = _rxd;
  813. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  814. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  815. }
  816. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  817. {
  818. struct mwl8k_rxd_sta *rxd = _rxd;
  819. rxd->pkt_len = cpu_to_le16(len);
  820. rxd->pkt_phys_addr = cpu_to_le32(addr);
  821. wmb();
  822. rxd->rx_ctrl = 0;
  823. }
  824. static int
  825. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  826. __le16 *qos, s8 *noise)
  827. {
  828. struct mwl8k_rxd_sta *rxd = _rxd;
  829. u16 rate_info;
  830. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  831. return -1;
  832. rmb();
  833. rate_info = le16_to_cpu(rxd->rate_info);
  834. memset(status, 0, sizeof(*status));
  835. status->signal = -rxd->rssi;
  836. *noise = -rxd->noise_level;
  837. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  838. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  839. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  840. status->flag |= RX_FLAG_SHORTPRE;
  841. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  842. status->flag |= RX_FLAG_40MHZ;
  843. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  844. status->flag |= RX_FLAG_SHORT_GI;
  845. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  846. status->flag |= RX_FLAG_HT;
  847. if (rxd->channel > 14) {
  848. status->band = IEEE80211_BAND_5GHZ;
  849. if (!(status->flag & RX_FLAG_HT))
  850. status->rate_idx -= 5;
  851. } else {
  852. status->band = IEEE80211_BAND_2GHZ;
  853. }
  854. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  855. *qos = rxd->qos_control;
  856. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  857. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  858. status->flag |= RX_FLAG_MMIC_ERROR;
  859. return le16_to_cpu(rxd->pkt_len);
  860. }
  861. static struct rxd_ops rxd_sta_ops = {
  862. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  863. .rxd_init = mwl8k_rxd_sta_init,
  864. .rxd_refill = mwl8k_rxd_sta_refill,
  865. .rxd_process = mwl8k_rxd_sta_process,
  866. };
  867. #define MWL8K_RX_DESCS 256
  868. #define MWL8K_RX_MAXSZ 3800
  869. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  870. {
  871. struct mwl8k_priv *priv = hw->priv;
  872. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  873. int size;
  874. int i;
  875. rxq->rxd_count = 0;
  876. rxq->head = 0;
  877. rxq->tail = 0;
  878. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  879. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  880. if (rxq->rxd == NULL) {
  881. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  882. return -ENOMEM;
  883. }
  884. memset(rxq->rxd, 0, size);
  885. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  886. if (rxq->buf == NULL) {
  887. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  888. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  889. return -ENOMEM;
  890. }
  891. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  892. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  893. int desc_size;
  894. void *rxd;
  895. int nexti;
  896. dma_addr_t next_dma_addr;
  897. desc_size = priv->rxd_ops->rxd_size;
  898. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  899. nexti = i + 1;
  900. if (nexti == MWL8K_RX_DESCS)
  901. nexti = 0;
  902. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  903. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  904. }
  905. return 0;
  906. }
  907. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  908. {
  909. struct mwl8k_priv *priv = hw->priv;
  910. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  911. int refilled;
  912. refilled = 0;
  913. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  914. struct sk_buff *skb;
  915. dma_addr_t addr;
  916. int rx;
  917. void *rxd;
  918. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  919. if (skb == NULL)
  920. break;
  921. addr = pci_map_single(priv->pdev, skb->data,
  922. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  923. rxq->rxd_count++;
  924. rx = rxq->tail++;
  925. if (rxq->tail == MWL8K_RX_DESCS)
  926. rxq->tail = 0;
  927. rxq->buf[rx].skb = skb;
  928. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  929. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  930. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  931. refilled++;
  932. }
  933. return refilled;
  934. }
  935. /* Must be called only when the card's reception is completely halted */
  936. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  937. {
  938. struct mwl8k_priv *priv = hw->priv;
  939. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  940. int i;
  941. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  942. if (rxq->buf[i].skb != NULL) {
  943. pci_unmap_single(priv->pdev,
  944. dma_unmap_addr(&rxq->buf[i], dma),
  945. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  946. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  947. kfree_skb(rxq->buf[i].skb);
  948. rxq->buf[i].skb = NULL;
  949. }
  950. }
  951. kfree(rxq->buf);
  952. rxq->buf = NULL;
  953. pci_free_consistent(priv->pdev,
  954. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  955. rxq->rxd, rxq->rxd_dma);
  956. rxq->rxd = NULL;
  957. }
  958. /*
  959. * Scan a list of BSSIDs to process for finalize join.
  960. * Allows for extension to process multiple BSSIDs.
  961. */
  962. static inline int
  963. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  964. {
  965. return priv->capture_beacon &&
  966. ieee80211_is_beacon(wh->frame_control) &&
  967. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  968. }
  969. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  970. struct sk_buff *skb)
  971. {
  972. struct mwl8k_priv *priv = hw->priv;
  973. priv->capture_beacon = false;
  974. memset(priv->capture_bssid, 0, ETH_ALEN);
  975. /*
  976. * Use GFP_ATOMIC as rxq_process is called from
  977. * the primary interrupt handler, memory allocation call
  978. * must not sleep.
  979. */
  980. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  981. if (priv->beacon_skb != NULL)
  982. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  983. }
  984. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  985. u8 *bssid)
  986. {
  987. struct mwl8k_vif *mwl8k_vif;
  988. list_for_each_entry(mwl8k_vif,
  989. vif_list, list) {
  990. if (memcmp(bssid, mwl8k_vif->bssid,
  991. ETH_ALEN) == 0)
  992. return mwl8k_vif;
  993. }
  994. return NULL;
  995. }
  996. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  997. {
  998. struct mwl8k_priv *priv = hw->priv;
  999. struct mwl8k_vif *mwl8k_vif = NULL;
  1000. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1001. int processed;
  1002. processed = 0;
  1003. while (rxq->rxd_count && limit--) {
  1004. struct sk_buff *skb;
  1005. void *rxd;
  1006. int pkt_len;
  1007. struct ieee80211_rx_status status;
  1008. struct ieee80211_hdr *wh;
  1009. __le16 qos;
  1010. skb = rxq->buf[rxq->head].skb;
  1011. if (skb == NULL)
  1012. break;
  1013. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1014. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1015. &priv->noise);
  1016. if (pkt_len < 0)
  1017. break;
  1018. rxq->buf[rxq->head].skb = NULL;
  1019. pci_unmap_single(priv->pdev,
  1020. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1021. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1022. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1023. rxq->head++;
  1024. if (rxq->head == MWL8K_RX_DESCS)
  1025. rxq->head = 0;
  1026. rxq->rxd_count--;
  1027. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1028. /*
  1029. * Check for a pending join operation. Save a
  1030. * copy of the beacon and schedule a tasklet to
  1031. * send a FINALIZE_JOIN command to the firmware.
  1032. */
  1033. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1034. mwl8k_save_beacon(hw, skb);
  1035. if (ieee80211_has_protected(wh->frame_control)) {
  1036. /* Check if hw crypto has been enabled for
  1037. * this bss. If yes, set the status flags
  1038. * accordingly
  1039. */
  1040. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1041. wh->addr1);
  1042. if (mwl8k_vif != NULL &&
  1043. mwl8k_vif->is_hw_crypto_enabled == true) {
  1044. /*
  1045. * When MMIC ERROR is encountered
  1046. * by the firmware, payload is
  1047. * dropped and only 32 bytes of
  1048. * mwl8k Firmware header is sent
  1049. * to the host.
  1050. *
  1051. * We need to add four bytes of
  1052. * key information. In it
  1053. * MAC80211 expects keyidx set to
  1054. * 0 for triggering Counter
  1055. * Measure of MMIC failure.
  1056. */
  1057. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1058. struct mwl8k_dma_data *tr;
  1059. tr = (struct mwl8k_dma_data *)skb->data;
  1060. memset((void *)&(tr->data), 0, 4);
  1061. pkt_len += 4;
  1062. }
  1063. if (!ieee80211_is_auth(wh->frame_control))
  1064. status.flag |= RX_FLAG_IV_STRIPPED |
  1065. RX_FLAG_DECRYPTED |
  1066. RX_FLAG_MMIC_STRIPPED;
  1067. }
  1068. }
  1069. skb_put(skb, pkt_len);
  1070. mwl8k_remove_dma_header(skb, qos);
  1071. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1072. ieee80211_rx_irqsafe(hw, skb);
  1073. processed++;
  1074. }
  1075. return processed;
  1076. }
  1077. /*
  1078. * Packet transmission.
  1079. */
  1080. #define MWL8K_TXD_STATUS_OK 0x00000001
  1081. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1082. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1083. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1084. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1085. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1086. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1087. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1088. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1089. #define MWL8K_QOS_EOSP 0x0010
  1090. struct mwl8k_tx_desc {
  1091. __le32 status;
  1092. __u8 data_rate;
  1093. __u8 tx_priority;
  1094. __le16 qos_control;
  1095. __le32 pkt_phys_addr;
  1096. __le16 pkt_len;
  1097. __u8 dest_MAC_addr[ETH_ALEN];
  1098. __le32 next_txd_phys_addr;
  1099. __le32 reserved;
  1100. __le16 rate_info;
  1101. __u8 peer_id;
  1102. __u8 tx_frag_cnt;
  1103. } __packed;
  1104. #define MWL8K_TX_DESCS 128
  1105. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1106. {
  1107. struct mwl8k_priv *priv = hw->priv;
  1108. struct mwl8k_tx_queue *txq = priv->txq + index;
  1109. int size;
  1110. int i;
  1111. txq->len = 0;
  1112. txq->head = 0;
  1113. txq->tail = 0;
  1114. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1115. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  1116. if (txq->txd == NULL) {
  1117. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1118. return -ENOMEM;
  1119. }
  1120. memset(txq->txd, 0, size);
  1121. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  1122. if (txq->skb == NULL) {
  1123. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1124. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1125. return -ENOMEM;
  1126. }
  1127. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  1128. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1129. struct mwl8k_tx_desc *tx_desc;
  1130. int nexti;
  1131. tx_desc = txq->txd + i;
  1132. nexti = (i + 1) % MWL8K_TX_DESCS;
  1133. tx_desc->status = 0;
  1134. tx_desc->next_txd_phys_addr =
  1135. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1136. }
  1137. return 0;
  1138. }
  1139. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1140. {
  1141. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1142. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1143. iowrite32(MWL8K_H2A_INT_DUMMY,
  1144. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1145. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1146. }
  1147. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1148. {
  1149. struct mwl8k_priv *priv = hw->priv;
  1150. int i;
  1151. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  1152. struct mwl8k_tx_queue *txq = priv->txq + i;
  1153. int fw_owned = 0;
  1154. int drv_owned = 0;
  1155. int unused = 0;
  1156. int desc;
  1157. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1158. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1159. u32 status;
  1160. status = le32_to_cpu(tx_desc->status);
  1161. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1162. fw_owned++;
  1163. else
  1164. drv_owned++;
  1165. if (tx_desc->pkt_len == 0)
  1166. unused++;
  1167. }
  1168. wiphy_err(hw->wiphy,
  1169. "txq[%d] len=%d head=%d tail=%d "
  1170. "fw_owned=%d drv_owned=%d unused=%d\n",
  1171. i,
  1172. txq->len, txq->head, txq->tail,
  1173. fw_owned, drv_owned, unused);
  1174. }
  1175. }
  1176. /*
  1177. * Must be called with priv->fw_mutex held and tx queues stopped.
  1178. */
  1179. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1180. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1181. {
  1182. struct mwl8k_priv *priv = hw->priv;
  1183. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1184. int retry;
  1185. int rc;
  1186. might_sleep();
  1187. /*
  1188. * The TX queues are stopped at this point, so this test
  1189. * doesn't need to take ->tx_lock.
  1190. */
  1191. if (!priv->pending_tx_pkts)
  1192. return 0;
  1193. retry = 0;
  1194. rc = 0;
  1195. spin_lock_bh(&priv->tx_lock);
  1196. priv->tx_wait = &tx_wait;
  1197. while (!rc) {
  1198. int oldcount;
  1199. unsigned long timeout;
  1200. oldcount = priv->pending_tx_pkts;
  1201. spin_unlock_bh(&priv->tx_lock);
  1202. timeout = wait_for_completion_timeout(&tx_wait,
  1203. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1204. spin_lock_bh(&priv->tx_lock);
  1205. if (timeout) {
  1206. WARN_ON(priv->pending_tx_pkts);
  1207. if (retry) {
  1208. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1209. }
  1210. break;
  1211. }
  1212. if (priv->pending_tx_pkts < oldcount) {
  1213. wiphy_notice(hw->wiphy,
  1214. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1215. oldcount, priv->pending_tx_pkts);
  1216. retry = 1;
  1217. continue;
  1218. }
  1219. priv->tx_wait = NULL;
  1220. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1221. MWL8K_TX_WAIT_TIMEOUT_MS);
  1222. mwl8k_dump_tx_rings(hw);
  1223. rc = -ETIMEDOUT;
  1224. }
  1225. spin_unlock_bh(&priv->tx_lock);
  1226. return rc;
  1227. }
  1228. #define MWL8K_TXD_SUCCESS(status) \
  1229. ((status) & (MWL8K_TXD_STATUS_OK | \
  1230. MWL8K_TXD_STATUS_OK_RETRY | \
  1231. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1232. static int
  1233. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1234. {
  1235. struct mwl8k_priv *priv = hw->priv;
  1236. struct mwl8k_tx_queue *txq = priv->txq + index;
  1237. int processed;
  1238. processed = 0;
  1239. while (txq->len > 0 && limit--) {
  1240. int tx;
  1241. struct mwl8k_tx_desc *tx_desc;
  1242. unsigned long addr;
  1243. int size;
  1244. struct sk_buff *skb;
  1245. struct ieee80211_tx_info *info;
  1246. u32 status;
  1247. tx = txq->head;
  1248. tx_desc = txq->txd + tx;
  1249. status = le32_to_cpu(tx_desc->status);
  1250. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1251. if (!force)
  1252. break;
  1253. tx_desc->status &=
  1254. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1255. }
  1256. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1257. BUG_ON(txq->len == 0);
  1258. txq->len--;
  1259. priv->pending_tx_pkts--;
  1260. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1261. size = le16_to_cpu(tx_desc->pkt_len);
  1262. skb = txq->skb[tx];
  1263. txq->skb[tx] = NULL;
  1264. BUG_ON(skb == NULL);
  1265. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1266. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1267. /* Mark descriptor as unused */
  1268. tx_desc->pkt_phys_addr = 0;
  1269. tx_desc->pkt_len = 0;
  1270. info = IEEE80211_SKB_CB(skb);
  1271. ieee80211_tx_info_clear_status(info);
  1272. if (MWL8K_TXD_SUCCESS(status))
  1273. info->flags |= IEEE80211_TX_STAT_ACK;
  1274. ieee80211_tx_status_irqsafe(hw, skb);
  1275. processed++;
  1276. }
  1277. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1278. ieee80211_wake_queue(hw, index);
  1279. return processed;
  1280. }
  1281. /* must be called only when the card's transmit is completely halted */
  1282. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1283. {
  1284. struct mwl8k_priv *priv = hw->priv;
  1285. struct mwl8k_tx_queue *txq = priv->txq + index;
  1286. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1287. kfree(txq->skb);
  1288. txq->skb = NULL;
  1289. pci_free_consistent(priv->pdev,
  1290. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1291. txq->txd, txq->txd_dma);
  1292. txq->txd = NULL;
  1293. }
  1294. static int
  1295. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1296. {
  1297. struct mwl8k_priv *priv = hw->priv;
  1298. struct ieee80211_tx_info *tx_info;
  1299. struct mwl8k_vif *mwl8k_vif;
  1300. struct ieee80211_hdr *wh;
  1301. struct mwl8k_tx_queue *txq;
  1302. struct mwl8k_tx_desc *tx;
  1303. dma_addr_t dma;
  1304. u32 txstatus;
  1305. u8 txdatarate;
  1306. u16 qos;
  1307. wh = (struct ieee80211_hdr *)skb->data;
  1308. if (ieee80211_is_data_qos(wh->frame_control))
  1309. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1310. else
  1311. qos = 0;
  1312. if (priv->ap_fw)
  1313. mwl8k_encapsulate_tx_frame(skb);
  1314. else
  1315. mwl8k_add_dma_header(skb, 0);
  1316. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1317. tx_info = IEEE80211_SKB_CB(skb);
  1318. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1319. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1320. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1321. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1322. mwl8k_vif->seqno += 0x10;
  1323. }
  1324. /* Setup firmware control bit fields for each frame type. */
  1325. txstatus = 0;
  1326. txdatarate = 0;
  1327. if (ieee80211_is_mgmt(wh->frame_control) ||
  1328. ieee80211_is_ctl(wh->frame_control)) {
  1329. txdatarate = 0;
  1330. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1331. } else if (ieee80211_is_data(wh->frame_control)) {
  1332. txdatarate = 1;
  1333. if (is_multicast_ether_addr(wh->addr1))
  1334. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1335. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1336. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1337. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1338. else
  1339. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1340. }
  1341. dma = pci_map_single(priv->pdev, skb->data,
  1342. skb->len, PCI_DMA_TODEVICE);
  1343. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1344. wiphy_debug(hw->wiphy,
  1345. "failed to dma map skb, dropping TX frame.\n");
  1346. dev_kfree_skb(skb);
  1347. return NETDEV_TX_OK;
  1348. }
  1349. spin_lock_bh(&priv->tx_lock);
  1350. txq = priv->txq + index;
  1351. BUG_ON(txq->skb[txq->tail] != NULL);
  1352. txq->skb[txq->tail] = skb;
  1353. tx = txq->txd + txq->tail;
  1354. tx->data_rate = txdatarate;
  1355. tx->tx_priority = index;
  1356. tx->qos_control = cpu_to_le16(qos);
  1357. tx->pkt_phys_addr = cpu_to_le32(dma);
  1358. tx->pkt_len = cpu_to_le16(skb->len);
  1359. tx->rate_info = 0;
  1360. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1361. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1362. else
  1363. tx->peer_id = 0;
  1364. wmb();
  1365. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1366. txq->len++;
  1367. priv->pending_tx_pkts++;
  1368. txq->tail++;
  1369. if (txq->tail == MWL8K_TX_DESCS)
  1370. txq->tail = 0;
  1371. if (txq->head == txq->tail)
  1372. ieee80211_stop_queue(hw, index);
  1373. mwl8k_tx_start(priv);
  1374. spin_unlock_bh(&priv->tx_lock);
  1375. return NETDEV_TX_OK;
  1376. }
  1377. /*
  1378. * Firmware access.
  1379. *
  1380. * We have the following requirements for issuing firmware commands:
  1381. * - Some commands require that the packet transmit path is idle when
  1382. * the command is issued. (For simplicity, we'll just quiesce the
  1383. * transmit path for every command.)
  1384. * - There are certain sequences of commands that need to be issued to
  1385. * the hardware sequentially, with no other intervening commands.
  1386. *
  1387. * This leads to an implementation of a "firmware lock" as a mutex that
  1388. * can be taken recursively, and which is taken by both the low-level
  1389. * command submission function (mwl8k_post_cmd) as well as any users of
  1390. * that function that require issuing of an atomic sequence of commands,
  1391. * and quiesces the transmit path whenever it's taken.
  1392. */
  1393. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1394. {
  1395. struct mwl8k_priv *priv = hw->priv;
  1396. if (priv->fw_mutex_owner != current) {
  1397. int rc;
  1398. mutex_lock(&priv->fw_mutex);
  1399. ieee80211_stop_queues(hw);
  1400. rc = mwl8k_tx_wait_empty(hw);
  1401. if (rc) {
  1402. ieee80211_wake_queues(hw);
  1403. mutex_unlock(&priv->fw_mutex);
  1404. return rc;
  1405. }
  1406. priv->fw_mutex_owner = current;
  1407. }
  1408. priv->fw_mutex_depth++;
  1409. return 0;
  1410. }
  1411. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1412. {
  1413. struct mwl8k_priv *priv = hw->priv;
  1414. if (!--priv->fw_mutex_depth) {
  1415. ieee80211_wake_queues(hw);
  1416. priv->fw_mutex_owner = NULL;
  1417. mutex_unlock(&priv->fw_mutex);
  1418. }
  1419. }
  1420. /*
  1421. * Command processing.
  1422. */
  1423. /* Timeout firmware commands after 10s */
  1424. #define MWL8K_CMD_TIMEOUT_MS 10000
  1425. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1426. {
  1427. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1428. struct mwl8k_priv *priv = hw->priv;
  1429. void __iomem *regs = priv->regs;
  1430. dma_addr_t dma_addr;
  1431. unsigned int dma_size;
  1432. int rc;
  1433. unsigned long timeout = 0;
  1434. u8 buf[32];
  1435. cmd->result = (__force __le16) 0xffff;
  1436. dma_size = le16_to_cpu(cmd->length);
  1437. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1438. PCI_DMA_BIDIRECTIONAL);
  1439. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1440. return -ENOMEM;
  1441. rc = mwl8k_fw_lock(hw);
  1442. if (rc) {
  1443. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1444. PCI_DMA_BIDIRECTIONAL);
  1445. return rc;
  1446. }
  1447. priv->hostcmd_wait = &cmd_wait;
  1448. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1449. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1450. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1451. iowrite32(MWL8K_H2A_INT_DUMMY,
  1452. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1453. timeout = wait_for_completion_timeout(&cmd_wait,
  1454. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1455. priv->hostcmd_wait = NULL;
  1456. mwl8k_fw_unlock(hw);
  1457. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1458. PCI_DMA_BIDIRECTIONAL);
  1459. if (!timeout) {
  1460. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1461. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1462. MWL8K_CMD_TIMEOUT_MS);
  1463. rc = -ETIMEDOUT;
  1464. } else {
  1465. int ms;
  1466. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1467. rc = cmd->result ? -EINVAL : 0;
  1468. if (rc)
  1469. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1470. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1471. le16_to_cpu(cmd->result));
  1472. else if (ms > 2000)
  1473. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1474. mwl8k_cmd_name(cmd->code,
  1475. buf, sizeof(buf)),
  1476. ms);
  1477. }
  1478. return rc;
  1479. }
  1480. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1481. struct ieee80211_vif *vif,
  1482. struct mwl8k_cmd_pkt *cmd)
  1483. {
  1484. if (vif != NULL)
  1485. cmd->macid = MWL8K_VIF(vif)->macid;
  1486. return mwl8k_post_cmd(hw, cmd);
  1487. }
  1488. /*
  1489. * Setup code shared between STA and AP firmware images.
  1490. */
  1491. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1492. {
  1493. struct mwl8k_priv *priv = hw->priv;
  1494. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1495. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1496. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1497. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1498. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1499. priv->band_24.channels = priv->channels_24;
  1500. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1501. priv->band_24.bitrates = priv->rates_24;
  1502. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1503. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1504. }
  1505. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1506. {
  1507. struct mwl8k_priv *priv = hw->priv;
  1508. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1509. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1510. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1511. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1512. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1513. priv->band_50.channels = priv->channels_50;
  1514. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1515. priv->band_50.bitrates = priv->rates_50;
  1516. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1517. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1518. }
  1519. /*
  1520. * CMD_GET_HW_SPEC (STA version).
  1521. */
  1522. struct mwl8k_cmd_get_hw_spec_sta {
  1523. struct mwl8k_cmd_pkt header;
  1524. __u8 hw_rev;
  1525. __u8 host_interface;
  1526. __le16 num_mcaddrs;
  1527. __u8 perm_addr[ETH_ALEN];
  1528. __le16 region_code;
  1529. __le32 fw_rev;
  1530. __le32 ps_cookie;
  1531. __le32 caps;
  1532. __u8 mcs_bitmap[16];
  1533. __le32 rx_queue_ptr;
  1534. __le32 num_tx_queues;
  1535. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1536. __le32 caps2;
  1537. __le32 num_tx_desc_per_queue;
  1538. __le32 total_rxd;
  1539. } __packed;
  1540. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1541. #define MWL8K_CAP_GREENFIELD 0x08000000
  1542. #define MWL8K_CAP_AMPDU 0x04000000
  1543. #define MWL8K_CAP_RX_STBC 0x01000000
  1544. #define MWL8K_CAP_TX_STBC 0x00800000
  1545. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1546. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1547. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1548. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1549. #define MWL8K_CAP_DELAY_BA 0x00003000
  1550. #define MWL8K_CAP_MIMO 0x00000200
  1551. #define MWL8K_CAP_40MHZ 0x00000100
  1552. #define MWL8K_CAP_BAND_MASK 0x00000007
  1553. #define MWL8K_CAP_5GHZ 0x00000004
  1554. #define MWL8K_CAP_2GHZ4 0x00000001
  1555. static void
  1556. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1557. struct ieee80211_supported_band *band, u32 cap)
  1558. {
  1559. int rx_streams;
  1560. int tx_streams;
  1561. band->ht_cap.ht_supported = 1;
  1562. if (cap & MWL8K_CAP_MAX_AMSDU)
  1563. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1564. if (cap & MWL8K_CAP_GREENFIELD)
  1565. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1566. if (cap & MWL8K_CAP_AMPDU) {
  1567. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1568. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1569. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1570. }
  1571. if (cap & MWL8K_CAP_RX_STBC)
  1572. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1573. if (cap & MWL8K_CAP_TX_STBC)
  1574. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1575. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1576. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1577. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1578. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1579. if (cap & MWL8K_CAP_DELAY_BA)
  1580. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1581. if (cap & MWL8K_CAP_40MHZ)
  1582. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1583. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1584. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1585. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1586. if (rx_streams >= 2)
  1587. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1588. if (rx_streams >= 3)
  1589. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1590. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1591. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1592. if (rx_streams != tx_streams) {
  1593. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1594. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1595. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1596. }
  1597. }
  1598. static void
  1599. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1600. {
  1601. struct mwl8k_priv *priv = hw->priv;
  1602. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1603. mwl8k_setup_2ghz_band(hw);
  1604. if (caps & MWL8K_CAP_MIMO)
  1605. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1606. }
  1607. if (caps & MWL8K_CAP_5GHZ) {
  1608. mwl8k_setup_5ghz_band(hw);
  1609. if (caps & MWL8K_CAP_MIMO)
  1610. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1611. }
  1612. }
  1613. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1614. {
  1615. struct mwl8k_priv *priv = hw->priv;
  1616. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1617. int rc;
  1618. int i;
  1619. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1620. if (cmd == NULL)
  1621. return -ENOMEM;
  1622. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1623. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1624. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1625. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1626. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1627. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1628. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1629. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1630. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1631. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1632. rc = mwl8k_post_cmd(hw, &cmd->header);
  1633. if (!rc) {
  1634. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1635. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1636. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1637. priv->hw_rev = cmd->hw_rev;
  1638. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1639. priv->ap_macids_supported = 0x00000000;
  1640. priv->sta_macids_supported = 0x00000001;
  1641. }
  1642. kfree(cmd);
  1643. return rc;
  1644. }
  1645. /*
  1646. * CMD_GET_HW_SPEC (AP version).
  1647. */
  1648. struct mwl8k_cmd_get_hw_spec_ap {
  1649. struct mwl8k_cmd_pkt header;
  1650. __u8 hw_rev;
  1651. __u8 host_interface;
  1652. __le16 num_wcb;
  1653. __le16 num_mcaddrs;
  1654. __u8 perm_addr[ETH_ALEN];
  1655. __le16 region_code;
  1656. __le16 num_antenna;
  1657. __le32 fw_rev;
  1658. __le32 wcbbase0;
  1659. __le32 rxwrptr;
  1660. __le32 rxrdptr;
  1661. __le32 ps_cookie;
  1662. __le32 wcbbase1;
  1663. __le32 wcbbase2;
  1664. __le32 wcbbase3;
  1665. __le32 fw_api_version;
  1666. } __packed;
  1667. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1668. {
  1669. struct mwl8k_priv *priv = hw->priv;
  1670. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1671. int rc;
  1672. u32 api_version;
  1673. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1674. if (cmd == NULL)
  1675. return -ENOMEM;
  1676. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1677. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1678. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1679. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1680. rc = mwl8k_post_cmd(hw, &cmd->header);
  1681. if (!rc) {
  1682. int off;
  1683. api_version = le32_to_cpu(cmd->fw_api_version);
  1684. if (priv->device_info->fw_api_ap != api_version) {
  1685. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  1686. " Expected %d got %d.\n", MWL8K_NAME,
  1687. priv->device_info->part_name,
  1688. priv->device_info->fw_api_ap,
  1689. api_version);
  1690. rc = -EINVAL;
  1691. goto done;
  1692. }
  1693. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1694. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1695. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1696. priv->hw_rev = cmd->hw_rev;
  1697. mwl8k_setup_2ghz_band(hw);
  1698. priv->ap_macids_supported = 0x000000ff;
  1699. priv->sta_macids_supported = 0x00000000;
  1700. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1701. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1702. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1703. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1704. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1705. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1706. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1707. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1708. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1709. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1710. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1711. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1712. }
  1713. done:
  1714. kfree(cmd);
  1715. return rc;
  1716. }
  1717. /*
  1718. * CMD_SET_HW_SPEC.
  1719. */
  1720. struct mwl8k_cmd_set_hw_spec {
  1721. struct mwl8k_cmd_pkt header;
  1722. __u8 hw_rev;
  1723. __u8 host_interface;
  1724. __le16 num_mcaddrs;
  1725. __u8 perm_addr[ETH_ALEN];
  1726. __le16 region_code;
  1727. __le32 fw_rev;
  1728. __le32 ps_cookie;
  1729. __le32 caps;
  1730. __le32 rx_queue_ptr;
  1731. __le32 num_tx_queues;
  1732. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1733. __le32 flags;
  1734. __le32 num_tx_desc_per_queue;
  1735. __le32 total_rxd;
  1736. } __packed;
  1737. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1738. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1739. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1740. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1741. {
  1742. struct mwl8k_priv *priv = hw->priv;
  1743. struct mwl8k_cmd_set_hw_spec *cmd;
  1744. int rc;
  1745. int i;
  1746. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1747. if (cmd == NULL)
  1748. return -ENOMEM;
  1749. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1750. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1751. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1752. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1753. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1754. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1755. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1756. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1757. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1758. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1759. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1760. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1761. rc = mwl8k_post_cmd(hw, &cmd->header);
  1762. kfree(cmd);
  1763. return rc;
  1764. }
  1765. /*
  1766. * CMD_MAC_MULTICAST_ADR.
  1767. */
  1768. struct mwl8k_cmd_mac_multicast_adr {
  1769. struct mwl8k_cmd_pkt header;
  1770. __le16 action;
  1771. __le16 numaddr;
  1772. __u8 addr[0][ETH_ALEN];
  1773. };
  1774. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1775. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1776. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1777. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1778. static struct mwl8k_cmd_pkt *
  1779. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1780. struct netdev_hw_addr_list *mc_list)
  1781. {
  1782. struct mwl8k_priv *priv = hw->priv;
  1783. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1784. int size;
  1785. int mc_count = 0;
  1786. if (mc_list)
  1787. mc_count = netdev_hw_addr_list_count(mc_list);
  1788. if (allmulti || mc_count > priv->num_mcaddrs) {
  1789. allmulti = 1;
  1790. mc_count = 0;
  1791. }
  1792. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1793. cmd = kzalloc(size, GFP_ATOMIC);
  1794. if (cmd == NULL)
  1795. return NULL;
  1796. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1797. cmd->header.length = cpu_to_le16(size);
  1798. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1799. MWL8K_ENABLE_RX_BROADCAST);
  1800. if (allmulti) {
  1801. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1802. } else if (mc_count) {
  1803. struct netdev_hw_addr *ha;
  1804. int i = 0;
  1805. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1806. cmd->numaddr = cpu_to_le16(mc_count);
  1807. netdev_hw_addr_list_for_each(ha, mc_list) {
  1808. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1809. }
  1810. }
  1811. return &cmd->header;
  1812. }
  1813. /*
  1814. * CMD_GET_STAT.
  1815. */
  1816. struct mwl8k_cmd_get_stat {
  1817. struct mwl8k_cmd_pkt header;
  1818. __le32 stats[64];
  1819. } __packed;
  1820. #define MWL8K_STAT_ACK_FAILURE 9
  1821. #define MWL8K_STAT_RTS_FAILURE 12
  1822. #define MWL8K_STAT_FCS_ERROR 24
  1823. #define MWL8K_STAT_RTS_SUCCESS 11
  1824. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1825. struct ieee80211_low_level_stats *stats)
  1826. {
  1827. struct mwl8k_cmd_get_stat *cmd;
  1828. int rc;
  1829. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1830. if (cmd == NULL)
  1831. return -ENOMEM;
  1832. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1833. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1834. rc = mwl8k_post_cmd(hw, &cmd->header);
  1835. if (!rc) {
  1836. stats->dot11ACKFailureCount =
  1837. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1838. stats->dot11RTSFailureCount =
  1839. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1840. stats->dot11FCSErrorCount =
  1841. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1842. stats->dot11RTSSuccessCount =
  1843. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1844. }
  1845. kfree(cmd);
  1846. return rc;
  1847. }
  1848. /*
  1849. * CMD_RADIO_CONTROL.
  1850. */
  1851. struct mwl8k_cmd_radio_control {
  1852. struct mwl8k_cmd_pkt header;
  1853. __le16 action;
  1854. __le16 control;
  1855. __le16 radio_on;
  1856. } __packed;
  1857. static int
  1858. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1859. {
  1860. struct mwl8k_priv *priv = hw->priv;
  1861. struct mwl8k_cmd_radio_control *cmd;
  1862. int rc;
  1863. if (enable == priv->radio_on && !force)
  1864. return 0;
  1865. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1866. if (cmd == NULL)
  1867. return -ENOMEM;
  1868. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1869. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1870. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1871. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1872. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1873. rc = mwl8k_post_cmd(hw, &cmd->header);
  1874. kfree(cmd);
  1875. if (!rc)
  1876. priv->radio_on = enable;
  1877. return rc;
  1878. }
  1879. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1880. {
  1881. return mwl8k_cmd_radio_control(hw, 0, 0);
  1882. }
  1883. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1884. {
  1885. return mwl8k_cmd_radio_control(hw, 1, 0);
  1886. }
  1887. static int
  1888. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1889. {
  1890. struct mwl8k_priv *priv = hw->priv;
  1891. priv->radio_short_preamble = short_preamble;
  1892. return mwl8k_cmd_radio_control(hw, 1, 1);
  1893. }
  1894. /*
  1895. * CMD_RF_TX_POWER.
  1896. */
  1897. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  1898. struct mwl8k_cmd_rf_tx_power {
  1899. struct mwl8k_cmd_pkt header;
  1900. __le16 action;
  1901. __le16 support_level;
  1902. __le16 current_level;
  1903. __le16 reserved;
  1904. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  1905. } __packed;
  1906. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1907. {
  1908. struct mwl8k_cmd_rf_tx_power *cmd;
  1909. int rc;
  1910. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1911. if (cmd == NULL)
  1912. return -ENOMEM;
  1913. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1914. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1915. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1916. cmd->support_level = cpu_to_le16(dBm);
  1917. rc = mwl8k_post_cmd(hw, &cmd->header);
  1918. kfree(cmd);
  1919. return rc;
  1920. }
  1921. /*
  1922. * CMD_TX_POWER.
  1923. */
  1924. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  1925. struct mwl8k_cmd_tx_power {
  1926. struct mwl8k_cmd_pkt header;
  1927. __le16 action;
  1928. __le16 band;
  1929. __le16 channel;
  1930. __le16 bw;
  1931. __le16 sub_ch;
  1932. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1933. } __attribute__((packed));
  1934. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  1935. struct ieee80211_conf *conf,
  1936. unsigned short pwr)
  1937. {
  1938. struct ieee80211_channel *channel = conf->channel;
  1939. struct mwl8k_cmd_tx_power *cmd;
  1940. int rc;
  1941. int i;
  1942. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1943. if (cmd == NULL)
  1944. return -ENOMEM;
  1945. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  1946. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1947. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  1948. if (channel->band == IEEE80211_BAND_2GHZ)
  1949. cmd->band = cpu_to_le16(0x1);
  1950. else if (channel->band == IEEE80211_BAND_5GHZ)
  1951. cmd->band = cpu_to_le16(0x4);
  1952. cmd->channel = channel->hw_value;
  1953. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1954. conf->channel_type == NL80211_CHAN_HT20) {
  1955. cmd->bw = cpu_to_le16(0x2);
  1956. } else {
  1957. cmd->bw = cpu_to_le16(0x4);
  1958. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1959. cmd->sub_ch = cpu_to_le16(0x3);
  1960. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1961. cmd->sub_ch = cpu_to_le16(0x1);
  1962. }
  1963. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  1964. cmd->power_level_list[i] = cpu_to_le16(pwr);
  1965. rc = mwl8k_post_cmd(hw, &cmd->header);
  1966. kfree(cmd);
  1967. return rc;
  1968. }
  1969. /*
  1970. * CMD_RF_ANTENNA.
  1971. */
  1972. struct mwl8k_cmd_rf_antenna {
  1973. struct mwl8k_cmd_pkt header;
  1974. __le16 antenna;
  1975. __le16 mode;
  1976. } __packed;
  1977. #define MWL8K_RF_ANTENNA_RX 1
  1978. #define MWL8K_RF_ANTENNA_TX 2
  1979. static int
  1980. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1981. {
  1982. struct mwl8k_cmd_rf_antenna *cmd;
  1983. int rc;
  1984. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1985. if (cmd == NULL)
  1986. return -ENOMEM;
  1987. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1988. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1989. cmd->antenna = cpu_to_le16(antenna);
  1990. cmd->mode = cpu_to_le16(mask);
  1991. rc = mwl8k_post_cmd(hw, &cmd->header);
  1992. kfree(cmd);
  1993. return rc;
  1994. }
  1995. /*
  1996. * CMD_SET_BEACON.
  1997. */
  1998. struct mwl8k_cmd_set_beacon {
  1999. struct mwl8k_cmd_pkt header;
  2000. __le16 beacon_len;
  2001. __u8 beacon[0];
  2002. };
  2003. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2004. struct ieee80211_vif *vif, u8 *beacon, int len)
  2005. {
  2006. struct mwl8k_cmd_set_beacon *cmd;
  2007. int rc;
  2008. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2009. if (cmd == NULL)
  2010. return -ENOMEM;
  2011. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2012. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2013. cmd->beacon_len = cpu_to_le16(len);
  2014. memcpy(cmd->beacon, beacon, len);
  2015. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2016. kfree(cmd);
  2017. return rc;
  2018. }
  2019. /*
  2020. * CMD_SET_PRE_SCAN.
  2021. */
  2022. struct mwl8k_cmd_set_pre_scan {
  2023. struct mwl8k_cmd_pkt header;
  2024. } __packed;
  2025. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2026. {
  2027. struct mwl8k_cmd_set_pre_scan *cmd;
  2028. int rc;
  2029. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2030. if (cmd == NULL)
  2031. return -ENOMEM;
  2032. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2033. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2034. rc = mwl8k_post_cmd(hw, &cmd->header);
  2035. kfree(cmd);
  2036. return rc;
  2037. }
  2038. /*
  2039. * CMD_SET_POST_SCAN.
  2040. */
  2041. struct mwl8k_cmd_set_post_scan {
  2042. struct mwl8k_cmd_pkt header;
  2043. __le32 isibss;
  2044. __u8 bssid[ETH_ALEN];
  2045. } __packed;
  2046. static int
  2047. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2048. {
  2049. struct mwl8k_cmd_set_post_scan *cmd;
  2050. int rc;
  2051. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2052. if (cmd == NULL)
  2053. return -ENOMEM;
  2054. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2055. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2056. cmd->isibss = 0;
  2057. memcpy(cmd->bssid, mac, ETH_ALEN);
  2058. rc = mwl8k_post_cmd(hw, &cmd->header);
  2059. kfree(cmd);
  2060. return rc;
  2061. }
  2062. /*
  2063. * CMD_SET_RF_CHANNEL.
  2064. */
  2065. struct mwl8k_cmd_set_rf_channel {
  2066. struct mwl8k_cmd_pkt header;
  2067. __le16 action;
  2068. __u8 current_channel;
  2069. __le32 channel_flags;
  2070. } __packed;
  2071. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2072. struct ieee80211_conf *conf)
  2073. {
  2074. struct ieee80211_channel *channel = conf->channel;
  2075. struct mwl8k_cmd_set_rf_channel *cmd;
  2076. int rc;
  2077. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2078. if (cmd == NULL)
  2079. return -ENOMEM;
  2080. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2081. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2082. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2083. cmd->current_channel = channel->hw_value;
  2084. if (channel->band == IEEE80211_BAND_2GHZ)
  2085. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2086. else if (channel->band == IEEE80211_BAND_5GHZ)
  2087. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2088. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2089. conf->channel_type == NL80211_CHAN_HT20)
  2090. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2091. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2092. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2093. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2094. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2095. rc = mwl8k_post_cmd(hw, &cmd->header);
  2096. kfree(cmd);
  2097. return rc;
  2098. }
  2099. /*
  2100. * CMD_SET_AID.
  2101. */
  2102. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2103. #define MWL8K_FRAME_PROT_11G 0x07
  2104. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2105. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2106. struct mwl8k_cmd_update_set_aid {
  2107. struct mwl8k_cmd_pkt header;
  2108. __le16 aid;
  2109. /* AP's MAC address (BSSID) */
  2110. __u8 bssid[ETH_ALEN];
  2111. __le16 protection_mode;
  2112. __u8 supp_rates[14];
  2113. } __packed;
  2114. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2115. {
  2116. int i;
  2117. int j;
  2118. /*
  2119. * Clear nonstandard rates 4 and 13.
  2120. */
  2121. mask &= 0x1fef;
  2122. for (i = 0, j = 0; i < 14; i++) {
  2123. if (mask & (1 << i))
  2124. rates[j++] = mwl8k_rates_24[i].hw_value;
  2125. }
  2126. }
  2127. static int
  2128. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2129. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2130. {
  2131. struct mwl8k_cmd_update_set_aid *cmd;
  2132. u16 prot_mode;
  2133. int rc;
  2134. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2135. if (cmd == NULL)
  2136. return -ENOMEM;
  2137. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2138. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2139. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2140. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2141. if (vif->bss_conf.use_cts_prot) {
  2142. prot_mode = MWL8K_FRAME_PROT_11G;
  2143. } else {
  2144. switch (vif->bss_conf.ht_operation_mode &
  2145. IEEE80211_HT_OP_MODE_PROTECTION) {
  2146. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2147. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2148. break;
  2149. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2150. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2151. break;
  2152. default:
  2153. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2154. break;
  2155. }
  2156. }
  2157. cmd->protection_mode = cpu_to_le16(prot_mode);
  2158. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2159. rc = mwl8k_post_cmd(hw, &cmd->header);
  2160. kfree(cmd);
  2161. return rc;
  2162. }
  2163. /*
  2164. * CMD_SET_RATE.
  2165. */
  2166. struct mwl8k_cmd_set_rate {
  2167. struct mwl8k_cmd_pkt header;
  2168. __u8 legacy_rates[14];
  2169. /* Bitmap for supported MCS codes. */
  2170. __u8 mcs_set[16];
  2171. __u8 reserved[16];
  2172. } __packed;
  2173. static int
  2174. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2175. u32 legacy_rate_mask, u8 *mcs_rates)
  2176. {
  2177. struct mwl8k_cmd_set_rate *cmd;
  2178. int rc;
  2179. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2180. if (cmd == NULL)
  2181. return -ENOMEM;
  2182. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2183. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2184. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2185. memcpy(cmd->mcs_set, mcs_rates, 16);
  2186. rc = mwl8k_post_cmd(hw, &cmd->header);
  2187. kfree(cmd);
  2188. return rc;
  2189. }
  2190. /*
  2191. * CMD_FINALIZE_JOIN.
  2192. */
  2193. #define MWL8K_FJ_BEACON_MAXLEN 128
  2194. struct mwl8k_cmd_finalize_join {
  2195. struct mwl8k_cmd_pkt header;
  2196. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2197. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2198. } __packed;
  2199. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2200. int framelen, int dtim)
  2201. {
  2202. struct mwl8k_cmd_finalize_join *cmd;
  2203. struct ieee80211_mgmt *payload = frame;
  2204. int payload_len;
  2205. int rc;
  2206. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2207. if (cmd == NULL)
  2208. return -ENOMEM;
  2209. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2210. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2211. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2212. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2213. if (payload_len < 0)
  2214. payload_len = 0;
  2215. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2216. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2217. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2218. rc = mwl8k_post_cmd(hw, &cmd->header);
  2219. kfree(cmd);
  2220. return rc;
  2221. }
  2222. /*
  2223. * CMD_SET_RTS_THRESHOLD.
  2224. */
  2225. struct mwl8k_cmd_set_rts_threshold {
  2226. struct mwl8k_cmd_pkt header;
  2227. __le16 action;
  2228. __le16 threshold;
  2229. } __packed;
  2230. static int
  2231. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2232. {
  2233. struct mwl8k_cmd_set_rts_threshold *cmd;
  2234. int rc;
  2235. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2236. if (cmd == NULL)
  2237. return -ENOMEM;
  2238. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2239. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2240. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2241. cmd->threshold = cpu_to_le16(rts_thresh);
  2242. rc = mwl8k_post_cmd(hw, &cmd->header);
  2243. kfree(cmd);
  2244. return rc;
  2245. }
  2246. /*
  2247. * CMD_SET_SLOT.
  2248. */
  2249. struct mwl8k_cmd_set_slot {
  2250. struct mwl8k_cmd_pkt header;
  2251. __le16 action;
  2252. __u8 short_slot;
  2253. } __packed;
  2254. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2255. {
  2256. struct mwl8k_cmd_set_slot *cmd;
  2257. int rc;
  2258. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2259. if (cmd == NULL)
  2260. return -ENOMEM;
  2261. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2262. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2263. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2264. cmd->short_slot = short_slot_time;
  2265. rc = mwl8k_post_cmd(hw, &cmd->header);
  2266. kfree(cmd);
  2267. return rc;
  2268. }
  2269. /*
  2270. * CMD_SET_EDCA_PARAMS.
  2271. */
  2272. struct mwl8k_cmd_set_edca_params {
  2273. struct mwl8k_cmd_pkt header;
  2274. /* See MWL8K_SET_EDCA_XXX below */
  2275. __le16 action;
  2276. /* TX opportunity in units of 32 us */
  2277. __le16 txop;
  2278. union {
  2279. struct {
  2280. /* Log exponent of max contention period: 0...15 */
  2281. __le32 log_cw_max;
  2282. /* Log exponent of min contention period: 0...15 */
  2283. __le32 log_cw_min;
  2284. /* Adaptive interframe spacing in units of 32us */
  2285. __u8 aifs;
  2286. /* TX queue to configure */
  2287. __u8 txq;
  2288. } ap;
  2289. struct {
  2290. /* Log exponent of max contention period: 0...15 */
  2291. __u8 log_cw_max;
  2292. /* Log exponent of min contention period: 0...15 */
  2293. __u8 log_cw_min;
  2294. /* Adaptive interframe spacing in units of 32us */
  2295. __u8 aifs;
  2296. /* TX queue to configure */
  2297. __u8 txq;
  2298. } sta;
  2299. };
  2300. } __packed;
  2301. #define MWL8K_SET_EDCA_CW 0x01
  2302. #define MWL8K_SET_EDCA_TXOP 0x02
  2303. #define MWL8K_SET_EDCA_AIFS 0x04
  2304. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2305. MWL8K_SET_EDCA_TXOP | \
  2306. MWL8K_SET_EDCA_AIFS)
  2307. static int
  2308. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2309. __u16 cw_min, __u16 cw_max,
  2310. __u8 aifs, __u16 txop)
  2311. {
  2312. struct mwl8k_priv *priv = hw->priv;
  2313. struct mwl8k_cmd_set_edca_params *cmd;
  2314. int rc;
  2315. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2316. if (cmd == NULL)
  2317. return -ENOMEM;
  2318. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2319. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2320. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2321. cmd->txop = cpu_to_le16(txop);
  2322. if (priv->ap_fw) {
  2323. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2324. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2325. cmd->ap.aifs = aifs;
  2326. cmd->ap.txq = qnum;
  2327. } else {
  2328. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2329. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2330. cmd->sta.aifs = aifs;
  2331. cmd->sta.txq = qnum;
  2332. }
  2333. rc = mwl8k_post_cmd(hw, &cmd->header);
  2334. kfree(cmd);
  2335. return rc;
  2336. }
  2337. /*
  2338. * CMD_SET_WMM_MODE.
  2339. */
  2340. struct mwl8k_cmd_set_wmm_mode {
  2341. struct mwl8k_cmd_pkt header;
  2342. __le16 action;
  2343. } __packed;
  2344. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2345. {
  2346. struct mwl8k_priv *priv = hw->priv;
  2347. struct mwl8k_cmd_set_wmm_mode *cmd;
  2348. int rc;
  2349. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2350. if (cmd == NULL)
  2351. return -ENOMEM;
  2352. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2353. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2354. cmd->action = cpu_to_le16(!!enable);
  2355. rc = mwl8k_post_cmd(hw, &cmd->header);
  2356. kfree(cmd);
  2357. if (!rc)
  2358. priv->wmm_enabled = enable;
  2359. return rc;
  2360. }
  2361. /*
  2362. * CMD_MIMO_CONFIG.
  2363. */
  2364. struct mwl8k_cmd_mimo_config {
  2365. struct mwl8k_cmd_pkt header;
  2366. __le32 action;
  2367. __u8 rx_antenna_map;
  2368. __u8 tx_antenna_map;
  2369. } __packed;
  2370. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2371. {
  2372. struct mwl8k_cmd_mimo_config *cmd;
  2373. int rc;
  2374. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2375. if (cmd == NULL)
  2376. return -ENOMEM;
  2377. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2378. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2379. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2380. cmd->rx_antenna_map = rx;
  2381. cmd->tx_antenna_map = tx;
  2382. rc = mwl8k_post_cmd(hw, &cmd->header);
  2383. kfree(cmd);
  2384. return rc;
  2385. }
  2386. /*
  2387. * CMD_USE_FIXED_RATE (STA version).
  2388. */
  2389. struct mwl8k_cmd_use_fixed_rate_sta {
  2390. struct mwl8k_cmd_pkt header;
  2391. __le32 action;
  2392. __le32 allow_rate_drop;
  2393. __le32 num_rates;
  2394. struct {
  2395. __le32 is_ht_rate;
  2396. __le32 enable_retry;
  2397. __le32 rate;
  2398. __le32 retry_count;
  2399. } rate_entry[8];
  2400. __le32 rate_type;
  2401. __le32 reserved1;
  2402. __le32 reserved2;
  2403. } __packed;
  2404. #define MWL8K_USE_AUTO_RATE 0x0002
  2405. #define MWL8K_UCAST_RATE 0
  2406. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2407. {
  2408. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2409. int rc;
  2410. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2411. if (cmd == NULL)
  2412. return -ENOMEM;
  2413. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2414. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2415. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2416. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2417. rc = mwl8k_post_cmd(hw, &cmd->header);
  2418. kfree(cmd);
  2419. return rc;
  2420. }
  2421. /*
  2422. * CMD_USE_FIXED_RATE (AP version).
  2423. */
  2424. struct mwl8k_cmd_use_fixed_rate_ap {
  2425. struct mwl8k_cmd_pkt header;
  2426. __le32 action;
  2427. __le32 allow_rate_drop;
  2428. __le32 num_rates;
  2429. struct mwl8k_rate_entry_ap {
  2430. __le32 is_ht_rate;
  2431. __le32 enable_retry;
  2432. __le32 rate;
  2433. __le32 retry_count;
  2434. } rate_entry[4];
  2435. u8 multicast_rate;
  2436. u8 multicast_rate_type;
  2437. u8 management_rate;
  2438. } __packed;
  2439. static int
  2440. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2441. {
  2442. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2443. int rc;
  2444. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2445. if (cmd == NULL)
  2446. return -ENOMEM;
  2447. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2448. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2449. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2450. cmd->multicast_rate = mcast;
  2451. cmd->management_rate = mgmt;
  2452. rc = mwl8k_post_cmd(hw, &cmd->header);
  2453. kfree(cmd);
  2454. return rc;
  2455. }
  2456. /*
  2457. * CMD_ENABLE_SNIFFER.
  2458. */
  2459. struct mwl8k_cmd_enable_sniffer {
  2460. struct mwl8k_cmd_pkt header;
  2461. __le32 action;
  2462. } __packed;
  2463. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2464. {
  2465. struct mwl8k_cmd_enable_sniffer *cmd;
  2466. int rc;
  2467. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2468. if (cmd == NULL)
  2469. return -ENOMEM;
  2470. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2471. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2472. cmd->action = cpu_to_le32(!!enable);
  2473. rc = mwl8k_post_cmd(hw, &cmd->header);
  2474. kfree(cmd);
  2475. return rc;
  2476. }
  2477. /*
  2478. * CMD_SET_MAC_ADDR.
  2479. */
  2480. struct mwl8k_cmd_set_mac_addr {
  2481. struct mwl8k_cmd_pkt header;
  2482. union {
  2483. struct {
  2484. __le16 mac_type;
  2485. __u8 mac_addr[ETH_ALEN];
  2486. } mbss;
  2487. __u8 mac_addr[ETH_ALEN];
  2488. };
  2489. } __packed;
  2490. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2491. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2492. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2493. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2494. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2495. struct ieee80211_vif *vif, u8 *mac)
  2496. {
  2497. struct mwl8k_priv *priv = hw->priv;
  2498. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2499. struct mwl8k_cmd_set_mac_addr *cmd;
  2500. int mac_type;
  2501. int rc;
  2502. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2503. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2504. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2505. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2506. else
  2507. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2508. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2509. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2510. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2511. else
  2512. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2513. }
  2514. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2515. if (cmd == NULL)
  2516. return -ENOMEM;
  2517. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2518. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2519. if (priv->ap_fw) {
  2520. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2521. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2522. } else {
  2523. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2524. }
  2525. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2526. kfree(cmd);
  2527. return rc;
  2528. }
  2529. /*
  2530. * CMD_SET_RATEADAPT_MODE.
  2531. */
  2532. struct mwl8k_cmd_set_rate_adapt_mode {
  2533. struct mwl8k_cmd_pkt header;
  2534. __le16 action;
  2535. __le16 mode;
  2536. } __packed;
  2537. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2538. {
  2539. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2540. int rc;
  2541. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2542. if (cmd == NULL)
  2543. return -ENOMEM;
  2544. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2545. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2546. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2547. cmd->mode = cpu_to_le16(mode);
  2548. rc = mwl8k_post_cmd(hw, &cmd->header);
  2549. kfree(cmd);
  2550. return rc;
  2551. }
  2552. /*
  2553. * CMD_BSS_START.
  2554. */
  2555. struct mwl8k_cmd_bss_start {
  2556. struct mwl8k_cmd_pkt header;
  2557. __le32 enable;
  2558. } __packed;
  2559. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2560. struct ieee80211_vif *vif, int enable)
  2561. {
  2562. struct mwl8k_cmd_bss_start *cmd;
  2563. int rc;
  2564. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2565. if (cmd == NULL)
  2566. return -ENOMEM;
  2567. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2568. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2569. cmd->enable = cpu_to_le32(enable);
  2570. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2571. kfree(cmd);
  2572. return rc;
  2573. }
  2574. /*
  2575. * CMD_SET_NEW_STN.
  2576. */
  2577. struct mwl8k_cmd_set_new_stn {
  2578. struct mwl8k_cmd_pkt header;
  2579. __le16 aid;
  2580. __u8 mac_addr[6];
  2581. __le16 stn_id;
  2582. __le16 action;
  2583. __le16 rsvd;
  2584. __le32 legacy_rates;
  2585. __u8 ht_rates[4];
  2586. __le16 cap_info;
  2587. __le16 ht_capabilities_info;
  2588. __u8 mac_ht_param_info;
  2589. __u8 rev;
  2590. __u8 control_channel;
  2591. __u8 add_channel;
  2592. __le16 op_mode;
  2593. __le16 stbc;
  2594. __u8 add_qos_info;
  2595. __u8 is_qos_sta;
  2596. __le32 fw_sta_ptr;
  2597. } __packed;
  2598. #define MWL8K_STA_ACTION_ADD 0
  2599. #define MWL8K_STA_ACTION_REMOVE 2
  2600. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2601. struct ieee80211_vif *vif,
  2602. struct ieee80211_sta *sta)
  2603. {
  2604. struct mwl8k_cmd_set_new_stn *cmd;
  2605. u32 rates;
  2606. int rc;
  2607. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2608. if (cmd == NULL)
  2609. return -ENOMEM;
  2610. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2611. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2612. cmd->aid = cpu_to_le16(sta->aid);
  2613. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2614. cmd->stn_id = cpu_to_le16(sta->aid);
  2615. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2616. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2617. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2618. else
  2619. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2620. cmd->legacy_rates = cpu_to_le32(rates);
  2621. if (sta->ht_cap.ht_supported) {
  2622. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2623. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2624. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2625. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2626. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2627. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2628. ((sta->ht_cap.ampdu_density & 7) << 2);
  2629. cmd->is_qos_sta = 1;
  2630. }
  2631. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2632. kfree(cmd);
  2633. return rc;
  2634. }
  2635. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2636. struct ieee80211_vif *vif)
  2637. {
  2638. struct mwl8k_cmd_set_new_stn *cmd;
  2639. int rc;
  2640. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2641. if (cmd == NULL)
  2642. return -ENOMEM;
  2643. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2644. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2645. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2646. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2647. kfree(cmd);
  2648. return rc;
  2649. }
  2650. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2651. struct ieee80211_vif *vif, u8 *addr)
  2652. {
  2653. struct mwl8k_cmd_set_new_stn *cmd;
  2654. int rc;
  2655. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2656. if (cmd == NULL)
  2657. return -ENOMEM;
  2658. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2659. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2660. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2661. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2662. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2663. kfree(cmd);
  2664. return rc;
  2665. }
  2666. /*
  2667. * CMD_UPDATE_STADB.
  2668. */
  2669. struct ewc_ht_info {
  2670. __le16 control1;
  2671. __le16 control2;
  2672. __le16 control3;
  2673. } __packed;
  2674. struct peer_capability_info {
  2675. /* Peer type - AP vs. STA. */
  2676. __u8 peer_type;
  2677. /* Basic 802.11 capabilities from assoc resp. */
  2678. __le16 basic_caps;
  2679. /* Set if peer supports 802.11n high throughput (HT). */
  2680. __u8 ht_support;
  2681. /* Valid if HT is supported. */
  2682. __le16 ht_caps;
  2683. __u8 extended_ht_caps;
  2684. struct ewc_ht_info ewc_info;
  2685. /* Legacy rate table. Intersection of our rates and peer rates. */
  2686. __u8 legacy_rates[12];
  2687. /* HT rate table. Intersection of our rates and peer rates. */
  2688. __u8 ht_rates[16];
  2689. __u8 pad[16];
  2690. /* If set, interoperability mode, no proprietary extensions. */
  2691. __u8 interop;
  2692. __u8 pad2;
  2693. __u8 station_id;
  2694. __le16 amsdu_enabled;
  2695. } __packed;
  2696. struct mwl8k_cmd_update_stadb {
  2697. struct mwl8k_cmd_pkt header;
  2698. /* See STADB_ACTION_TYPE */
  2699. __le32 action;
  2700. /* Peer MAC address */
  2701. __u8 peer_addr[ETH_ALEN];
  2702. __le32 reserved;
  2703. /* Peer info - valid during add/update. */
  2704. struct peer_capability_info peer_info;
  2705. } __packed;
  2706. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2707. #define MWL8K_STA_DB_DEL_ENTRY 2
  2708. /* Peer Entry flags - used to define the type of the peer node */
  2709. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2710. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2711. struct ieee80211_vif *vif,
  2712. struct ieee80211_sta *sta)
  2713. {
  2714. struct mwl8k_cmd_update_stadb *cmd;
  2715. struct peer_capability_info *p;
  2716. u32 rates;
  2717. int rc;
  2718. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2719. if (cmd == NULL)
  2720. return -ENOMEM;
  2721. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2722. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2723. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2724. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2725. p = &cmd->peer_info;
  2726. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2727. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2728. p->ht_support = sta->ht_cap.ht_supported;
  2729. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2730. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2731. ((sta->ht_cap.ampdu_density & 7) << 2);
  2732. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2733. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2734. else
  2735. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2736. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2737. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2738. p->interop = 1;
  2739. p->amsdu_enabled = 0;
  2740. rc = mwl8k_post_cmd(hw, &cmd->header);
  2741. kfree(cmd);
  2742. return rc ? rc : p->station_id;
  2743. }
  2744. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2745. struct ieee80211_vif *vif, u8 *addr)
  2746. {
  2747. struct mwl8k_cmd_update_stadb *cmd;
  2748. int rc;
  2749. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2750. if (cmd == NULL)
  2751. return -ENOMEM;
  2752. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2753. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2754. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2755. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2756. rc = mwl8k_post_cmd(hw, &cmd->header);
  2757. kfree(cmd);
  2758. return rc;
  2759. }
  2760. /*
  2761. * Interrupt handling.
  2762. */
  2763. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2764. {
  2765. struct ieee80211_hw *hw = dev_id;
  2766. struct mwl8k_priv *priv = hw->priv;
  2767. u32 status;
  2768. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2769. if (!status)
  2770. return IRQ_NONE;
  2771. if (status & MWL8K_A2H_INT_TX_DONE) {
  2772. status &= ~MWL8K_A2H_INT_TX_DONE;
  2773. tasklet_schedule(&priv->poll_tx_task);
  2774. }
  2775. if (status & MWL8K_A2H_INT_RX_READY) {
  2776. status &= ~MWL8K_A2H_INT_RX_READY;
  2777. tasklet_schedule(&priv->poll_rx_task);
  2778. }
  2779. if (status)
  2780. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2781. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2782. if (priv->hostcmd_wait != NULL)
  2783. complete(priv->hostcmd_wait);
  2784. }
  2785. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2786. if (!mutex_is_locked(&priv->fw_mutex) &&
  2787. priv->radio_on && priv->pending_tx_pkts)
  2788. mwl8k_tx_start(priv);
  2789. }
  2790. return IRQ_HANDLED;
  2791. }
  2792. static void mwl8k_tx_poll(unsigned long data)
  2793. {
  2794. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2795. struct mwl8k_priv *priv = hw->priv;
  2796. int limit;
  2797. int i;
  2798. limit = 32;
  2799. spin_lock_bh(&priv->tx_lock);
  2800. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2801. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2802. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2803. complete(priv->tx_wait);
  2804. priv->tx_wait = NULL;
  2805. }
  2806. spin_unlock_bh(&priv->tx_lock);
  2807. if (limit) {
  2808. writel(~MWL8K_A2H_INT_TX_DONE,
  2809. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2810. } else {
  2811. tasklet_schedule(&priv->poll_tx_task);
  2812. }
  2813. }
  2814. static void mwl8k_rx_poll(unsigned long data)
  2815. {
  2816. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2817. struct mwl8k_priv *priv = hw->priv;
  2818. int limit;
  2819. limit = 32;
  2820. limit -= rxq_process(hw, 0, limit);
  2821. limit -= rxq_refill(hw, 0, limit);
  2822. if (limit) {
  2823. writel(~MWL8K_A2H_INT_RX_READY,
  2824. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2825. } else {
  2826. tasklet_schedule(&priv->poll_rx_task);
  2827. }
  2828. }
  2829. /*
  2830. * Core driver operations.
  2831. */
  2832. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2833. {
  2834. struct mwl8k_priv *priv = hw->priv;
  2835. int index = skb_get_queue_mapping(skb);
  2836. int rc;
  2837. if (!priv->radio_on) {
  2838. wiphy_debug(hw->wiphy,
  2839. "dropped TX frame since radio disabled\n");
  2840. dev_kfree_skb(skb);
  2841. return NETDEV_TX_OK;
  2842. }
  2843. rc = mwl8k_txq_xmit(hw, index, skb);
  2844. return rc;
  2845. }
  2846. static int mwl8k_start(struct ieee80211_hw *hw)
  2847. {
  2848. struct mwl8k_priv *priv = hw->priv;
  2849. int rc;
  2850. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2851. IRQF_SHARED, MWL8K_NAME, hw);
  2852. if (rc) {
  2853. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  2854. return -EIO;
  2855. }
  2856. /* Enable TX reclaim and RX tasklets. */
  2857. tasklet_enable(&priv->poll_tx_task);
  2858. tasklet_enable(&priv->poll_rx_task);
  2859. /* Enable interrupts */
  2860. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2861. rc = mwl8k_fw_lock(hw);
  2862. if (!rc) {
  2863. rc = mwl8k_cmd_radio_enable(hw);
  2864. if (!priv->ap_fw) {
  2865. if (!rc)
  2866. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2867. if (!rc)
  2868. rc = mwl8k_cmd_set_pre_scan(hw);
  2869. if (!rc)
  2870. rc = mwl8k_cmd_set_post_scan(hw,
  2871. "\x00\x00\x00\x00\x00\x00");
  2872. }
  2873. if (!rc)
  2874. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2875. if (!rc)
  2876. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2877. mwl8k_fw_unlock(hw);
  2878. }
  2879. if (rc) {
  2880. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2881. free_irq(priv->pdev->irq, hw);
  2882. tasklet_disable(&priv->poll_tx_task);
  2883. tasklet_disable(&priv->poll_rx_task);
  2884. }
  2885. return rc;
  2886. }
  2887. static void mwl8k_stop(struct ieee80211_hw *hw)
  2888. {
  2889. struct mwl8k_priv *priv = hw->priv;
  2890. int i;
  2891. mwl8k_cmd_radio_disable(hw);
  2892. ieee80211_stop_queues(hw);
  2893. /* Disable interrupts */
  2894. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2895. free_irq(priv->pdev->irq, hw);
  2896. /* Stop finalize join worker */
  2897. cancel_work_sync(&priv->finalize_join_worker);
  2898. if (priv->beacon_skb != NULL)
  2899. dev_kfree_skb(priv->beacon_skb);
  2900. /* Stop TX reclaim and RX tasklets. */
  2901. tasklet_disable(&priv->poll_tx_task);
  2902. tasklet_disable(&priv->poll_rx_task);
  2903. /* Return all skbs to mac80211 */
  2904. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2905. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2906. }
  2907. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  2908. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2909. struct ieee80211_vif *vif)
  2910. {
  2911. struct mwl8k_priv *priv = hw->priv;
  2912. struct mwl8k_vif *mwl8k_vif;
  2913. u32 macids_supported;
  2914. int macid, rc;
  2915. struct mwl8k_device_info *di;
  2916. /*
  2917. * Reject interface creation if sniffer mode is active, as
  2918. * STA operation is mutually exclusive with hardware sniffer
  2919. * mode. (Sniffer mode is only used on STA firmware.)
  2920. */
  2921. if (priv->sniffer_enabled) {
  2922. wiphy_info(hw->wiphy,
  2923. "unable to create STA interface because sniffer mode is enabled\n");
  2924. return -EINVAL;
  2925. }
  2926. di = priv->device_info;
  2927. switch (vif->type) {
  2928. case NL80211_IFTYPE_AP:
  2929. if (!priv->ap_fw && di->fw_image_ap) {
  2930. /* we must load the ap fw to meet this request */
  2931. if (!list_empty(&priv->vif_list))
  2932. return -EBUSY;
  2933. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  2934. if (rc)
  2935. return rc;
  2936. }
  2937. macids_supported = priv->ap_macids_supported;
  2938. break;
  2939. case NL80211_IFTYPE_STATION:
  2940. if (priv->ap_fw && di->fw_image_sta) {
  2941. /* we must load the sta fw to meet this request */
  2942. if (!list_empty(&priv->vif_list))
  2943. return -EBUSY;
  2944. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  2945. if (rc)
  2946. return rc;
  2947. }
  2948. macids_supported = priv->sta_macids_supported;
  2949. break;
  2950. default:
  2951. return -EINVAL;
  2952. }
  2953. macid = ffs(macids_supported & ~priv->macids_used);
  2954. if (!macid--)
  2955. return -EBUSY;
  2956. /* Setup driver private area. */
  2957. mwl8k_vif = MWL8K_VIF(vif);
  2958. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2959. mwl8k_vif->vif = vif;
  2960. mwl8k_vif->macid = macid;
  2961. mwl8k_vif->seqno = 0;
  2962. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  2963. mwl8k_vif->is_hw_crypto_enabled = false;
  2964. /* Set the mac address. */
  2965. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2966. if (priv->ap_fw)
  2967. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2968. priv->macids_used |= 1 << mwl8k_vif->macid;
  2969. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2970. return 0;
  2971. }
  2972. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2973. struct ieee80211_vif *vif)
  2974. {
  2975. struct mwl8k_priv *priv = hw->priv;
  2976. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2977. if (priv->ap_fw)
  2978. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2979. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2980. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2981. list_del(&mwl8k_vif->list);
  2982. }
  2983. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2984. {
  2985. struct ieee80211_conf *conf = &hw->conf;
  2986. struct mwl8k_priv *priv = hw->priv;
  2987. int rc;
  2988. if (conf->flags & IEEE80211_CONF_IDLE) {
  2989. mwl8k_cmd_radio_disable(hw);
  2990. return 0;
  2991. }
  2992. rc = mwl8k_fw_lock(hw);
  2993. if (rc)
  2994. return rc;
  2995. rc = mwl8k_cmd_radio_enable(hw);
  2996. if (rc)
  2997. goto out;
  2998. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2999. if (rc)
  3000. goto out;
  3001. if (conf->power_level > 18)
  3002. conf->power_level = 18;
  3003. if (priv->ap_fw) {
  3004. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  3005. if (rc)
  3006. goto out;
  3007. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  3008. if (!rc)
  3009. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  3010. } else {
  3011. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  3012. if (rc)
  3013. goto out;
  3014. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  3015. }
  3016. out:
  3017. mwl8k_fw_unlock(hw);
  3018. return rc;
  3019. }
  3020. static void
  3021. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3022. struct ieee80211_bss_conf *info, u32 changed)
  3023. {
  3024. struct mwl8k_priv *priv = hw->priv;
  3025. u32 ap_legacy_rates;
  3026. u8 ap_mcs_rates[16];
  3027. int rc;
  3028. if (mwl8k_fw_lock(hw))
  3029. return;
  3030. /*
  3031. * No need to capture a beacon if we're no longer associated.
  3032. */
  3033. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  3034. priv->capture_beacon = false;
  3035. /*
  3036. * Get the AP's legacy and MCS rates.
  3037. */
  3038. if (vif->bss_conf.assoc) {
  3039. struct ieee80211_sta *ap;
  3040. rcu_read_lock();
  3041. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  3042. if (ap == NULL) {
  3043. rcu_read_unlock();
  3044. goto out;
  3045. }
  3046. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  3047. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  3048. } else {
  3049. ap_legacy_rates =
  3050. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3051. }
  3052. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  3053. rcu_read_unlock();
  3054. }
  3055. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  3056. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  3057. if (rc)
  3058. goto out;
  3059. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  3060. if (rc)
  3061. goto out;
  3062. }
  3063. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3064. rc = mwl8k_set_radio_preamble(hw,
  3065. vif->bss_conf.use_short_preamble);
  3066. if (rc)
  3067. goto out;
  3068. }
  3069. if (changed & BSS_CHANGED_ERP_SLOT) {
  3070. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  3071. if (rc)
  3072. goto out;
  3073. }
  3074. if (vif->bss_conf.assoc &&
  3075. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  3076. BSS_CHANGED_HT))) {
  3077. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  3078. if (rc)
  3079. goto out;
  3080. }
  3081. if (vif->bss_conf.assoc &&
  3082. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  3083. /*
  3084. * Finalize the join. Tell rx handler to process
  3085. * next beacon from our BSSID.
  3086. */
  3087. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  3088. priv->capture_beacon = true;
  3089. }
  3090. out:
  3091. mwl8k_fw_unlock(hw);
  3092. }
  3093. static void
  3094. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3095. struct ieee80211_bss_conf *info, u32 changed)
  3096. {
  3097. int rc;
  3098. if (mwl8k_fw_lock(hw))
  3099. return;
  3100. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3101. rc = mwl8k_set_radio_preamble(hw,
  3102. vif->bss_conf.use_short_preamble);
  3103. if (rc)
  3104. goto out;
  3105. }
  3106. if (changed & BSS_CHANGED_BASIC_RATES) {
  3107. int idx;
  3108. int rate;
  3109. /*
  3110. * Use lowest supported basic rate for multicasts
  3111. * and management frames (such as probe responses --
  3112. * beacons will always go out at 1 Mb/s).
  3113. */
  3114. idx = ffs(vif->bss_conf.basic_rates);
  3115. if (idx)
  3116. idx--;
  3117. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3118. rate = mwl8k_rates_24[idx].hw_value;
  3119. else
  3120. rate = mwl8k_rates_50[idx].hw_value;
  3121. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  3122. }
  3123. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  3124. struct sk_buff *skb;
  3125. skb = ieee80211_beacon_get(hw, vif);
  3126. if (skb != NULL) {
  3127. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  3128. kfree_skb(skb);
  3129. }
  3130. }
  3131. if (changed & BSS_CHANGED_BEACON_ENABLED)
  3132. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  3133. out:
  3134. mwl8k_fw_unlock(hw);
  3135. }
  3136. static void
  3137. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3138. struct ieee80211_bss_conf *info, u32 changed)
  3139. {
  3140. struct mwl8k_priv *priv = hw->priv;
  3141. if (!priv->ap_fw)
  3142. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  3143. else
  3144. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  3145. }
  3146. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  3147. struct netdev_hw_addr_list *mc_list)
  3148. {
  3149. struct mwl8k_cmd_pkt *cmd;
  3150. /*
  3151. * Synthesize and return a command packet that programs the
  3152. * hardware multicast address filter. At this point we don't
  3153. * know whether FIF_ALLMULTI is being requested, but if it is,
  3154. * we'll end up throwing this packet away and creating a new
  3155. * one in mwl8k_configure_filter().
  3156. */
  3157. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  3158. return (unsigned long)cmd;
  3159. }
  3160. static int
  3161. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  3162. unsigned int changed_flags,
  3163. unsigned int *total_flags)
  3164. {
  3165. struct mwl8k_priv *priv = hw->priv;
  3166. /*
  3167. * Hardware sniffer mode is mutually exclusive with STA
  3168. * operation, so refuse to enable sniffer mode if a STA
  3169. * interface is active.
  3170. */
  3171. if (!list_empty(&priv->vif_list)) {
  3172. if (net_ratelimit())
  3173. wiphy_info(hw->wiphy,
  3174. "not enabling sniffer mode because STA interface is active\n");
  3175. return 0;
  3176. }
  3177. if (!priv->sniffer_enabled) {
  3178. if (mwl8k_cmd_enable_sniffer(hw, 1))
  3179. return 0;
  3180. priv->sniffer_enabled = true;
  3181. }
  3182. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  3183. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  3184. FIF_OTHER_BSS;
  3185. return 1;
  3186. }
  3187. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  3188. {
  3189. if (!list_empty(&priv->vif_list))
  3190. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  3191. return NULL;
  3192. }
  3193. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  3194. unsigned int changed_flags,
  3195. unsigned int *total_flags,
  3196. u64 multicast)
  3197. {
  3198. struct mwl8k_priv *priv = hw->priv;
  3199. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  3200. /*
  3201. * AP firmware doesn't allow fine-grained control over
  3202. * the receive filter.
  3203. */
  3204. if (priv->ap_fw) {
  3205. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3206. kfree(cmd);
  3207. return;
  3208. }
  3209. /*
  3210. * Enable hardware sniffer mode if FIF_CONTROL or
  3211. * FIF_OTHER_BSS is requested.
  3212. */
  3213. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3214. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3215. kfree(cmd);
  3216. return;
  3217. }
  3218. /* Clear unsupported feature flags */
  3219. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3220. if (mwl8k_fw_lock(hw)) {
  3221. kfree(cmd);
  3222. return;
  3223. }
  3224. if (priv->sniffer_enabled) {
  3225. mwl8k_cmd_enable_sniffer(hw, 0);
  3226. priv->sniffer_enabled = false;
  3227. }
  3228. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3229. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3230. /*
  3231. * Disable the BSS filter.
  3232. */
  3233. mwl8k_cmd_set_pre_scan(hw);
  3234. } else {
  3235. struct mwl8k_vif *mwl8k_vif;
  3236. const u8 *bssid;
  3237. /*
  3238. * Enable the BSS filter.
  3239. *
  3240. * If there is an active STA interface, use that
  3241. * interface's BSSID, otherwise use a dummy one
  3242. * (where the OUI part needs to be nonzero for
  3243. * the BSSID to be accepted by POST_SCAN).
  3244. */
  3245. mwl8k_vif = mwl8k_first_vif(priv);
  3246. if (mwl8k_vif != NULL)
  3247. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3248. else
  3249. bssid = "\x01\x00\x00\x00\x00\x00";
  3250. mwl8k_cmd_set_post_scan(hw, bssid);
  3251. }
  3252. }
  3253. /*
  3254. * If FIF_ALLMULTI is being requested, throw away the command
  3255. * packet that ->prepare_multicast() built and replace it with
  3256. * a command packet that enables reception of all multicast
  3257. * packets.
  3258. */
  3259. if (*total_flags & FIF_ALLMULTI) {
  3260. kfree(cmd);
  3261. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3262. }
  3263. if (cmd != NULL) {
  3264. mwl8k_post_cmd(hw, cmd);
  3265. kfree(cmd);
  3266. }
  3267. mwl8k_fw_unlock(hw);
  3268. }
  3269. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3270. {
  3271. return mwl8k_cmd_set_rts_threshold(hw, value);
  3272. }
  3273. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3274. struct ieee80211_vif *vif,
  3275. struct ieee80211_sta *sta)
  3276. {
  3277. struct mwl8k_priv *priv = hw->priv;
  3278. if (priv->ap_fw)
  3279. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3280. else
  3281. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3282. }
  3283. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3284. struct ieee80211_vif *vif,
  3285. struct ieee80211_sta *sta)
  3286. {
  3287. struct mwl8k_priv *priv = hw->priv;
  3288. int ret;
  3289. if (!priv->ap_fw) {
  3290. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3291. if (ret >= 0) {
  3292. MWL8K_STA(sta)->peer_id = ret;
  3293. return 0;
  3294. }
  3295. } else {
  3296. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3297. return ret;
  3298. }
  3299. for (i = 0; i < NUM_WEP_KEYS; i++) {
  3300. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  3301. if (mwl8k_vif->wep_key_conf[i].enabled)
  3302. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  3303. }
  3304. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3305. }
  3306. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3307. const struct ieee80211_tx_queue_params *params)
  3308. {
  3309. struct mwl8k_priv *priv = hw->priv;
  3310. int rc;
  3311. rc = mwl8k_fw_lock(hw);
  3312. if (!rc) {
  3313. BUG_ON(queue > MWL8K_TX_QUEUES - 1);
  3314. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  3315. if (!priv->wmm_enabled)
  3316. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3317. if (!rc)
  3318. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3319. params->cw_min,
  3320. params->cw_max,
  3321. params->aifs,
  3322. params->txop);
  3323. mwl8k_fw_unlock(hw);
  3324. }
  3325. return rc;
  3326. }
  3327. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3328. struct ieee80211_low_level_stats *stats)
  3329. {
  3330. return mwl8k_cmd_get_stat(hw, stats);
  3331. }
  3332. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  3333. struct survey_info *survey)
  3334. {
  3335. struct mwl8k_priv *priv = hw->priv;
  3336. struct ieee80211_conf *conf = &hw->conf;
  3337. if (idx != 0)
  3338. return -ENOENT;
  3339. survey->channel = conf->channel;
  3340. survey->filled = SURVEY_INFO_NOISE_DBM;
  3341. survey->noise = priv->noise;
  3342. return 0;
  3343. }
  3344. static int
  3345. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3346. enum ieee80211_ampdu_mlme_action action,
  3347. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3348. {
  3349. switch (action) {
  3350. case IEEE80211_AMPDU_RX_START:
  3351. case IEEE80211_AMPDU_RX_STOP:
  3352. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3353. return -ENOTSUPP;
  3354. return 0;
  3355. default:
  3356. return -ENOTSUPP;
  3357. }
  3358. }
  3359. static const struct ieee80211_ops mwl8k_ops = {
  3360. .tx = mwl8k_tx,
  3361. .start = mwl8k_start,
  3362. .stop = mwl8k_stop,
  3363. .add_interface = mwl8k_add_interface,
  3364. .remove_interface = mwl8k_remove_interface,
  3365. .config = mwl8k_config,
  3366. .bss_info_changed = mwl8k_bss_info_changed,
  3367. .prepare_multicast = mwl8k_prepare_multicast,
  3368. .configure_filter = mwl8k_configure_filter,
  3369. .set_rts_threshold = mwl8k_set_rts_threshold,
  3370. .sta_add = mwl8k_sta_add,
  3371. .sta_remove = mwl8k_sta_remove,
  3372. .conf_tx = mwl8k_conf_tx,
  3373. .get_stats = mwl8k_get_stats,
  3374. .get_survey = mwl8k_get_survey,
  3375. .ampdu_action = mwl8k_ampdu_action,
  3376. };
  3377. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3378. {
  3379. struct mwl8k_priv *priv =
  3380. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3381. struct sk_buff *skb = priv->beacon_skb;
  3382. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3383. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3384. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3385. mgmt->u.beacon.variable, len);
  3386. int dtim_period = 1;
  3387. if (tim && tim[1] >= 2)
  3388. dtim_period = tim[3];
  3389. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3390. dev_kfree_skb(skb);
  3391. priv->beacon_skb = NULL;
  3392. }
  3393. enum {
  3394. MWL8363 = 0,
  3395. MWL8687,
  3396. MWL8366,
  3397. };
  3398. #define MWL8K_8366_AP_FW_API 1
  3399. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  3400. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  3401. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3402. [MWL8363] = {
  3403. .part_name = "88w8363",
  3404. .helper_image = "mwl8k/helper_8363.fw",
  3405. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  3406. },
  3407. [MWL8687] = {
  3408. .part_name = "88w8687",
  3409. .helper_image = "mwl8k/helper_8687.fw",
  3410. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  3411. },
  3412. [MWL8366] = {
  3413. .part_name = "88w8366",
  3414. .helper_image = "mwl8k/helper_8366.fw",
  3415. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  3416. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  3417. .fw_api_ap = MWL8K_8366_AP_FW_API,
  3418. .ap_rxd_ops = &rxd_8366_ap_ops,
  3419. },
  3420. };
  3421. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3422. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3423. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3424. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3425. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3426. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3427. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  3428. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3429. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3430. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3431. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3432. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3433. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3434. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3435. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3436. { },
  3437. };
  3438. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3439. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  3440. {
  3441. int rc;
  3442. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  3443. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  3444. priv->fw_pref, priv->fw_alt);
  3445. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  3446. if (rc) {
  3447. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  3448. pci_name(priv->pdev), priv->fw_alt);
  3449. return rc;
  3450. }
  3451. return 0;
  3452. }
  3453. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  3454. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  3455. {
  3456. struct mwl8k_priv *priv = context;
  3457. struct mwl8k_device_info *di = priv->device_info;
  3458. int rc;
  3459. switch (priv->fw_state) {
  3460. case FW_STATE_INIT:
  3461. if (!fw) {
  3462. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  3463. pci_name(priv->pdev), di->helper_image);
  3464. goto fail;
  3465. }
  3466. priv->fw_helper = fw;
  3467. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  3468. true);
  3469. if (rc && priv->fw_alt) {
  3470. rc = mwl8k_request_alt_fw(priv);
  3471. if (rc)
  3472. goto fail;
  3473. priv->fw_state = FW_STATE_LOADING_ALT;
  3474. } else if (rc)
  3475. goto fail;
  3476. else
  3477. priv->fw_state = FW_STATE_LOADING_PREF;
  3478. break;
  3479. case FW_STATE_LOADING_PREF:
  3480. if (!fw) {
  3481. if (priv->fw_alt) {
  3482. rc = mwl8k_request_alt_fw(priv);
  3483. if (rc)
  3484. goto fail;
  3485. priv->fw_state = FW_STATE_LOADING_ALT;
  3486. } else
  3487. goto fail;
  3488. } else {
  3489. priv->fw_ucode = fw;
  3490. rc = mwl8k_firmware_load_success(priv);
  3491. if (rc)
  3492. goto fail;
  3493. else
  3494. complete(&priv->firmware_loading_complete);
  3495. }
  3496. break;
  3497. case FW_STATE_LOADING_ALT:
  3498. if (!fw) {
  3499. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  3500. pci_name(priv->pdev), di->helper_image);
  3501. goto fail;
  3502. }
  3503. priv->fw_ucode = fw;
  3504. rc = mwl8k_firmware_load_success(priv);
  3505. if (rc)
  3506. goto fail;
  3507. else
  3508. complete(&priv->firmware_loading_complete);
  3509. break;
  3510. default:
  3511. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  3512. MWL8K_NAME, priv->fw_state);
  3513. BUG_ON(1);
  3514. }
  3515. return;
  3516. fail:
  3517. priv->fw_state = FW_STATE_ERROR;
  3518. complete(&priv->firmware_loading_complete);
  3519. device_release_driver(&priv->pdev->dev);
  3520. mwl8k_release_firmware(priv);
  3521. }
  3522. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  3523. bool nowait)
  3524. {
  3525. struct mwl8k_priv *priv = hw->priv;
  3526. int rc;
  3527. /* Reset firmware and hardware */
  3528. mwl8k_hw_reset(priv);
  3529. /* Ask userland hotplug daemon for the device firmware */
  3530. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  3531. if (rc) {
  3532. wiphy_err(hw->wiphy, "Firmware files not found\n");
  3533. return rc;
  3534. }
  3535. if (nowait)
  3536. return rc;
  3537. /* Load firmware into hardware */
  3538. rc = mwl8k_load_firmware(hw);
  3539. if (rc)
  3540. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3541. /* Reclaim memory once firmware is successfully loaded */
  3542. mwl8k_release_firmware(priv);
  3543. return rc;
  3544. }
  3545. /* initialize hw after successfully loading a firmware image */
  3546. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  3547. {
  3548. struct mwl8k_priv *priv = hw->priv;
  3549. int rc = 0;
  3550. int i;
  3551. if (priv->ap_fw) {
  3552. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3553. if (priv->rxd_ops == NULL) {
  3554. wiphy_err(hw->wiphy,
  3555. "Driver does not have AP firmware image support for this hardware\n");
  3556. goto err_stop_firmware;
  3557. }
  3558. } else {
  3559. priv->rxd_ops = &rxd_sta_ops;
  3560. }
  3561. priv->sniffer_enabled = false;
  3562. priv->wmm_enabled = false;
  3563. priv->pending_tx_pkts = 0;
  3564. rc = mwl8k_rxq_init(hw, 0);
  3565. if (rc)
  3566. goto err_stop_firmware;
  3567. rxq_refill(hw, 0, INT_MAX);
  3568. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3569. rc = mwl8k_txq_init(hw, i);
  3570. if (rc)
  3571. goto err_free_queues;
  3572. }
  3573. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3574. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3575. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3576. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3577. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3578. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3579. IRQF_SHARED, MWL8K_NAME, hw);
  3580. if (rc) {
  3581. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3582. goto err_free_queues;
  3583. }
  3584. /*
  3585. * Temporarily enable interrupts. Initial firmware host
  3586. * commands use interrupts and avoid polling. Disable
  3587. * interrupts when done.
  3588. */
  3589. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3590. /* Get config data, mac addrs etc */
  3591. if (priv->ap_fw) {
  3592. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3593. if (!rc)
  3594. rc = mwl8k_cmd_set_hw_spec(hw);
  3595. } else {
  3596. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3597. }
  3598. if (rc) {
  3599. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  3600. goto err_free_irq;
  3601. }
  3602. /* Turn radio off */
  3603. rc = mwl8k_cmd_radio_disable(hw);
  3604. if (rc) {
  3605. wiphy_err(hw->wiphy, "Cannot disable\n");
  3606. goto err_free_irq;
  3607. }
  3608. /* Clear MAC address */
  3609. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3610. if (rc) {
  3611. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  3612. goto err_free_irq;
  3613. }
  3614. /* Disable interrupts */
  3615. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3616. free_irq(priv->pdev->irq, hw);
  3617. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3618. priv->device_info->part_name,
  3619. priv->hw_rev, hw->wiphy->perm_addr,
  3620. priv->ap_fw ? "AP" : "STA",
  3621. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3622. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3623. return 0;
  3624. err_free_irq:
  3625. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3626. free_irq(priv->pdev->irq, hw);
  3627. err_free_queues:
  3628. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3629. mwl8k_txq_deinit(hw, i);
  3630. mwl8k_rxq_deinit(hw, 0);
  3631. err_stop_firmware:
  3632. mwl8k_hw_reset(priv);
  3633. return rc;
  3634. }
  3635. /*
  3636. * invoke mwl8k_reload_firmware to change the firmware image after the device
  3637. * has already been registered
  3638. */
  3639. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  3640. {
  3641. int i, rc = 0;
  3642. struct mwl8k_priv *priv = hw->priv;
  3643. mwl8k_stop(hw);
  3644. mwl8k_rxq_deinit(hw, 0);
  3645. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3646. mwl8k_txq_deinit(hw, i);
  3647. rc = mwl8k_init_firmware(hw, fw_image, false);
  3648. if (rc)
  3649. goto fail;
  3650. rc = mwl8k_probe_hw(hw);
  3651. if (rc)
  3652. goto fail;
  3653. rc = mwl8k_start(hw);
  3654. if (rc)
  3655. goto fail;
  3656. rc = mwl8k_config(hw, ~0);
  3657. if (rc)
  3658. goto fail;
  3659. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3660. rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
  3661. if (rc)
  3662. goto fail;
  3663. }
  3664. return rc;
  3665. fail:
  3666. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  3667. return rc;
  3668. }
  3669. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  3670. {
  3671. struct ieee80211_hw *hw = priv->hw;
  3672. int i, rc;
  3673. rc = mwl8k_load_firmware(hw);
  3674. mwl8k_release_firmware(priv);
  3675. if (rc) {
  3676. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3677. return rc;
  3678. }
  3679. /*
  3680. * Extra headroom is the size of the required DMA header
  3681. * minus the size of the smallest 802.11 frame (CTS frame).
  3682. */
  3683. hw->extra_tx_headroom =
  3684. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3685. hw->channel_change_time = 10;
  3686. hw->queues = MWL8K_TX_QUEUES;
  3687. /* Set rssi values to dBm */
  3688. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3689. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3690. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3691. priv->macids_used = 0;
  3692. INIT_LIST_HEAD(&priv->vif_list);
  3693. /* Set default radio state and preamble */
  3694. priv->radio_on = 0;
  3695. priv->radio_short_preamble = 0;
  3696. /* Finalize join worker */
  3697. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3698. /* TX reclaim and RX tasklets. */
  3699. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3700. tasklet_disable(&priv->poll_tx_task);
  3701. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3702. tasklet_disable(&priv->poll_rx_task);
  3703. /* Power management cookie */
  3704. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3705. if (priv->cookie == NULL)
  3706. return -ENOMEM;
  3707. mutex_init(&priv->fw_mutex);
  3708. priv->fw_mutex_owner = NULL;
  3709. priv->fw_mutex_depth = 0;
  3710. priv->hostcmd_wait = NULL;
  3711. spin_lock_init(&priv->tx_lock);
  3712. priv->tx_wait = NULL;
  3713. rc = mwl8k_probe_hw(hw);
  3714. if (rc)
  3715. goto err_free_cookie;
  3716. hw->wiphy->interface_modes = 0;
  3717. if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
  3718. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3719. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  3720. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3721. rc = ieee80211_register_hw(hw);
  3722. if (rc) {
  3723. wiphy_err(hw->wiphy, "Cannot register device\n");
  3724. goto err_unprobe_hw;
  3725. }
  3726. return 0;
  3727. err_unprobe_hw:
  3728. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3729. mwl8k_txq_deinit(hw, i);
  3730. mwl8k_rxq_deinit(hw, 0);
  3731. err_free_cookie:
  3732. if (priv->cookie != NULL)
  3733. pci_free_consistent(priv->pdev, 4,
  3734. priv->cookie, priv->cookie_dma);
  3735. return rc;
  3736. }
  3737. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3738. const struct pci_device_id *id)
  3739. {
  3740. static int printed_version;
  3741. struct ieee80211_hw *hw;
  3742. struct mwl8k_priv *priv;
  3743. struct mwl8k_device_info *di;
  3744. int rc;
  3745. if (!printed_version) {
  3746. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3747. printed_version = 1;
  3748. }
  3749. rc = pci_enable_device(pdev);
  3750. if (rc) {
  3751. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3752. MWL8K_NAME);
  3753. return rc;
  3754. }
  3755. rc = pci_request_regions(pdev, MWL8K_NAME);
  3756. if (rc) {
  3757. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3758. MWL8K_NAME);
  3759. goto err_disable_device;
  3760. }
  3761. pci_set_master(pdev);
  3762. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3763. if (hw == NULL) {
  3764. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3765. rc = -ENOMEM;
  3766. goto err_free_reg;
  3767. }
  3768. SET_IEEE80211_DEV(hw, &pdev->dev);
  3769. pci_set_drvdata(pdev, hw);
  3770. priv = hw->priv;
  3771. priv->hw = hw;
  3772. priv->pdev = pdev;
  3773. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3774. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3775. if (priv->sram == NULL) {
  3776. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  3777. goto err_iounmap;
  3778. }
  3779. /*
  3780. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3781. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3782. */
  3783. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3784. if (priv->regs == NULL) {
  3785. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3786. if (priv->regs == NULL) {
  3787. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  3788. goto err_iounmap;
  3789. }
  3790. }
  3791. /*
  3792. * Choose the initial fw image depending on user input. If a second
  3793. * image is available, make it the alternative image that will be
  3794. * loaded if the first one fails.
  3795. */
  3796. init_completion(&priv->firmware_loading_complete);
  3797. di = priv->device_info;
  3798. if (ap_mode_default && di->fw_image_ap) {
  3799. priv->fw_pref = di->fw_image_ap;
  3800. priv->fw_alt = di->fw_image_sta;
  3801. } else if (!ap_mode_default && di->fw_image_sta) {
  3802. priv->fw_pref = di->fw_image_sta;
  3803. priv->fw_alt = di->fw_image_ap;
  3804. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  3805. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  3806. priv->fw_pref = di->fw_image_sta;
  3807. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  3808. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  3809. priv->fw_pref = di->fw_image_ap;
  3810. }
  3811. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  3812. if (rc)
  3813. goto err_stop_firmware;
  3814. return rc;
  3815. err_stop_firmware:
  3816. mwl8k_hw_reset(priv);
  3817. err_iounmap:
  3818. if (priv->regs != NULL)
  3819. pci_iounmap(pdev, priv->regs);
  3820. if (priv->sram != NULL)
  3821. pci_iounmap(pdev, priv->sram);
  3822. pci_set_drvdata(pdev, NULL);
  3823. ieee80211_free_hw(hw);
  3824. err_free_reg:
  3825. pci_release_regions(pdev);
  3826. err_disable_device:
  3827. pci_disable_device(pdev);
  3828. return rc;
  3829. }
  3830. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3831. {
  3832. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3833. }
  3834. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3835. {
  3836. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3837. struct mwl8k_priv *priv;
  3838. int i;
  3839. if (hw == NULL)
  3840. return;
  3841. priv = hw->priv;
  3842. wait_for_completion(&priv->firmware_loading_complete);
  3843. if (priv->fw_state == FW_STATE_ERROR) {
  3844. mwl8k_hw_reset(priv);
  3845. goto unmap;
  3846. }
  3847. ieee80211_stop_queues(hw);
  3848. ieee80211_unregister_hw(hw);
  3849. /* Remove TX reclaim and RX tasklets. */
  3850. tasklet_kill(&priv->poll_tx_task);
  3851. tasklet_kill(&priv->poll_rx_task);
  3852. /* Stop hardware */
  3853. mwl8k_hw_reset(priv);
  3854. /* Return all skbs to mac80211 */
  3855. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3856. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3857. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3858. mwl8k_txq_deinit(hw, i);
  3859. mwl8k_rxq_deinit(hw, 0);
  3860. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3861. unmap:
  3862. pci_iounmap(pdev, priv->regs);
  3863. pci_iounmap(pdev, priv->sram);
  3864. pci_set_drvdata(pdev, NULL);
  3865. ieee80211_free_hw(hw);
  3866. pci_release_regions(pdev);
  3867. pci_disable_device(pdev);
  3868. }
  3869. static struct pci_driver mwl8k_driver = {
  3870. .name = MWL8K_NAME,
  3871. .id_table = mwl8k_pci_id_table,
  3872. .probe = mwl8k_probe,
  3873. .remove = __devexit_p(mwl8k_remove),
  3874. .shutdown = __devexit_p(mwl8k_shutdown),
  3875. };
  3876. static int __init mwl8k_init(void)
  3877. {
  3878. return pci_register_driver(&mwl8k_driver);
  3879. }
  3880. static void __exit mwl8k_exit(void)
  3881. {
  3882. pci_unregister_driver(&mwl8k_driver);
  3883. }
  3884. module_init(mwl8k_init);
  3885. module_exit(mwl8k_exit);
  3886. MODULE_DESCRIPTION(MWL8K_DESC);
  3887. MODULE_VERSION(MWL8K_VERSION);
  3888. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3889. MODULE_LICENSE("GPL");