iwl4965-base.c 263 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.23k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. static int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For normal Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  419. int is_ap, u8 flags, void *ht_data)
  420. {
  421. int i;
  422. int index = IWL_INVALID_STATION;
  423. struct iwl4965_station_entry *station;
  424. unsigned long flags_spin;
  425. DECLARE_MAC_BUF(mac);
  426. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  427. if (is_ap)
  428. index = IWL_AP_ID;
  429. else if (is_broadcast_ether_addr(addr))
  430. index = priv->hw_setting.bcast_sta_id;
  431. else
  432. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  433. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  434. addr)) {
  435. index = i;
  436. break;
  437. }
  438. if (!priv->stations[i].used &&
  439. index == IWL_INVALID_STATION)
  440. index = i;
  441. }
  442. /* These two conditions have the same outcome, but keep them separate
  443. since they have different meanings */
  444. if (unlikely(index == IWL_INVALID_STATION)) {
  445. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  446. return index;
  447. }
  448. if (priv->stations[index].used &&
  449. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  450. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  451. return index;
  452. }
  453. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  454. station = &priv->stations[index];
  455. station->used = 1;
  456. priv->num_stations++;
  457. /* Set up the REPLY_ADD_STA command to send to device */
  458. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  459. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  460. station->sta.mode = 0;
  461. station->sta.sta.sta_id = index;
  462. station->sta.station_flags = 0;
  463. #ifdef CONFIG_IWL4965_HT
  464. /* BCAST station and IBSS stations do not work in HT mode */
  465. if (index != priv->hw_setting.bcast_sta_id &&
  466. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  467. iwl4965_set_ht_add_station(priv, index,
  468. (struct ieee80211_ht_info *) ht_data);
  469. #endif /*CONFIG_IWL4965_HT*/
  470. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  471. /* Add station to device's station table */
  472. iwl4965_send_add_station(priv, &station->sta, flags);
  473. return index;
  474. }
  475. /*************** DRIVER STATUS FUNCTIONS *****/
  476. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  477. {
  478. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  479. * set but EXIT_PENDING is not */
  480. return test_bit(STATUS_READY, &priv->status) &&
  481. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  482. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  483. }
  484. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  485. {
  486. return test_bit(STATUS_ALIVE, &priv->status);
  487. }
  488. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  489. {
  490. return test_bit(STATUS_INIT, &priv->status);
  491. }
  492. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  493. {
  494. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  495. test_bit(STATUS_RF_KILL_SW, &priv->status);
  496. }
  497. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  498. {
  499. if (iwl4965_is_rfkill(priv))
  500. return 0;
  501. return iwl4965_is_ready(priv);
  502. }
  503. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  504. #define IWL_CMD(x) case x : return #x
  505. static const char *get_cmd_string(u8 cmd)
  506. {
  507. switch (cmd) {
  508. IWL_CMD(REPLY_ALIVE);
  509. IWL_CMD(REPLY_ERROR);
  510. IWL_CMD(REPLY_RXON);
  511. IWL_CMD(REPLY_RXON_ASSOC);
  512. IWL_CMD(REPLY_QOS_PARAM);
  513. IWL_CMD(REPLY_RXON_TIMING);
  514. IWL_CMD(REPLY_ADD_STA);
  515. IWL_CMD(REPLY_REMOVE_STA);
  516. IWL_CMD(REPLY_REMOVE_ALL_STA);
  517. IWL_CMD(REPLY_TX);
  518. IWL_CMD(REPLY_RATE_SCALE);
  519. IWL_CMD(REPLY_LEDS_CMD);
  520. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  521. IWL_CMD(RADAR_NOTIFICATION);
  522. IWL_CMD(REPLY_QUIET_CMD);
  523. IWL_CMD(REPLY_CHANNEL_SWITCH);
  524. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  525. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  526. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  527. IWL_CMD(POWER_TABLE_CMD);
  528. IWL_CMD(PM_SLEEP_NOTIFICATION);
  529. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  530. IWL_CMD(REPLY_SCAN_CMD);
  531. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  532. IWL_CMD(SCAN_START_NOTIFICATION);
  533. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  534. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  535. IWL_CMD(BEACON_NOTIFICATION);
  536. IWL_CMD(REPLY_TX_BEACON);
  537. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  538. IWL_CMD(QUIET_NOTIFICATION);
  539. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  540. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  541. IWL_CMD(REPLY_BT_CONFIG);
  542. IWL_CMD(REPLY_STATISTICS_CMD);
  543. IWL_CMD(STATISTICS_NOTIFICATION);
  544. IWL_CMD(REPLY_CARD_STATE_CMD);
  545. IWL_CMD(CARD_STATE_NOTIFICATION);
  546. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  547. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  548. IWL_CMD(SENSITIVITY_CMD);
  549. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  550. IWL_CMD(REPLY_RX_PHY_CMD);
  551. IWL_CMD(REPLY_RX_MPDU_CMD);
  552. IWL_CMD(REPLY_4965_RX);
  553. IWL_CMD(REPLY_COMPRESSED_BA);
  554. default:
  555. return "UNKNOWN";
  556. }
  557. }
  558. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  559. /**
  560. * iwl4965_enqueue_hcmd - enqueue a uCode command
  561. * @priv: device private data point
  562. * @cmd: a point to the ucode command structure
  563. *
  564. * The function returns < 0 values to indicate the operation is
  565. * failed. On success, it turns the index (> 0) of command in the
  566. * command queue.
  567. */
  568. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  569. {
  570. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  571. struct iwl4965_queue *q = &txq->q;
  572. struct iwl4965_tfd_frame *tfd;
  573. u32 *control_flags;
  574. struct iwl4965_cmd *out_cmd;
  575. u32 idx;
  576. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  577. dma_addr_t phys_addr;
  578. int ret;
  579. unsigned long flags;
  580. /* If any of the command structures end up being larger than
  581. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  582. * we will need to increase the size of the TFD entries */
  583. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  584. !(cmd->meta.flags & CMD_SIZE_HUGE));
  585. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  586. IWL_ERROR("No space for Tx\n");
  587. return -ENOSPC;
  588. }
  589. spin_lock_irqsave(&priv->hcmd_lock, flags);
  590. tfd = &txq->bd[q->write_ptr];
  591. memset(tfd, 0, sizeof(*tfd));
  592. control_flags = (u32 *) tfd;
  593. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  594. out_cmd = &txq->cmd[idx];
  595. out_cmd->hdr.cmd = cmd->id;
  596. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  597. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  598. /* At this point, the out_cmd now has all of the incoming cmd
  599. * information */
  600. out_cmd->hdr.flags = 0;
  601. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  602. INDEX_TO_SEQ(q->write_ptr));
  603. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  604. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  605. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  606. offsetof(struct iwl4965_cmd, hdr);
  607. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  608. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  609. "%d bytes at %d[%d]:%d\n",
  610. get_cmd_string(out_cmd->hdr.cmd),
  611. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  612. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  613. txq->need_update = 1;
  614. /* Set up entry in queue's byte count circular buffer */
  615. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  616. /* Increment and update queue's write index */
  617. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  618. iwl4965_tx_queue_update_write_ptr(priv, txq);
  619. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  620. return ret ? ret : idx;
  621. }
  622. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  623. {
  624. int ret;
  625. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  626. /* An asynchronous command can not expect an SKB to be set. */
  627. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  628. /* An asynchronous command MUST have a callback. */
  629. BUG_ON(!cmd->meta.u.callback);
  630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  631. return -EBUSY;
  632. ret = iwl4965_enqueue_hcmd(priv, cmd);
  633. if (ret < 0) {
  634. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  635. get_cmd_string(cmd->id), ret);
  636. return ret;
  637. }
  638. return 0;
  639. }
  640. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  641. {
  642. int cmd_idx;
  643. int ret;
  644. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  645. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  646. /* A synchronous command can not have a callback set. */
  647. BUG_ON(cmd->meta.u.callback != NULL);
  648. if (atomic_xchg(&entry, 1)) {
  649. IWL_ERROR("Error sending %s: Already sending a host command\n",
  650. get_cmd_string(cmd->id));
  651. return -EBUSY;
  652. }
  653. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  654. if (cmd->meta.flags & CMD_WANT_SKB)
  655. cmd->meta.source = &cmd->meta;
  656. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  657. if (cmd_idx < 0) {
  658. ret = cmd_idx;
  659. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  660. get_cmd_string(cmd->id), ret);
  661. goto out;
  662. }
  663. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  664. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  665. HOST_COMPLETE_TIMEOUT);
  666. if (!ret) {
  667. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  668. IWL_ERROR("Error sending %s: time out after %dms.\n",
  669. get_cmd_string(cmd->id),
  670. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  671. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  672. ret = -ETIMEDOUT;
  673. goto cancel;
  674. }
  675. }
  676. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  677. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  678. get_cmd_string(cmd->id));
  679. ret = -ECANCELED;
  680. goto fail;
  681. }
  682. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  683. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  684. get_cmd_string(cmd->id));
  685. ret = -EIO;
  686. goto fail;
  687. }
  688. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  689. IWL_ERROR("Error: Response NULL in '%s'\n",
  690. get_cmd_string(cmd->id));
  691. ret = -EIO;
  692. goto out;
  693. }
  694. ret = 0;
  695. goto out;
  696. cancel:
  697. if (cmd->meta.flags & CMD_WANT_SKB) {
  698. struct iwl4965_cmd *qcmd;
  699. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  700. * TX cmd queue. Otherwise in case the cmd comes
  701. * in later, it will possibly set an invalid
  702. * address (cmd->meta.source). */
  703. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  704. qcmd->meta.flags &= ~CMD_WANT_SKB;
  705. }
  706. fail:
  707. if (cmd->meta.u.skb) {
  708. dev_kfree_skb_any(cmd->meta.u.skb);
  709. cmd->meta.u.skb = NULL;
  710. }
  711. out:
  712. atomic_set(&entry, 0);
  713. return ret;
  714. }
  715. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  716. {
  717. if (cmd->meta.flags & CMD_ASYNC)
  718. return iwl4965_send_cmd_async(priv, cmd);
  719. return iwl4965_send_cmd_sync(priv, cmd);
  720. }
  721. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  722. {
  723. struct iwl4965_host_cmd cmd = {
  724. .id = id,
  725. .len = len,
  726. .data = data,
  727. };
  728. return iwl4965_send_cmd_sync(priv, &cmd);
  729. }
  730. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  731. {
  732. struct iwl4965_host_cmd cmd = {
  733. .id = id,
  734. .len = sizeof(val),
  735. .data = &val,
  736. };
  737. return iwl4965_send_cmd_sync(priv, &cmd);
  738. }
  739. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  740. {
  741. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  742. }
  743. /**
  744. * iwl4965_rxon_add_station - add station into station table.
  745. *
  746. * there is only one AP station with id= IWL_AP_ID
  747. * NOTE: mutex must be held before calling this fnction
  748. */
  749. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  750. const u8 *addr, int is_ap)
  751. {
  752. u8 sta_id;
  753. /* Add station to device's station table */
  754. #ifdef CONFIG_IWL4965_HT
  755. struct ieee80211_conf *conf = &priv->hw->conf;
  756. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  757. if ((is_ap) &&
  758. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  759. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  760. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  761. 0, cur_ht_config);
  762. else
  763. #endif /* CONFIG_IWL4965_HT */
  764. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  765. 0, NULL);
  766. /* Set up default rate scaling table in device's station table */
  767. iwl4965_add_station(priv, addr, is_ap);
  768. return sta_id;
  769. }
  770. /**
  771. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  772. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  773. * @channel: Any channel valid for the requested phymode
  774. * In addition to setting the staging RXON, priv->phymode is also set.
  775. *
  776. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  777. * in the staging RXON flag structure based on the phymode
  778. */
  779. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  780. u16 channel)
  781. {
  782. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  783. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  784. channel, phymode);
  785. return -EINVAL;
  786. }
  787. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  788. (priv->phymode == phymode))
  789. return 0;
  790. priv->staging_rxon.channel = cpu_to_le16(channel);
  791. if (phymode == MODE_IEEE80211A)
  792. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  793. else
  794. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  795. priv->phymode = phymode;
  796. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  797. return 0;
  798. }
  799. /**
  800. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  801. *
  802. * NOTE: This is really only useful during development and can eventually
  803. * be #ifdef'd out once the driver is stable and folks aren't actively
  804. * making changes
  805. */
  806. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  807. {
  808. int error = 0;
  809. int counter = 1;
  810. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  811. error |= le32_to_cpu(rxon->flags &
  812. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  813. RXON_FLG_RADAR_DETECT_MSK));
  814. if (error)
  815. IWL_WARNING("check 24G fields %d | %d\n",
  816. counter++, error);
  817. } else {
  818. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  819. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  820. if (error)
  821. IWL_WARNING("check 52 fields %d | %d\n",
  822. counter++, error);
  823. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  824. if (error)
  825. IWL_WARNING("check 52 CCK %d | %d\n",
  826. counter++, error);
  827. }
  828. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  829. if (error)
  830. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  831. /* make sure basic rates 6Mbps and 1Mbps are supported */
  832. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  833. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  834. if (error)
  835. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  836. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  837. if (error)
  838. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  839. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  840. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  841. if (error)
  842. IWL_WARNING("check CCK and short slot %d | %d\n",
  843. counter++, error);
  844. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  845. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  846. if (error)
  847. IWL_WARNING("check CCK & auto detect %d | %d\n",
  848. counter++, error);
  849. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  850. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  851. if (error)
  852. IWL_WARNING("check TGG and auto detect %d | %d\n",
  853. counter++, error);
  854. if (error)
  855. IWL_WARNING("Tuning to channel %d\n",
  856. le16_to_cpu(rxon->channel));
  857. if (error) {
  858. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  859. return -1;
  860. }
  861. return 0;
  862. }
  863. /**
  864. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  865. * @priv: staging_rxon is compared to active_rxon
  866. *
  867. * If the RXON structure is changing enough to require a new tune,
  868. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  869. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  870. */
  871. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  872. {
  873. /* These items are only settable from the full RXON command */
  874. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  875. compare_ether_addr(priv->staging_rxon.bssid_addr,
  876. priv->active_rxon.bssid_addr) ||
  877. compare_ether_addr(priv->staging_rxon.node_addr,
  878. priv->active_rxon.node_addr) ||
  879. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  880. priv->active_rxon.wlap_bssid_addr) ||
  881. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  882. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  883. (priv->staging_rxon.air_propagation !=
  884. priv->active_rxon.air_propagation) ||
  885. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  886. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  887. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  888. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  889. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  890. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  891. return 1;
  892. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  893. * be updated with the RXON_ASSOC command -- however only some
  894. * flag transitions are allowed using RXON_ASSOC */
  895. /* Check if we are not switching bands */
  896. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  897. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  898. return 1;
  899. /* Check if we are switching association toggle */
  900. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  901. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  902. return 1;
  903. return 0;
  904. }
  905. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  906. {
  907. int rc = 0;
  908. struct iwl4965_rx_packet *res = NULL;
  909. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  910. struct iwl4965_host_cmd cmd = {
  911. .id = REPLY_RXON_ASSOC,
  912. .len = sizeof(rxon_assoc),
  913. .meta.flags = CMD_WANT_SKB,
  914. .data = &rxon_assoc,
  915. };
  916. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  917. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  918. if ((rxon1->flags == rxon2->flags) &&
  919. (rxon1->filter_flags == rxon2->filter_flags) &&
  920. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  921. (rxon1->ofdm_ht_single_stream_basic_rates ==
  922. rxon2->ofdm_ht_single_stream_basic_rates) &&
  923. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  924. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  925. (rxon1->rx_chain == rxon2->rx_chain) &&
  926. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  927. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  928. return 0;
  929. }
  930. rxon_assoc.flags = priv->staging_rxon.flags;
  931. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  932. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  933. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  934. rxon_assoc.reserved = 0;
  935. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  936. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  937. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  938. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  939. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  940. rc = iwl4965_send_cmd_sync(priv, &cmd);
  941. if (rc)
  942. return rc;
  943. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  944. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  945. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  946. rc = -EIO;
  947. }
  948. priv->alloc_rxb_skb--;
  949. dev_kfree_skb_any(cmd.meta.u.skb);
  950. return rc;
  951. }
  952. /**
  953. * iwl4965_commit_rxon - commit staging_rxon to hardware
  954. *
  955. * The RXON command in staging_rxon is committed to the hardware and
  956. * the active_rxon structure is updated with the new data. This
  957. * function correctly transitions out of the RXON_ASSOC_MSK state if
  958. * a HW tune is required based on the RXON structure changes.
  959. */
  960. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  961. {
  962. /* cast away the const for active_rxon in this function */
  963. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  964. DECLARE_MAC_BUF(mac);
  965. int rc = 0;
  966. if (!iwl4965_is_alive(priv))
  967. return -1;
  968. /* always get timestamp with Rx frame */
  969. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  970. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  971. if (rc) {
  972. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  973. return -EINVAL;
  974. }
  975. /* If we don't need to send a full RXON, we can use
  976. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  977. * and other flags for the current radio configuration. */
  978. if (!iwl4965_full_rxon_required(priv)) {
  979. rc = iwl4965_send_rxon_assoc(priv);
  980. if (rc) {
  981. IWL_ERROR("Error setting RXON_ASSOC "
  982. "configuration (%d).\n", rc);
  983. return rc;
  984. }
  985. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  986. return 0;
  987. }
  988. /* station table will be cleared */
  989. priv->assoc_station_added = 0;
  990. #ifdef CONFIG_IWL4965_SENSITIVITY
  991. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  992. if (!priv->error_recovering)
  993. priv->start_calib = 0;
  994. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  995. #endif /* CONFIG_IWL4965_SENSITIVITY */
  996. /* If we are currently associated and the new config requires
  997. * an RXON_ASSOC and the new config wants the associated mask enabled,
  998. * we must clear the associated from the active configuration
  999. * before we apply the new config */
  1000. if (iwl4965_is_associated(priv) &&
  1001. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  1002. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  1003. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1004. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1005. sizeof(struct iwl4965_rxon_cmd),
  1006. &priv->active_rxon);
  1007. /* If the mask clearing failed then we set
  1008. * active_rxon back to what it was previously */
  1009. if (rc) {
  1010. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1011. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1012. "configuration (%d).\n", rc);
  1013. return rc;
  1014. }
  1015. }
  1016. IWL_DEBUG_INFO("Sending RXON\n"
  1017. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1018. "* channel = %d\n"
  1019. "* bssid = %s\n",
  1020. ((priv->staging_rxon.filter_flags &
  1021. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1022. le16_to_cpu(priv->staging_rxon.channel),
  1023. print_mac(mac, priv->staging_rxon.bssid_addr));
  1024. /* Apply the new configuration */
  1025. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1026. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1027. if (rc) {
  1028. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1029. return rc;
  1030. }
  1031. iwl4965_clear_stations_table(priv);
  1032. #ifdef CONFIG_IWL4965_SENSITIVITY
  1033. if (!priv->error_recovering)
  1034. priv->start_calib = 0;
  1035. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1036. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1037. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1038. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1039. /* If we issue a new RXON command which required a tune then we must
  1040. * send a new TXPOWER command or we won't be able to Tx any frames */
  1041. rc = iwl4965_hw_reg_send_txpower(priv);
  1042. if (rc) {
  1043. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1044. return rc;
  1045. }
  1046. /* Add the broadcast address so we can send broadcast frames */
  1047. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1048. IWL_INVALID_STATION) {
  1049. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1050. return -EIO;
  1051. }
  1052. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1053. * add the IWL_AP_ID to the station rate table */
  1054. if (iwl4965_is_associated(priv) &&
  1055. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1056. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1057. == IWL_INVALID_STATION) {
  1058. IWL_ERROR("Error adding AP address for transmit.\n");
  1059. return -EIO;
  1060. }
  1061. priv->assoc_station_added = 1;
  1062. }
  1063. return 0;
  1064. }
  1065. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1066. {
  1067. struct iwl4965_bt_cmd bt_cmd = {
  1068. .flags = 3,
  1069. .lead_time = 0xAA,
  1070. .max_kill = 1,
  1071. .kill_ack_mask = 0,
  1072. .kill_cts_mask = 0,
  1073. };
  1074. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1075. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1076. }
  1077. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1078. {
  1079. int rc = 0;
  1080. struct iwl4965_rx_packet *res;
  1081. struct iwl4965_host_cmd cmd = {
  1082. .id = REPLY_SCAN_ABORT_CMD,
  1083. .meta.flags = CMD_WANT_SKB,
  1084. };
  1085. /* If there isn't a scan actively going on in the hardware
  1086. * then we are in between scan bands and not actually
  1087. * actively scanning, so don't send the abort command */
  1088. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1089. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1090. return 0;
  1091. }
  1092. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1093. if (rc) {
  1094. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1095. return rc;
  1096. }
  1097. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1098. if (res->u.status != CAN_ABORT_STATUS) {
  1099. /* The scan abort will return 1 for success or
  1100. * 2 for "failure". A failure condition can be
  1101. * due to simply not being in an active scan which
  1102. * can occur if we send the scan abort before we
  1103. * the microcode has notified us that a scan is
  1104. * completed. */
  1105. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1106. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1107. clear_bit(STATUS_SCAN_HW, &priv->status);
  1108. }
  1109. dev_kfree_skb_any(cmd.meta.u.skb);
  1110. return rc;
  1111. }
  1112. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1113. struct iwl4965_cmd *cmd,
  1114. struct sk_buff *skb)
  1115. {
  1116. return 1;
  1117. }
  1118. /*
  1119. * CARD_STATE_CMD
  1120. *
  1121. * Use: Sets the device's internal card state to enable, disable, or halt
  1122. *
  1123. * When in the 'enable' state the card operates as normal.
  1124. * When in the 'disable' state, the card enters into a low power mode.
  1125. * When in the 'halt' state, the card is shut down and must be fully
  1126. * restarted to come back on.
  1127. */
  1128. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1129. {
  1130. struct iwl4965_host_cmd cmd = {
  1131. .id = REPLY_CARD_STATE_CMD,
  1132. .len = sizeof(u32),
  1133. .data = &flags,
  1134. .meta.flags = meta_flag,
  1135. };
  1136. if (meta_flag & CMD_ASYNC)
  1137. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1138. return iwl4965_send_cmd(priv, &cmd);
  1139. }
  1140. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1141. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1142. {
  1143. struct iwl4965_rx_packet *res = NULL;
  1144. if (!skb) {
  1145. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1146. return 1;
  1147. }
  1148. res = (struct iwl4965_rx_packet *)skb->data;
  1149. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1150. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1151. res->hdr.flags);
  1152. return 1;
  1153. }
  1154. switch (res->u.add_sta.status) {
  1155. case ADD_STA_SUCCESS_MSK:
  1156. break;
  1157. default:
  1158. break;
  1159. }
  1160. /* We didn't cache the SKB; let the caller free it */
  1161. return 1;
  1162. }
  1163. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1164. struct iwl4965_addsta_cmd *sta, u8 flags)
  1165. {
  1166. struct iwl4965_rx_packet *res = NULL;
  1167. int rc = 0;
  1168. struct iwl4965_host_cmd cmd = {
  1169. .id = REPLY_ADD_STA,
  1170. .len = sizeof(struct iwl4965_addsta_cmd),
  1171. .meta.flags = flags,
  1172. .data = sta,
  1173. };
  1174. if (flags & CMD_ASYNC)
  1175. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1176. else
  1177. cmd.meta.flags |= CMD_WANT_SKB;
  1178. rc = iwl4965_send_cmd(priv, &cmd);
  1179. if (rc || (flags & CMD_ASYNC))
  1180. return rc;
  1181. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1182. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1183. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1184. res->hdr.flags);
  1185. rc = -EIO;
  1186. }
  1187. if (rc == 0) {
  1188. switch (res->u.add_sta.status) {
  1189. case ADD_STA_SUCCESS_MSK:
  1190. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1191. break;
  1192. default:
  1193. rc = -EIO;
  1194. IWL_WARNING("REPLY_ADD_STA failed\n");
  1195. break;
  1196. }
  1197. }
  1198. priv->alloc_rxb_skb--;
  1199. dev_kfree_skb_any(cmd.meta.u.skb);
  1200. return rc;
  1201. }
  1202. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1203. struct ieee80211_key_conf *keyconf,
  1204. u8 sta_id)
  1205. {
  1206. unsigned long flags;
  1207. __le16 key_flags = 0;
  1208. switch (keyconf->alg) {
  1209. case ALG_CCMP:
  1210. key_flags |= STA_KEY_FLG_CCMP;
  1211. key_flags |= cpu_to_le16(
  1212. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1213. key_flags &= ~STA_KEY_FLG_INVALID;
  1214. break;
  1215. case ALG_TKIP:
  1216. case ALG_WEP:
  1217. default:
  1218. return -EINVAL;
  1219. }
  1220. spin_lock_irqsave(&priv->sta_lock, flags);
  1221. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1222. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1223. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1224. keyconf->keylen);
  1225. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1226. keyconf->keylen);
  1227. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1228. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1229. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1230. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1231. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1232. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1233. return 0;
  1234. }
  1235. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1236. {
  1237. unsigned long flags;
  1238. spin_lock_irqsave(&priv->sta_lock, flags);
  1239. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1240. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1241. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1242. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1243. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1244. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1245. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1246. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1247. return 0;
  1248. }
  1249. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1250. {
  1251. struct list_head *element;
  1252. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1253. priv->frames_count);
  1254. while (!list_empty(&priv->free_frames)) {
  1255. element = priv->free_frames.next;
  1256. list_del(element);
  1257. kfree(list_entry(element, struct iwl4965_frame, list));
  1258. priv->frames_count--;
  1259. }
  1260. if (priv->frames_count) {
  1261. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1262. priv->frames_count);
  1263. priv->frames_count = 0;
  1264. }
  1265. }
  1266. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1267. {
  1268. struct iwl4965_frame *frame;
  1269. struct list_head *element;
  1270. if (list_empty(&priv->free_frames)) {
  1271. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1272. if (!frame) {
  1273. IWL_ERROR("Could not allocate frame!\n");
  1274. return NULL;
  1275. }
  1276. priv->frames_count++;
  1277. return frame;
  1278. }
  1279. element = priv->free_frames.next;
  1280. list_del(element);
  1281. return list_entry(element, struct iwl4965_frame, list);
  1282. }
  1283. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1284. {
  1285. memset(frame, 0, sizeof(*frame));
  1286. list_add(&frame->list, &priv->free_frames);
  1287. }
  1288. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1289. struct ieee80211_hdr *hdr,
  1290. const u8 *dest, int left)
  1291. {
  1292. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1293. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1294. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1295. return 0;
  1296. if (priv->ibss_beacon->len > left)
  1297. return 0;
  1298. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1299. return priv->ibss_beacon->len;
  1300. }
  1301. int iwl4965_rate_index_from_plcp(int plcp)
  1302. {
  1303. int i = 0;
  1304. /* 4965 HT rate format */
  1305. if (plcp & RATE_MCS_HT_MSK) {
  1306. i = (plcp & 0xff);
  1307. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1308. i = i - IWL_RATE_MIMO_6M_PLCP;
  1309. i += IWL_FIRST_OFDM_RATE;
  1310. /* skip 9M not supported in ht*/
  1311. if (i >= IWL_RATE_9M_INDEX)
  1312. i += 1;
  1313. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1314. (i <= IWL_LAST_OFDM_RATE))
  1315. return i;
  1316. /* 4965 legacy rate format, search for match in table */
  1317. } else {
  1318. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1319. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1320. return i;
  1321. }
  1322. return -1;
  1323. }
  1324. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1325. {
  1326. u8 i;
  1327. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1328. i = iwl4965_rates[i].next_ieee) {
  1329. if (rate_mask & (1 << i))
  1330. return iwl4965_rates[i].plcp;
  1331. }
  1332. return IWL_RATE_INVALID;
  1333. }
  1334. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1335. {
  1336. struct iwl4965_frame *frame;
  1337. unsigned int frame_size;
  1338. int rc;
  1339. u8 rate;
  1340. frame = iwl4965_get_free_frame(priv);
  1341. if (!frame) {
  1342. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1343. "command.\n");
  1344. return -ENOMEM;
  1345. }
  1346. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1347. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1348. 0xFF0);
  1349. if (rate == IWL_INVALID_RATE)
  1350. rate = IWL_RATE_6M_PLCP;
  1351. } else {
  1352. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1353. if (rate == IWL_INVALID_RATE)
  1354. rate = IWL_RATE_1M_PLCP;
  1355. }
  1356. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1357. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1358. &frame->u.cmd[0]);
  1359. iwl4965_free_frame(priv, frame);
  1360. return rc;
  1361. }
  1362. /******************************************************************************
  1363. *
  1364. * EEPROM related functions
  1365. *
  1366. ******************************************************************************/
  1367. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1368. {
  1369. memcpy(mac, priv->eeprom.mac_address, 6);
  1370. }
  1371. /**
  1372. * iwl4965_eeprom_init - read EEPROM contents
  1373. *
  1374. * Load the EEPROM contents from adapter into priv->eeprom
  1375. *
  1376. * NOTE: This routine uses the non-debug IO access functions.
  1377. */
  1378. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1379. {
  1380. __le16 *e = (__le16 *)&priv->eeprom;
  1381. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1382. u32 r;
  1383. int sz = sizeof(priv->eeprom);
  1384. int rc;
  1385. int i;
  1386. u16 addr;
  1387. /* The EEPROM structure has several padding buffers within it
  1388. * and when adding new EEPROM maps is subject to programmer errors
  1389. * which may be very difficult to identify without explicitly
  1390. * checking the resulting size of the eeprom map. */
  1391. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1392. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1393. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1394. return -ENOENT;
  1395. }
  1396. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1397. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1398. if (rc < 0) {
  1399. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1400. return -ENOENT;
  1401. }
  1402. /* eeprom is an array of 16bit values */
  1403. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1404. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1405. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1406. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1407. i += IWL_EEPROM_ACCESS_DELAY) {
  1408. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1409. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1410. break;
  1411. udelay(IWL_EEPROM_ACCESS_DELAY);
  1412. }
  1413. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1414. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1415. rc = -ETIMEDOUT;
  1416. goto done;
  1417. }
  1418. e[addr / 2] = cpu_to_le16(r >> 16);
  1419. }
  1420. rc = 0;
  1421. done:
  1422. iwl4965_eeprom_release_semaphore(priv);
  1423. return rc;
  1424. }
  1425. /******************************************************************************
  1426. *
  1427. * Misc. internal state and helper functions
  1428. *
  1429. ******************************************************************************/
  1430. #ifdef CONFIG_IWL4965_DEBUG
  1431. /**
  1432. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1433. *
  1434. * You may hack this function to show different aspects of received frames,
  1435. * including selective frame dumps.
  1436. * group100 parameter selects whether to show 1 out of 100 good frames.
  1437. *
  1438. * TODO: This was originally written for 3945, need to audit for
  1439. * proper operation with 4965.
  1440. */
  1441. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1442. struct iwl4965_rx_packet *pkt,
  1443. struct ieee80211_hdr *header, int group100)
  1444. {
  1445. u32 to_us;
  1446. u32 print_summary = 0;
  1447. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1448. u32 hundred = 0;
  1449. u32 dataframe = 0;
  1450. u16 fc;
  1451. u16 seq_ctl;
  1452. u16 channel;
  1453. u16 phy_flags;
  1454. int rate_sym;
  1455. u16 length;
  1456. u16 status;
  1457. u16 bcn_tmr;
  1458. u32 tsf_low;
  1459. u64 tsf;
  1460. u8 rssi;
  1461. u8 agc;
  1462. u16 sig_avg;
  1463. u16 noise_diff;
  1464. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1465. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1466. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1467. u8 *data = IWL_RX_DATA(pkt);
  1468. /* MAC header */
  1469. fc = le16_to_cpu(header->frame_control);
  1470. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1471. /* metadata */
  1472. channel = le16_to_cpu(rx_hdr->channel);
  1473. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1474. rate_sym = rx_hdr->rate;
  1475. length = le16_to_cpu(rx_hdr->len);
  1476. /* end-of-frame status and timestamp */
  1477. status = le32_to_cpu(rx_end->status);
  1478. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1479. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1480. tsf = le64_to_cpu(rx_end->timestamp);
  1481. /* signal statistics */
  1482. rssi = rx_stats->rssi;
  1483. agc = rx_stats->agc;
  1484. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1485. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1486. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1487. /* if data frame is to us and all is good,
  1488. * (optionally) print summary for only 1 out of every 100 */
  1489. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1490. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1491. dataframe = 1;
  1492. if (!group100)
  1493. print_summary = 1; /* print each frame */
  1494. else if (priv->framecnt_to_us < 100) {
  1495. priv->framecnt_to_us++;
  1496. print_summary = 0;
  1497. } else {
  1498. priv->framecnt_to_us = 0;
  1499. print_summary = 1;
  1500. hundred = 1;
  1501. }
  1502. } else {
  1503. /* print summary for all other frames */
  1504. print_summary = 1;
  1505. }
  1506. if (print_summary) {
  1507. char *title;
  1508. u32 rate;
  1509. if (hundred)
  1510. title = "100Frames";
  1511. else if (fc & IEEE80211_FCTL_RETRY)
  1512. title = "Retry";
  1513. else if (ieee80211_is_assoc_response(fc))
  1514. title = "AscRsp";
  1515. else if (ieee80211_is_reassoc_response(fc))
  1516. title = "RasRsp";
  1517. else if (ieee80211_is_probe_response(fc)) {
  1518. title = "PrbRsp";
  1519. print_dump = 1; /* dump frame contents */
  1520. } else if (ieee80211_is_beacon(fc)) {
  1521. title = "Beacon";
  1522. print_dump = 1; /* dump frame contents */
  1523. } else if (ieee80211_is_atim(fc))
  1524. title = "ATIM";
  1525. else if (ieee80211_is_auth(fc))
  1526. title = "Auth";
  1527. else if (ieee80211_is_deauth(fc))
  1528. title = "DeAuth";
  1529. else if (ieee80211_is_disassoc(fc))
  1530. title = "DisAssoc";
  1531. else
  1532. title = "Frame";
  1533. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1534. if (rate == -1)
  1535. rate = 0;
  1536. else
  1537. rate = iwl4965_rates[rate].ieee / 2;
  1538. /* print frame summary.
  1539. * MAC addresses show just the last byte (for brevity),
  1540. * but you can hack it to show more, if you'd like to. */
  1541. if (dataframe)
  1542. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1543. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1544. title, fc, header->addr1[5],
  1545. length, rssi, channel, rate);
  1546. else {
  1547. /* src/dst addresses assume managed mode */
  1548. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1549. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1550. "phy=0x%02x, chnl=%d\n",
  1551. title, fc, header->addr1[5],
  1552. header->addr3[5], rssi,
  1553. tsf_low - priv->scan_start_tsf,
  1554. phy_flags, channel);
  1555. }
  1556. }
  1557. if (print_dump)
  1558. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1559. }
  1560. #endif
  1561. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1562. {
  1563. if (priv->hw_setting.shared_virt)
  1564. pci_free_consistent(priv->pci_dev,
  1565. sizeof(struct iwl4965_shared),
  1566. priv->hw_setting.shared_virt,
  1567. priv->hw_setting.shared_phys);
  1568. }
  1569. /**
  1570. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1571. *
  1572. * return : set the bit for each supported rate insert in ie
  1573. */
  1574. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1575. u16 basic_rate, int *left)
  1576. {
  1577. u16 ret_rates = 0, bit;
  1578. int i;
  1579. u8 *cnt = ie;
  1580. u8 *rates = ie + 1;
  1581. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1582. if (bit & supported_rate) {
  1583. ret_rates |= bit;
  1584. rates[*cnt] = iwl4965_rates[i].ieee |
  1585. ((bit & basic_rate) ? 0x80 : 0x00);
  1586. (*cnt)++;
  1587. (*left)--;
  1588. if ((*left <= 0) ||
  1589. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1590. break;
  1591. }
  1592. }
  1593. return ret_rates;
  1594. }
  1595. #ifdef CONFIG_IWL4965_HT
  1596. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1597. struct ieee80211_ht_cap *ht_cap,
  1598. u8 use_current_config);
  1599. #endif
  1600. /**
  1601. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1602. */
  1603. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1604. struct ieee80211_mgmt *frame,
  1605. int left, int is_direct)
  1606. {
  1607. int len = 0;
  1608. u8 *pos = NULL;
  1609. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1610. #ifdef CONFIG_IWL4965_HT
  1611. struct ieee80211_hw_mode *mode;
  1612. #endif /* CONFIG_IWL4965_HT */
  1613. /* Make sure there is enough space for the probe request,
  1614. * two mandatory IEs and the data */
  1615. left -= 24;
  1616. if (left < 0)
  1617. return 0;
  1618. len += 24;
  1619. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1620. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1621. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1622. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1623. frame->seq_ctrl = 0;
  1624. /* fill in our indirect SSID IE */
  1625. /* ...next IE... */
  1626. left -= 2;
  1627. if (left < 0)
  1628. return 0;
  1629. len += 2;
  1630. pos = &(frame->u.probe_req.variable[0]);
  1631. *pos++ = WLAN_EID_SSID;
  1632. *pos++ = 0;
  1633. /* fill in our direct SSID IE... */
  1634. if (is_direct) {
  1635. /* ...next IE... */
  1636. left -= 2 + priv->essid_len;
  1637. if (left < 0)
  1638. return 0;
  1639. /* ... fill it in... */
  1640. *pos++ = WLAN_EID_SSID;
  1641. *pos++ = priv->essid_len;
  1642. memcpy(pos, priv->essid, priv->essid_len);
  1643. pos += priv->essid_len;
  1644. len += 2 + priv->essid_len;
  1645. }
  1646. /* fill in supported rate */
  1647. /* ...next IE... */
  1648. left -= 2;
  1649. if (left < 0)
  1650. return 0;
  1651. /* ... fill it in... */
  1652. *pos++ = WLAN_EID_SUPP_RATES;
  1653. *pos = 0;
  1654. /* exclude 60M rate */
  1655. active_rates = priv->rates_mask;
  1656. active_rates &= ~IWL_RATE_60M_MASK;
  1657. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1658. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1659. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1660. active_rate_basic, &left);
  1661. active_rates &= ~ret_rates;
  1662. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1663. active_rate_basic, &left);
  1664. active_rates &= ~ret_rates;
  1665. len += 2 + *pos;
  1666. pos += (*pos) + 1;
  1667. if (active_rates == 0)
  1668. goto fill_end;
  1669. /* fill in supported extended rate */
  1670. /* ...next IE... */
  1671. left -= 2;
  1672. if (left < 0)
  1673. return 0;
  1674. /* ... fill it in... */
  1675. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1676. *pos = 0;
  1677. iwl4965_supported_rate_to_ie(pos, active_rates,
  1678. active_rate_basic, &left);
  1679. if (*pos > 0)
  1680. len += 2 + *pos;
  1681. #ifdef CONFIG_IWL4965_HT
  1682. mode = priv->hw->conf.mode;
  1683. if (mode->ht_info.ht_supported) {
  1684. pos += (*pos) + 1;
  1685. *pos++ = WLAN_EID_HT_CAPABILITY;
  1686. *pos++ = sizeof(struct ieee80211_ht_cap);
  1687. iwl4965_set_ht_capab(priv->hw,
  1688. (struct ieee80211_ht_cap *)pos, 0);
  1689. len += 2 + sizeof(struct ieee80211_ht_cap);
  1690. }
  1691. #endif /*CONFIG_IWL4965_HT */
  1692. fill_end:
  1693. return (u16)len;
  1694. }
  1695. /*
  1696. * QoS support
  1697. */
  1698. #ifdef CONFIG_IWL4965_QOS
  1699. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1700. struct iwl4965_qosparam_cmd *qos)
  1701. {
  1702. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1703. sizeof(struct iwl4965_qosparam_cmd), qos);
  1704. }
  1705. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1706. {
  1707. u16 cw_min = 15;
  1708. u16 cw_max = 1023;
  1709. u8 aifs = 2;
  1710. u8 is_legacy = 0;
  1711. unsigned long flags;
  1712. int i;
  1713. spin_lock_irqsave(&priv->lock, flags);
  1714. priv->qos_data.qos_active = 0;
  1715. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1716. if (priv->qos_data.qos_enable)
  1717. priv->qos_data.qos_active = 1;
  1718. if (!(priv->active_rate & 0xfff0)) {
  1719. cw_min = 31;
  1720. is_legacy = 1;
  1721. }
  1722. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1723. if (priv->qos_data.qos_enable)
  1724. priv->qos_data.qos_active = 1;
  1725. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1726. cw_min = 31;
  1727. is_legacy = 1;
  1728. }
  1729. if (priv->qos_data.qos_active)
  1730. aifs = 3;
  1731. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1732. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1733. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1734. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1735. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1736. if (priv->qos_data.qos_active) {
  1737. i = 1;
  1738. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1739. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1740. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1741. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1742. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1743. i = 2;
  1744. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1745. cpu_to_le16((cw_min + 1) / 2 - 1);
  1746. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1747. cpu_to_le16(cw_max);
  1748. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1749. if (is_legacy)
  1750. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1751. cpu_to_le16(6016);
  1752. else
  1753. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1754. cpu_to_le16(3008);
  1755. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1756. i = 3;
  1757. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1758. cpu_to_le16((cw_min + 1) / 4 - 1);
  1759. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1760. cpu_to_le16((cw_max + 1) / 2 - 1);
  1761. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1762. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1763. if (is_legacy)
  1764. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1765. cpu_to_le16(3264);
  1766. else
  1767. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1768. cpu_to_le16(1504);
  1769. } else {
  1770. for (i = 1; i < 4; i++) {
  1771. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1772. cpu_to_le16(cw_min);
  1773. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1774. cpu_to_le16(cw_max);
  1775. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1776. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1777. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1778. }
  1779. }
  1780. IWL_DEBUG_QOS("set QoS to default \n");
  1781. spin_unlock_irqrestore(&priv->lock, flags);
  1782. }
  1783. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1784. {
  1785. unsigned long flags;
  1786. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1787. return;
  1788. if (!priv->qos_data.qos_enable)
  1789. return;
  1790. spin_lock_irqsave(&priv->lock, flags);
  1791. priv->qos_data.def_qos_parm.qos_flags = 0;
  1792. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1793. !priv->qos_data.qos_cap.q_AP.txop_request)
  1794. priv->qos_data.def_qos_parm.qos_flags |=
  1795. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1796. if (priv->qos_data.qos_active)
  1797. priv->qos_data.def_qos_parm.qos_flags |=
  1798. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1799. #ifdef CONFIG_IWL4965_HT
  1800. if (priv->current_ht_config.is_ht)
  1801. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1802. #endif /* CONFIG_IWL4965_HT */
  1803. spin_unlock_irqrestore(&priv->lock, flags);
  1804. if (force || iwl4965_is_associated(priv)) {
  1805. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1806. priv->qos_data.qos_active,
  1807. priv->qos_data.def_qos_parm.qos_flags);
  1808. iwl4965_send_qos_params_command(priv,
  1809. &(priv->qos_data.def_qos_parm));
  1810. }
  1811. }
  1812. #endif /* CONFIG_IWL4965_QOS */
  1813. /*
  1814. * Power management (not Tx power!) functions
  1815. */
  1816. #define MSEC_TO_USEC 1024
  1817. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1818. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1819. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1820. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1821. __constant_cpu_to_le32(X1), \
  1822. __constant_cpu_to_le32(X2), \
  1823. __constant_cpu_to_le32(X3), \
  1824. __constant_cpu_to_le32(X4)}
  1825. /* default power management (not Tx power) table values */
  1826. /* for tim 0-10 */
  1827. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1828. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1829. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1830. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1831. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1832. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1833. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1834. };
  1835. /* for tim > 10 */
  1836. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1837. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1838. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1839. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1840. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1841. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1842. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1843. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1844. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1845. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1846. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1847. };
  1848. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1849. {
  1850. int rc = 0, i;
  1851. struct iwl4965_power_mgr *pow_data;
  1852. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1853. u16 pci_pm;
  1854. IWL_DEBUG_POWER("Initialize power \n");
  1855. pow_data = &(priv->power_data);
  1856. memset(pow_data, 0, sizeof(*pow_data));
  1857. pow_data->active_index = IWL_POWER_RANGE_0;
  1858. pow_data->dtim_val = 0xffff;
  1859. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1860. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1861. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1862. if (rc != 0)
  1863. return 0;
  1864. else {
  1865. struct iwl4965_powertable_cmd *cmd;
  1866. IWL_DEBUG_POWER("adjust power command flags\n");
  1867. for (i = 0; i < IWL_POWER_AC; i++) {
  1868. cmd = &pow_data->pwr_range_0[i].cmd;
  1869. if (pci_pm & 0x1)
  1870. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1871. else
  1872. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1873. }
  1874. }
  1875. return rc;
  1876. }
  1877. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1878. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1879. {
  1880. int rc = 0, i;
  1881. u8 skip;
  1882. u32 max_sleep = 0;
  1883. struct iwl4965_power_vec_entry *range;
  1884. u8 period = 0;
  1885. struct iwl4965_power_mgr *pow_data;
  1886. if (mode > IWL_POWER_INDEX_5) {
  1887. IWL_DEBUG_POWER("Error invalid power mode \n");
  1888. return -1;
  1889. }
  1890. pow_data = &(priv->power_data);
  1891. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1892. range = &pow_data->pwr_range_0[0];
  1893. else
  1894. range = &pow_data->pwr_range_1[1];
  1895. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1896. #ifdef IWL_MAC80211_DISABLE
  1897. if (priv->assoc_network != NULL) {
  1898. unsigned long flags;
  1899. period = priv->assoc_network->tim.tim_period;
  1900. }
  1901. #endif /*IWL_MAC80211_DISABLE */
  1902. skip = range[mode].no_dtim;
  1903. if (period == 0) {
  1904. period = 1;
  1905. skip = 0;
  1906. }
  1907. if (skip == 0) {
  1908. max_sleep = period;
  1909. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1910. } else {
  1911. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1912. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1913. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1914. }
  1915. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1916. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1917. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1918. }
  1919. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1920. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1921. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1922. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1923. le32_to_cpu(cmd->sleep_interval[0]),
  1924. le32_to_cpu(cmd->sleep_interval[1]),
  1925. le32_to_cpu(cmd->sleep_interval[2]),
  1926. le32_to_cpu(cmd->sleep_interval[3]),
  1927. le32_to_cpu(cmd->sleep_interval[4]));
  1928. return rc;
  1929. }
  1930. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1931. {
  1932. u32 uninitialized_var(final_mode);
  1933. int rc;
  1934. struct iwl4965_powertable_cmd cmd;
  1935. /* If on battery, set to 3,
  1936. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1937. * else user level */
  1938. switch (mode) {
  1939. case IWL_POWER_BATTERY:
  1940. final_mode = IWL_POWER_INDEX_3;
  1941. break;
  1942. case IWL_POWER_AC:
  1943. final_mode = IWL_POWER_MODE_CAM;
  1944. break;
  1945. default:
  1946. final_mode = mode;
  1947. break;
  1948. }
  1949. cmd.keep_alive_beacons = 0;
  1950. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1951. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1952. if (final_mode == IWL_POWER_MODE_CAM)
  1953. clear_bit(STATUS_POWER_PMI, &priv->status);
  1954. else
  1955. set_bit(STATUS_POWER_PMI, &priv->status);
  1956. return rc;
  1957. }
  1958. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1959. {
  1960. /* Filter incoming packets to determine if they are targeted toward
  1961. * this network, discarding packets coming from ourselves */
  1962. switch (priv->iw_mode) {
  1963. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1964. /* packets from our adapter are dropped (echo) */
  1965. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1966. return 0;
  1967. /* {broad,multi}cast packets to our IBSS go through */
  1968. if (is_multicast_ether_addr(header->addr1))
  1969. return !compare_ether_addr(header->addr3, priv->bssid);
  1970. /* packets to our adapter go through */
  1971. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1972. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1973. /* packets from our adapter are dropped (echo) */
  1974. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1975. return 0;
  1976. /* {broad,multi}cast packets to our BSS go through */
  1977. if (is_multicast_ether_addr(header->addr1))
  1978. return !compare_ether_addr(header->addr2, priv->bssid);
  1979. /* packets to our adapter go through */
  1980. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1981. }
  1982. return 1;
  1983. }
  1984. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1985. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1986. {
  1987. switch (status & TX_STATUS_MSK) {
  1988. case TX_STATUS_SUCCESS:
  1989. return "SUCCESS";
  1990. TX_STATUS_ENTRY(SHORT_LIMIT);
  1991. TX_STATUS_ENTRY(LONG_LIMIT);
  1992. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1993. TX_STATUS_ENTRY(MGMNT_ABORT);
  1994. TX_STATUS_ENTRY(NEXT_FRAG);
  1995. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1996. TX_STATUS_ENTRY(DEST_PS);
  1997. TX_STATUS_ENTRY(ABORTED);
  1998. TX_STATUS_ENTRY(BT_RETRY);
  1999. TX_STATUS_ENTRY(STA_INVALID);
  2000. TX_STATUS_ENTRY(FRAG_DROPPED);
  2001. TX_STATUS_ENTRY(TID_DISABLE);
  2002. TX_STATUS_ENTRY(FRAME_FLUSHED);
  2003. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  2004. TX_STATUS_ENTRY(TX_LOCKED);
  2005. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  2006. }
  2007. return "UNKNOWN";
  2008. }
  2009. /**
  2010. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  2011. *
  2012. * NOTE: priv->mutex is not required before calling this function
  2013. */
  2014. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2015. {
  2016. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2017. clear_bit(STATUS_SCANNING, &priv->status);
  2018. return 0;
  2019. }
  2020. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2021. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2022. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2023. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2024. queue_work(priv->workqueue, &priv->abort_scan);
  2025. } else
  2026. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2027. return test_bit(STATUS_SCANNING, &priv->status);
  2028. }
  2029. return 0;
  2030. }
  2031. /**
  2032. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2033. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2034. *
  2035. * NOTE: priv->mutex must be held before calling this function
  2036. */
  2037. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2038. {
  2039. unsigned long now = jiffies;
  2040. int ret;
  2041. ret = iwl4965_scan_cancel(priv);
  2042. if (ret && ms) {
  2043. mutex_unlock(&priv->mutex);
  2044. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2045. test_bit(STATUS_SCANNING, &priv->status))
  2046. msleep(1);
  2047. mutex_lock(&priv->mutex);
  2048. return test_bit(STATUS_SCANNING, &priv->status);
  2049. }
  2050. return ret;
  2051. }
  2052. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2053. {
  2054. /* Reset ieee stats */
  2055. /* We don't reset the net_device_stats (ieee->stats) on
  2056. * re-association */
  2057. priv->last_seq_num = -1;
  2058. priv->last_frag_num = -1;
  2059. priv->last_packet_time = 0;
  2060. iwl4965_scan_cancel(priv);
  2061. }
  2062. #define MAX_UCODE_BEACON_INTERVAL 4096
  2063. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2064. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2065. {
  2066. u16 new_val = 0;
  2067. u16 beacon_factor = 0;
  2068. beacon_factor =
  2069. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2070. / MAX_UCODE_BEACON_INTERVAL;
  2071. new_val = beacon_val / beacon_factor;
  2072. return cpu_to_le16(new_val);
  2073. }
  2074. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2075. {
  2076. u64 interval_tm_unit;
  2077. u64 tsf, result;
  2078. unsigned long flags;
  2079. struct ieee80211_conf *conf = NULL;
  2080. u16 beacon_int = 0;
  2081. conf = ieee80211_get_hw_conf(priv->hw);
  2082. spin_lock_irqsave(&priv->lock, flags);
  2083. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2084. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2085. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2086. tsf = priv->timestamp1;
  2087. tsf = ((tsf << 32) | priv->timestamp0);
  2088. beacon_int = priv->beacon_int;
  2089. spin_unlock_irqrestore(&priv->lock, flags);
  2090. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2091. if (beacon_int == 0) {
  2092. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2093. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2094. } else {
  2095. priv->rxon_timing.beacon_interval =
  2096. cpu_to_le16(beacon_int);
  2097. priv->rxon_timing.beacon_interval =
  2098. iwl4965_adjust_beacon_interval(
  2099. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2100. }
  2101. priv->rxon_timing.atim_window = 0;
  2102. } else {
  2103. priv->rxon_timing.beacon_interval =
  2104. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2105. /* TODO: we need to get atim_window from upper stack
  2106. * for now we set to 0 */
  2107. priv->rxon_timing.atim_window = 0;
  2108. }
  2109. interval_tm_unit =
  2110. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2111. result = do_div(tsf, interval_tm_unit);
  2112. priv->rxon_timing.beacon_init_val =
  2113. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2114. IWL_DEBUG_ASSOC
  2115. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2116. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2117. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2118. le16_to_cpu(priv->rxon_timing.atim_window));
  2119. }
  2120. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2121. {
  2122. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2123. IWL_ERROR("APs don't scan.\n");
  2124. return 0;
  2125. }
  2126. if (!iwl4965_is_ready_rf(priv)) {
  2127. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2128. return -EIO;
  2129. }
  2130. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2131. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2132. return -EAGAIN;
  2133. }
  2134. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2135. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2136. "Queuing.\n");
  2137. return -EAGAIN;
  2138. }
  2139. IWL_DEBUG_INFO("Starting scan...\n");
  2140. priv->scan_bands = 2;
  2141. set_bit(STATUS_SCANNING, &priv->status);
  2142. priv->scan_start = jiffies;
  2143. priv->scan_pass_start = priv->scan_start;
  2144. queue_work(priv->workqueue, &priv->request_scan);
  2145. return 0;
  2146. }
  2147. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2148. {
  2149. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2150. if (hw_decrypt)
  2151. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2152. else
  2153. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2154. return 0;
  2155. }
  2156. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2157. {
  2158. if (phymode == MODE_IEEE80211A) {
  2159. priv->staging_rxon.flags &=
  2160. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2161. | RXON_FLG_CCK_MSK);
  2162. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2163. } else {
  2164. /* Copied from iwl4965_bg_post_associate() */
  2165. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2166. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2167. else
  2168. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2169. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2170. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2171. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2172. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2173. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2174. }
  2175. }
  2176. /*
  2177. * initialize rxon structure with default values from eeprom
  2178. */
  2179. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2180. {
  2181. const struct iwl4965_channel_info *ch_info;
  2182. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2183. switch (priv->iw_mode) {
  2184. case IEEE80211_IF_TYPE_AP:
  2185. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2186. break;
  2187. case IEEE80211_IF_TYPE_STA:
  2188. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2189. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2190. break;
  2191. case IEEE80211_IF_TYPE_IBSS:
  2192. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2193. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2194. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2195. RXON_FILTER_ACCEPT_GRP_MSK;
  2196. break;
  2197. case IEEE80211_IF_TYPE_MNTR:
  2198. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2199. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2200. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2201. break;
  2202. }
  2203. #if 0
  2204. /* TODO: Figure out when short_preamble would be set and cache from
  2205. * that */
  2206. if (!hw_to_local(priv->hw)->short_preamble)
  2207. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2208. else
  2209. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2210. #endif
  2211. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2212. le16_to_cpu(priv->staging_rxon.channel));
  2213. if (!ch_info)
  2214. ch_info = &priv->channel_info[0];
  2215. /*
  2216. * in some case A channels are all non IBSS
  2217. * in this case force B/G channel
  2218. */
  2219. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2220. !(is_channel_ibss(ch_info)))
  2221. ch_info = &priv->channel_info[0];
  2222. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2223. if (is_channel_a_band(ch_info))
  2224. priv->phymode = MODE_IEEE80211A;
  2225. else
  2226. priv->phymode = MODE_IEEE80211G;
  2227. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2228. priv->staging_rxon.ofdm_basic_rates =
  2229. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2230. priv->staging_rxon.cck_basic_rates =
  2231. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2232. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2233. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2234. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2235. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2236. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2237. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2238. iwl4965_set_rxon_chain(priv);
  2239. }
  2240. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2241. {
  2242. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2243. const struct iwl4965_channel_info *ch_info;
  2244. ch_info = iwl4965_get_channel_info(priv,
  2245. priv->phymode,
  2246. le16_to_cpu(priv->staging_rxon.channel));
  2247. if (!ch_info || !is_channel_ibss(ch_info)) {
  2248. IWL_ERROR("channel %d not IBSS channel\n",
  2249. le16_to_cpu(priv->staging_rxon.channel));
  2250. return -EINVAL;
  2251. }
  2252. }
  2253. priv->iw_mode = mode;
  2254. iwl4965_connection_init_rx_config(priv);
  2255. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2256. iwl4965_clear_stations_table(priv);
  2257. /* dont commit rxon if rf-kill is on*/
  2258. if (!iwl4965_is_ready_rf(priv))
  2259. return -EAGAIN;
  2260. cancel_delayed_work(&priv->scan_check);
  2261. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2262. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2263. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2264. return -EAGAIN;
  2265. }
  2266. iwl4965_commit_rxon(priv);
  2267. return 0;
  2268. }
  2269. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2270. struct ieee80211_tx_control *ctl,
  2271. struct iwl4965_cmd *cmd,
  2272. struct sk_buff *skb_frag,
  2273. int last_frag)
  2274. {
  2275. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2276. switch (keyinfo->alg) {
  2277. case ALG_CCMP:
  2278. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2279. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2280. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2281. break;
  2282. case ALG_TKIP:
  2283. #if 0
  2284. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2285. if (last_frag)
  2286. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2287. 8);
  2288. else
  2289. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2290. #endif
  2291. break;
  2292. case ALG_WEP:
  2293. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2294. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2295. if (keyinfo->keylen == 13)
  2296. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2297. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2298. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2299. "with key %d\n", ctl->key_idx);
  2300. break;
  2301. default:
  2302. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2303. break;
  2304. }
  2305. }
  2306. /*
  2307. * handle build REPLY_TX command notification.
  2308. */
  2309. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2310. struct iwl4965_cmd *cmd,
  2311. struct ieee80211_tx_control *ctrl,
  2312. struct ieee80211_hdr *hdr,
  2313. int is_unicast, u8 std_id)
  2314. {
  2315. __le16 *qc;
  2316. u16 fc = le16_to_cpu(hdr->frame_control);
  2317. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2318. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2319. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2320. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2321. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2322. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2323. if (ieee80211_is_probe_response(fc) &&
  2324. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2325. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2326. } else {
  2327. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2328. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2329. }
  2330. if (ieee80211_is_back_request(fc))
  2331. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2332. cmd->cmd.tx.sta_id = std_id;
  2333. if (ieee80211_get_morefrag(hdr))
  2334. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2335. qc = ieee80211_get_qos_ctrl(hdr);
  2336. if (qc) {
  2337. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2338. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2339. } else
  2340. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2341. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2342. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2343. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2344. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2345. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2346. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2347. }
  2348. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2349. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2350. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2351. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2352. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2353. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2354. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2355. else
  2356. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2357. } else
  2358. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2359. cmd->cmd.tx.driver_txop = 0;
  2360. cmd->cmd.tx.tx_flags = tx_flags;
  2361. cmd->cmd.tx.next_frame_len = 0;
  2362. }
  2363. /**
  2364. * iwl4965_get_sta_id - Find station's index within station table
  2365. *
  2366. * If new IBSS station, create new entry in station table
  2367. */
  2368. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2369. struct ieee80211_hdr *hdr)
  2370. {
  2371. int sta_id;
  2372. u16 fc = le16_to_cpu(hdr->frame_control);
  2373. DECLARE_MAC_BUF(mac);
  2374. /* If this frame is broadcast or management, use broadcast station id */
  2375. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2376. is_multicast_ether_addr(hdr->addr1))
  2377. return priv->hw_setting.bcast_sta_id;
  2378. switch (priv->iw_mode) {
  2379. /* If we are a client station in a BSS network, use the special
  2380. * AP station entry (that's the only station we communicate with) */
  2381. case IEEE80211_IF_TYPE_STA:
  2382. return IWL_AP_ID;
  2383. /* If we are an AP, then find the station, or use BCAST */
  2384. case IEEE80211_IF_TYPE_AP:
  2385. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2386. if (sta_id != IWL_INVALID_STATION)
  2387. return sta_id;
  2388. return priv->hw_setting.bcast_sta_id;
  2389. /* If this frame is going out to an IBSS network, find the station,
  2390. * or create a new station table entry */
  2391. case IEEE80211_IF_TYPE_IBSS:
  2392. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2393. if (sta_id != IWL_INVALID_STATION)
  2394. return sta_id;
  2395. /* Create new station table entry */
  2396. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2397. 0, CMD_ASYNC, NULL);
  2398. if (sta_id != IWL_INVALID_STATION)
  2399. return sta_id;
  2400. IWL_DEBUG_DROP("Station %s not in station map. "
  2401. "Defaulting to broadcast...\n",
  2402. print_mac(mac, hdr->addr1));
  2403. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2404. return priv->hw_setting.bcast_sta_id;
  2405. default:
  2406. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2407. return priv->hw_setting.bcast_sta_id;
  2408. }
  2409. }
  2410. /*
  2411. * start REPLY_TX command process
  2412. */
  2413. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2414. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2415. {
  2416. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2417. struct iwl4965_tfd_frame *tfd;
  2418. u32 *control_flags;
  2419. int txq_id = ctl->queue;
  2420. struct iwl4965_tx_queue *txq = NULL;
  2421. struct iwl4965_queue *q = NULL;
  2422. dma_addr_t phys_addr;
  2423. dma_addr_t txcmd_phys;
  2424. dma_addr_t scratch_phys;
  2425. struct iwl4965_cmd *out_cmd = NULL;
  2426. u16 len, idx, len_org;
  2427. u8 id, hdr_len, unicast;
  2428. u8 sta_id;
  2429. u16 seq_number = 0;
  2430. u16 fc;
  2431. __le16 *qc;
  2432. u8 wait_write_ptr = 0;
  2433. unsigned long flags;
  2434. int rc;
  2435. spin_lock_irqsave(&priv->lock, flags);
  2436. if (iwl4965_is_rfkill(priv)) {
  2437. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2438. goto drop_unlock;
  2439. }
  2440. if (!priv->vif) {
  2441. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2442. goto drop_unlock;
  2443. }
  2444. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2445. IWL_ERROR("ERROR: No TX rate available.\n");
  2446. goto drop_unlock;
  2447. }
  2448. unicast = !is_multicast_ether_addr(hdr->addr1);
  2449. id = 0;
  2450. fc = le16_to_cpu(hdr->frame_control);
  2451. #ifdef CONFIG_IWL4965_DEBUG
  2452. if (ieee80211_is_auth(fc))
  2453. IWL_DEBUG_TX("Sending AUTH frame\n");
  2454. else if (ieee80211_is_assoc_request(fc))
  2455. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2456. else if (ieee80211_is_reassoc_request(fc))
  2457. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2458. #endif
  2459. /* drop all data frame if we are not associated */
  2460. if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
  2461. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2462. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2463. goto drop_unlock;
  2464. }
  2465. spin_unlock_irqrestore(&priv->lock, flags);
  2466. hdr_len = ieee80211_get_hdrlen(fc);
  2467. /* Find (or create) index into station table for destination station */
  2468. sta_id = iwl4965_get_sta_id(priv, hdr);
  2469. if (sta_id == IWL_INVALID_STATION) {
  2470. DECLARE_MAC_BUF(mac);
  2471. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2472. print_mac(mac, hdr->addr1));
  2473. goto drop;
  2474. }
  2475. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2476. qc = ieee80211_get_qos_ctrl(hdr);
  2477. if (qc) {
  2478. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2479. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2480. IEEE80211_SCTL_SEQ;
  2481. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2482. (hdr->seq_ctrl &
  2483. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2484. seq_number += 0x10;
  2485. #ifdef CONFIG_IWL4965_HT
  2486. #ifdef CONFIG_IWL4965_HT_AGG
  2487. /* aggregation is on for this <sta,tid> */
  2488. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2489. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2490. #endif /* CONFIG_IWL4965_HT_AGG */
  2491. #endif /* CONFIG_IWL4965_HT */
  2492. }
  2493. /* Descriptor for chosen Tx queue */
  2494. txq = &priv->txq[txq_id];
  2495. q = &txq->q;
  2496. spin_lock_irqsave(&priv->lock, flags);
  2497. /* Set up first empty TFD within this queue's circular TFD buffer */
  2498. tfd = &txq->bd[q->write_ptr];
  2499. memset(tfd, 0, sizeof(*tfd));
  2500. control_flags = (u32 *) tfd;
  2501. idx = get_cmd_index(q, q->write_ptr, 0);
  2502. /* Set up driver data for this TFD */
  2503. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2504. txq->txb[q->write_ptr].skb[0] = skb;
  2505. memcpy(&(txq->txb[q->write_ptr].status.control),
  2506. ctl, sizeof(struct ieee80211_tx_control));
  2507. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2508. out_cmd = &txq->cmd[idx];
  2509. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2510. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2511. /*
  2512. * Set up the Tx-command (not MAC!) header.
  2513. * Store the chosen Tx queue and TFD index within the sequence field;
  2514. * after Tx, uCode's Tx response will return this value so driver can
  2515. * locate the frame within the tx queue and do post-tx processing.
  2516. */
  2517. out_cmd->hdr.cmd = REPLY_TX;
  2518. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2519. INDEX_TO_SEQ(q->write_ptr)));
  2520. /* Copy MAC header from skb into command buffer */
  2521. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2522. /*
  2523. * Use the first empty entry in this queue's command buffer array
  2524. * to contain the Tx command and MAC header concatenated together
  2525. * (payload data will be in another buffer).
  2526. * Size of this varies, due to varying MAC header length.
  2527. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2528. * of the MAC header (device reads on dword boundaries).
  2529. * We'll tell device about this padding later.
  2530. */
  2531. len = priv->hw_setting.tx_cmd_len +
  2532. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2533. len_org = len;
  2534. len = (len + 3) & ~3;
  2535. if (len_org != len)
  2536. len_org = 1;
  2537. else
  2538. len_org = 0;
  2539. /* Physical address of this Tx command's header (not MAC header!),
  2540. * within command buffer array. */
  2541. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2542. offsetof(struct iwl4965_cmd, hdr);
  2543. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2544. * first entry */
  2545. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2546. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2547. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2548. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2549. * if any (802.11 null frames have no payload). */
  2550. len = skb->len - hdr_len;
  2551. if (len) {
  2552. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2553. len, PCI_DMA_TODEVICE);
  2554. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2555. }
  2556. /* Tell 4965 about any 2-byte padding after MAC header */
  2557. if (len_org)
  2558. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2559. /* Total # bytes to be transmitted */
  2560. len = (u16)skb->len;
  2561. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2562. /* TODO need this for burst mode later on */
  2563. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2564. /* set is_hcca to 0; it probably will never be implemented */
  2565. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2566. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2567. offsetof(struct iwl4965_tx_cmd, scratch);
  2568. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2569. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2570. #ifdef CONFIG_IWL4965_HT_AGG
  2571. #ifdef CONFIG_IWL4965_HT
  2572. /* TODO: move this functionality to rate scaling */
  2573. iwl4965_tl_get_stats(priv, hdr);
  2574. #endif /* CONFIG_IWL4965_HT_AGG */
  2575. #endif /*CONFIG_IWL4965_HT */
  2576. if (!ieee80211_get_morefrag(hdr)) {
  2577. txq->need_update = 1;
  2578. if (qc) {
  2579. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2580. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2581. }
  2582. } else {
  2583. wait_write_ptr = 1;
  2584. txq->need_update = 0;
  2585. }
  2586. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2587. sizeof(out_cmd->cmd.tx));
  2588. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2589. ieee80211_get_hdrlen(fc));
  2590. /* Set up entry for this TFD in Tx byte-count array */
  2591. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2592. /* Tell device the write index *just past* this latest filled TFD */
  2593. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2594. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2595. spin_unlock_irqrestore(&priv->lock, flags);
  2596. if (rc)
  2597. return rc;
  2598. if ((iwl4965_queue_space(q) < q->high_mark)
  2599. && priv->mac80211_registered) {
  2600. if (wait_write_ptr) {
  2601. spin_lock_irqsave(&priv->lock, flags);
  2602. txq->need_update = 1;
  2603. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2604. spin_unlock_irqrestore(&priv->lock, flags);
  2605. }
  2606. ieee80211_stop_queue(priv->hw, ctl->queue);
  2607. }
  2608. return 0;
  2609. drop_unlock:
  2610. spin_unlock_irqrestore(&priv->lock, flags);
  2611. drop:
  2612. return -1;
  2613. }
  2614. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2615. {
  2616. const struct ieee80211_hw_mode *hw = NULL;
  2617. struct ieee80211_rate *rate;
  2618. int i;
  2619. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2620. if (!hw) {
  2621. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2622. return;
  2623. }
  2624. priv->active_rate = 0;
  2625. priv->active_rate_basic = 0;
  2626. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2627. hw->mode == MODE_IEEE80211A ?
  2628. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2629. for (i = 0; i < hw->num_rates; i++) {
  2630. rate = &(hw->rates[i]);
  2631. if ((rate->val < IWL_RATE_COUNT) &&
  2632. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2633. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2634. rate->val, iwl4965_rates[rate->val].plcp,
  2635. (rate->flags & IEEE80211_RATE_BASIC) ?
  2636. "*" : "");
  2637. priv->active_rate |= (1 << rate->val);
  2638. if (rate->flags & IEEE80211_RATE_BASIC)
  2639. priv->active_rate_basic |= (1 << rate->val);
  2640. } else
  2641. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2642. rate->val, iwl4965_rates[rate->val].plcp);
  2643. }
  2644. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2645. priv->active_rate, priv->active_rate_basic);
  2646. /*
  2647. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2648. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2649. * OFDM
  2650. */
  2651. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2652. priv->staging_rxon.cck_basic_rates =
  2653. ((priv->active_rate_basic &
  2654. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2655. else
  2656. priv->staging_rxon.cck_basic_rates =
  2657. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2658. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2659. priv->staging_rxon.ofdm_basic_rates =
  2660. ((priv->active_rate_basic &
  2661. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2662. IWL_FIRST_OFDM_RATE) & 0xFF;
  2663. else
  2664. priv->staging_rxon.ofdm_basic_rates =
  2665. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2666. }
  2667. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2668. {
  2669. unsigned long flags;
  2670. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2671. return;
  2672. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2673. disable_radio ? "OFF" : "ON");
  2674. if (disable_radio) {
  2675. iwl4965_scan_cancel(priv);
  2676. /* FIXME: This is a workaround for AP */
  2677. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2678. spin_lock_irqsave(&priv->lock, flags);
  2679. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2680. CSR_UCODE_SW_BIT_RFKILL);
  2681. spin_unlock_irqrestore(&priv->lock, flags);
  2682. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2683. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2684. }
  2685. return;
  2686. }
  2687. spin_lock_irqsave(&priv->lock, flags);
  2688. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2689. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2690. spin_unlock_irqrestore(&priv->lock, flags);
  2691. /* wake up ucode */
  2692. msleep(10);
  2693. spin_lock_irqsave(&priv->lock, flags);
  2694. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2695. if (!iwl4965_grab_nic_access(priv))
  2696. iwl4965_release_nic_access(priv);
  2697. spin_unlock_irqrestore(&priv->lock, flags);
  2698. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2699. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2700. "disabled by HW switch\n");
  2701. return;
  2702. }
  2703. queue_work(priv->workqueue, &priv->restart);
  2704. return;
  2705. }
  2706. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2707. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2708. {
  2709. u16 fc =
  2710. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2711. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2712. return;
  2713. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2714. return;
  2715. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2716. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2717. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2718. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2719. RX_RES_STATUS_BAD_ICV_MIC)
  2720. stats->flag |= RX_FLAG_MMIC_ERROR;
  2721. case RX_RES_STATUS_SEC_TYPE_WEP:
  2722. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2723. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2724. RX_RES_STATUS_DECRYPT_OK) {
  2725. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2726. stats->flag |= RX_FLAG_DECRYPTED;
  2727. }
  2728. break;
  2729. default:
  2730. break;
  2731. }
  2732. }
  2733. #define IWL_PACKET_RETRY_TIME HZ
  2734. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2735. {
  2736. u16 sc = le16_to_cpu(header->seq_ctrl);
  2737. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2738. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2739. u16 *last_seq, *last_frag;
  2740. unsigned long *last_time;
  2741. switch (priv->iw_mode) {
  2742. case IEEE80211_IF_TYPE_IBSS:{
  2743. struct list_head *p;
  2744. struct iwl4965_ibss_seq *entry = NULL;
  2745. u8 *mac = header->addr2;
  2746. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2747. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2748. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2749. if (!compare_ether_addr(entry->mac, mac))
  2750. break;
  2751. }
  2752. if (p == &priv->ibss_mac_hash[index]) {
  2753. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2754. if (!entry) {
  2755. IWL_ERROR("Cannot malloc new mac entry\n");
  2756. return 0;
  2757. }
  2758. memcpy(entry->mac, mac, ETH_ALEN);
  2759. entry->seq_num = seq;
  2760. entry->frag_num = frag;
  2761. entry->packet_time = jiffies;
  2762. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2763. return 0;
  2764. }
  2765. last_seq = &entry->seq_num;
  2766. last_frag = &entry->frag_num;
  2767. last_time = &entry->packet_time;
  2768. break;
  2769. }
  2770. case IEEE80211_IF_TYPE_STA:
  2771. last_seq = &priv->last_seq_num;
  2772. last_frag = &priv->last_frag_num;
  2773. last_time = &priv->last_packet_time;
  2774. break;
  2775. default:
  2776. return 0;
  2777. }
  2778. if ((*last_seq == seq) &&
  2779. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2780. if (*last_frag == frag)
  2781. goto drop;
  2782. if (*last_frag + 1 != frag)
  2783. /* out-of-order fragment */
  2784. goto drop;
  2785. } else
  2786. *last_seq = seq;
  2787. *last_frag = frag;
  2788. *last_time = jiffies;
  2789. return 0;
  2790. drop:
  2791. return 1;
  2792. }
  2793. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2794. #include "iwl-spectrum.h"
  2795. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2796. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2797. #define TIME_UNIT 1024
  2798. /*
  2799. * extended beacon time format
  2800. * time in usec will be changed into a 32-bit value in 8:24 format
  2801. * the high 1 byte is the beacon counts
  2802. * the lower 3 bytes is the time in usec within one beacon interval
  2803. */
  2804. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2805. {
  2806. u32 quot;
  2807. u32 rem;
  2808. u32 interval = beacon_interval * 1024;
  2809. if (!interval || !usec)
  2810. return 0;
  2811. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2812. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2813. return (quot << 24) + rem;
  2814. }
  2815. /* base is usually what we get from ucode with each received frame,
  2816. * the same as HW timer counter counting down
  2817. */
  2818. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2819. {
  2820. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2821. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2822. u32 interval = beacon_interval * TIME_UNIT;
  2823. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2824. (addon & BEACON_TIME_MASK_HIGH);
  2825. if (base_low > addon_low)
  2826. res += base_low - addon_low;
  2827. else if (base_low < addon_low) {
  2828. res += interval + base_low - addon_low;
  2829. res += (1 << 24);
  2830. } else
  2831. res += (1 << 24);
  2832. return cpu_to_le32(res);
  2833. }
  2834. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2835. struct ieee80211_measurement_params *params,
  2836. u8 type)
  2837. {
  2838. struct iwl4965_spectrum_cmd spectrum;
  2839. struct iwl4965_rx_packet *res;
  2840. struct iwl4965_host_cmd cmd = {
  2841. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2842. .data = (void *)&spectrum,
  2843. .meta.flags = CMD_WANT_SKB,
  2844. };
  2845. u32 add_time = le64_to_cpu(params->start_time);
  2846. int rc;
  2847. int spectrum_resp_status;
  2848. int duration = le16_to_cpu(params->duration);
  2849. if (iwl4965_is_associated(priv))
  2850. add_time =
  2851. iwl4965_usecs_to_beacons(
  2852. le64_to_cpu(params->start_time) - priv->last_tsf,
  2853. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2854. memset(&spectrum, 0, sizeof(spectrum));
  2855. spectrum.channel_count = cpu_to_le16(1);
  2856. spectrum.flags =
  2857. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2858. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2859. cmd.len = sizeof(spectrum);
  2860. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2861. if (iwl4965_is_associated(priv))
  2862. spectrum.start_time =
  2863. iwl4965_add_beacon_time(priv->last_beacon_time,
  2864. add_time,
  2865. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2866. else
  2867. spectrum.start_time = 0;
  2868. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2869. spectrum.channels[0].channel = params->channel;
  2870. spectrum.channels[0].type = type;
  2871. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2872. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2873. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2874. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2875. if (rc)
  2876. return rc;
  2877. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2878. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2879. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2880. rc = -EIO;
  2881. }
  2882. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2883. switch (spectrum_resp_status) {
  2884. case 0: /* Command will be handled */
  2885. if (res->u.spectrum.id != 0xff) {
  2886. IWL_DEBUG_INFO
  2887. ("Replaced existing measurement: %d\n",
  2888. res->u.spectrum.id);
  2889. priv->measurement_status &= ~MEASUREMENT_READY;
  2890. }
  2891. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2892. rc = 0;
  2893. break;
  2894. case 1: /* Command will not be handled */
  2895. rc = -EAGAIN;
  2896. break;
  2897. }
  2898. dev_kfree_skb_any(cmd.meta.u.skb);
  2899. return rc;
  2900. }
  2901. #endif
  2902. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2903. struct iwl4965_tx_info *tx_sta)
  2904. {
  2905. tx_sta->status.ack_signal = 0;
  2906. tx_sta->status.excessive_retries = 0;
  2907. tx_sta->status.queue_length = 0;
  2908. tx_sta->status.queue_number = 0;
  2909. if (in_interrupt())
  2910. ieee80211_tx_status_irqsafe(priv->hw,
  2911. tx_sta->skb[0], &(tx_sta->status));
  2912. else
  2913. ieee80211_tx_status(priv->hw,
  2914. tx_sta->skb[0], &(tx_sta->status));
  2915. tx_sta->skb[0] = NULL;
  2916. }
  2917. /**
  2918. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2919. *
  2920. * When FW advances 'R' index, all entries between old and new 'R' index
  2921. * need to be reclaimed. As result, some free space forms. If there is
  2922. * enough free space (> low mark), wake the stack that feeds us.
  2923. */
  2924. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2925. {
  2926. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2927. struct iwl4965_queue *q = &txq->q;
  2928. int nfreed = 0;
  2929. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2930. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2931. "is out of range [0-%d] %d %d.\n", txq_id,
  2932. index, q->n_bd, q->write_ptr, q->read_ptr);
  2933. return 0;
  2934. }
  2935. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2936. q->read_ptr != index;
  2937. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2938. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2939. iwl4965_txstatus_to_ieee(priv,
  2940. &(txq->txb[txq->q.read_ptr]));
  2941. iwl4965_hw_txq_free_tfd(priv, txq);
  2942. } else if (nfreed > 1) {
  2943. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2944. q->write_ptr, q->read_ptr);
  2945. queue_work(priv->workqueue, &priv->restart);
  2946. }
  2947. nfreed++;
  2948. }
  2949. if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2950. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2951. priv->mac80211_registered)
  2952. ieee80211_wake_queue(priv->hw, txq_id);
  2953. return nfreed;
  2954. }
  2955. static int iwl4965_is_tx_success(u32 status)
  2956. {
  2957. status &= TX_STATUS_MSK;
  2958. return (status == TX_STATUS_SUCCESS)
  2959. || (status == TX_STATUS_DIRECT_DONE);
  2960. }
  2961. /******************************************************************************
  2962. *
  2963. * Generic RX handler implementations
  2964. *
  2965. ******************************************************************************/
  2966. #ifdef CONFIG_IWL4965_HT
  2967. #ifdef CONFIG_IWL4965_HT_AGG
  2968. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2969. struct ieee80211_hdr *hdr)
  2970. {
  2971. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2972. return IWL_AP_ID;
  2973. else {
  2974. u8 *da = ieee80211_get_DA(hdr);
  2975. return iwl4965_hw_find_station(priv, da);
  2976. }
  2977. }
  2978. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2979. struct iwl4965_priv *priv, int txq_id, int idx)
  2980. {
  2981. if (priv->txq[txq_id].txb[idx].skb[0])
  2982. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2983. txb[idx].skb[0]->data;
  2984. return NULL;
  2985. }
  2986. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2987. {
  2988. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2989. tx_resp->frame_count);
  2990. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2991. }
  2992. /**
  2993. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2994. */
  2995. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2996. struct iwl4965_ht_agg *agg,
  2997. struct iwl4965_tx_resp *tx_resp,
  2998. u16 start_idx)
  2999. {
  3000. u32 status;
  3001. __le32 *frame_status = &tx_resp->status;
  3002. struct ieee80211_tx_status *tx_status = NULL;
  3003. struct ieee80211_hdr *hdr = NULL;
  3004. int i, sh;
  3005. int txq_id, idx;
  3006. u16 seq;
  3007. if (agg->wait_for_ba)
  3008. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  3009. agg->frame_count = tx_resp->frame_count;
  3010. agg->start_idx = start_idx;
  3011. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3012. agg->bitmap0 = agg->bitmap1 = 0;
  3013. /* # frames attempted by Tx command */
  3014. if (agg->frame_count == 1) {
  3015. /* Only one frame was attempted; no block-ack will arrive */
  3016. struct iwl4965_tx_queue *txq ;
  3017. status = le32_to_cpu(frame_status[0]);
  3018. txq_id = agg->txq_id;
  3019. txq = &priv->txq[txq_id];
  3020. /* FIXME: code repetition */
  3021. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  3022. agg->frame_count, agg->start_idx);
  3023. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  3024. tx_status->retry_count = tx_resp->failure_frame;
  3025. tx_status->queue_number = status & 0xff;
  3026. tx_status->queue_length = tx_resp->bt_kill_count;
  3027. tx_status->queue_length |= tx_resp->failure_rts;
  3028. tx_status->flags = iwl4965_is_tx_success(status)?
  3029. IEEE80211_TX_STATUS_ACK : 0;
  3030. tx_status->control.tx_rate =
  3031. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3032. /* FIXME: code repetition end */
  3033. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3034. status & 0xff, tx_resp->failure_frame);
  3035. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3036. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3037. agg->wait_for_ba = 0;
  3038. } else {
  3039. /* Two or more frames were attempted; expect block-ack */
  3040. u64 bitmap = 0;
  3041. int start = agg->start_idx;
  3042. /* Construct bit-map of pending frames within Tx window */
  3043. for (i = 0; i < agg->frame_count; i++) {
  3044. u16 sc;
  3045. status = le32_to_cpu(frame_status[i]);
  3046. seq = status >> 16;
  3047. idx = SEQ_TO_INDEX(seq);
  3048. txq_id = SEQ_TO_QUEUE(seq);
  3049. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3050. AGG_TX_STATE_ABORT_MSK))
  3051. continue;
  3052. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3053. agg->frame_count, txq_id, idx);
  3054. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3055. sc = le16_to_cpu(hdr->seq_ctrl);
  3056. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3057. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3058. " idx=%d, seq_idx=%d, seq=%d\n",
  3059. idx, SEQ_TO_SN(sc),
  3060. hdr->seq_ctrl);
  3061. return -1;
  3062. }
  3063. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3064. i, idx, SEQ_TO_SN(sc));
  3065. sh = idx - start;
  3066. if (sh > 64) {
  3067. sh = (start - idx) + 0xff;
  3068. bitmap = bitmap << sh;
  3069. sh = 0;
  3070. start = idx;
  3071. } else if (sh < -64)
  3072. sh = 0xff - (start - idx);
  3073. else if (sh < 0) {
  3074. sh = start - idx;
  3075. start = idx;
  3076. bitmap = bitmap << sh;
  3077. sh = 0;
  3078. }
  3079. bitmap |= (1 << sh);
  3080. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3081. start, (u32)(bitmap & 0xFFFFFFFF));
  3082. }
  3083. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3084. agg->bitmap1 = bitmap >> 32;
  3085. agg->start_idx = start;
  3086. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3087. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3088. agg->frame_count, agg->start_idx,
  3089. agg->bitmap0);
  3090. if (bitmap)
  3091. agg->wait_for_ba = 1;
  3092. }
  3093. return 0;
  3094. }
  3095. #endif
  3096. #endif
  3097. /**
  3098. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3099. */
  3100. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3101. struct iwl4965_rx_mem_buffer *rxb)
  3102. {
  3103. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3104. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3105. int txq_id = SEQ_TO_QUEUE(sequence);
  3106. int index = SEQ_TO_INDEX(sequence);
  3107. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3108. struct ieee80211_tx_status *tx_status;
  3109. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3110. u32 status = le32_to_cpu(tx_resp->status);
  3111. #ifdef CONFIG_IWL4965_HT
  3112. #ifdef CONFIG_IWL4965_HT_AGG
  3113. int tid, sta_id;
  3114. #endif
  3115. #endif
  3116. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3117. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3118. "is out of range [0-%d] %d %d\n", txq_id,
  3119. index, txq->q.n_bd, txq->q.write_ptr,
  3120. txq->q.read_ptr);
  3121. return;
  3122. }
  3123. #ifdef CONFIG_IWL4965_HT
  3124. #ifdef CONFIG_IWL4965_HT_AGG
  3125. if (txq->sched_retry) {
  3126. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3127. struct ieee80211_hdr *hdr =
  3128. iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3129. struct iwl4965_ht_agg *agg = NULL;
  3130. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3131. if (qc == NULL) {
  3132. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3133. return;
  3134. }
  3135. tid = le16_to_cpu(*qc) & 0xf;
  3136. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3137. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3138. IWL_ERROR("Station not known for\n");
  3139. return;
  3140. }
  3141. agg = &priv->stations[sta_id].tid[tid].agg;
  3142. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3143. if ((tx_resp->frame_count == 1) &&
  3144. !iwl4965_is_tx_success(status)) {
  3145. /* TODO: send BAR */
  3146. }
  3147. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3148. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3149. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3150. "%d index %d\n", scd_ssn , index);
  3151. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3152. }
  3153. } else {
  3154. #endif /* CONFIG_IWL4965_HT_AGG */
  3155. #endif /* CONFIG_IWL4965_HT */
  3156. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3157. tx_status->retry_count = tx_resp->failure_frame;
  3158. tx_status->queue_number = status;
  3159. tx_status->queue_length = tx_resp->bt_kill_count;
  3160. tx_status->queue_length |= tx_resp->failure_rts;
  3161. tx_status->flags =
  3162. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3163. tx_status->control.tx_rate =
  3164. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3165. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3166. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3167. status, le32_to_cpu(tx_resp->rate_n_flags),
  3168. tx_resp->failure_frame);
  3169. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3170. if (index != -1)
  3171. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3172. #ifdef CONFIG_IWL4965_HT
  3173. #ifdef CONFIG_IWL4965_HT_AGG
  3174. }
  3175. #endif /* CONFIG_IWL4965_HT_AGG */
  3176. #endif /* CONFIG_IWL4965_HT */
  3177. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3178. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3179. }
  3180. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3181. struct iwl4965_rx_mem_buffer *rxb)
  3182. {
  3183. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3184. struct iwl4965_alive_resp *palive;
  3185. struct delayed_work *pwork;
  3186. palive = &pkt->u.alive_frame;
  3187. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3188. "0x%01X 0x%01X\n",
  3189. palive->is_valid, palive->ver_type,
  3190. palive->ver_subtype);
  3191. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3192. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3193. memcpy(&priv->card_alive_init,
  3194. &pkt->u.alive_frame,
  3195. sizeof(struct iwl4965_init_alive_resp));
  3196. pwork = &priv->init_alive_start;
  3197. } else {
  3198. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3199. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3200. sizeof(struct iwl4965_alive_resp));
  3201. pwork = &priv->alive_start;
  3202. }
  3203. /* We delay the ALIVE response by 5ms to
  3204. * give the HW RF Kill time to activate... */
  3205. if (palive->is_valid == UCODE_VALID_OK)
  3206. queue_delayed_work(priv->workqueue, pwork,
  3207. msecs_to_jiffies(5));
  3208. else
  3209. IWL_WARNING("uCode did not respond OK.\n");
  3210. }
  3211. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3212. struct iwl4965_rx_mem_buffer *rxb)
  3213. {
  3214. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3215. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3216. return;
  3217. }
  3218. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3219. struct iwl4965_rx_mem_buffer *rxb)
  3220. {
  3221. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3222. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3223. "seq 0x%04X ser 0x%08X\n",
  3224. le32_to_cpu(pkt->u.err_resp.error_type),
  3225. get_cmd_string(pkt->u.err_resp.cmd_id),
  3226. pkt->u.err_resp.cmd_id,
  3227. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3228. le32_to_cpu(pkt->u.err_resp.error_info));
  3229. }
  3230. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3231. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3232. {
  3233. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3234. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3235. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3236. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3237. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3238. rxon->channel = csa->channel;
  3239. priv->staging_rxon.channel = csa->channel;
  3240. }
  3241. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3242. struct iwl4965_rx_mem_buffer *rxb)
  3243. {
  3244. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3245. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3246. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3247. if (!report->state) {
  3248. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3249. "Spectrum Measure Notification: Start\n");
  3250. return;
  3251. }
  3252. memcpy(&priv->measure_report, report, sizeof(*report));
  3253. priv->measurement_status |= MEASUREMENT_READY;
  3254. #endif
  3255. }
  3256. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3257. struct iwl4965_rx_mem_buffer *rxb)
  3258. {
  3259. #ifdef CONFIG_IWL4965_DEBUG
  3260. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3261. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3262. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3263. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3264. #endif
  3265. }
  3266. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3267. struct iwl4965_rx_mem_buffer *rxb)
  3268. {
  3269. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3270. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3271. "notification for %s:\n",
  3272. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3273. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3274. }
  3275. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3276. {
  3277. struct iwl4965_priv *priv =
  3278. container_of(work, struct iwl4965_priv, beacon_update);
  3279. struct sk_buff *beacon;
  3280. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3281. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3282. if (!beacon) {
  3283. IWL_ERROR("update beacon failed\n");
  3284. return;
  3285. }
  3286. mutex_lock(&priv->mutex);
  3287. /* new beacon skb is allocated every time; dispose previous.*/
  3288. if (priv->ibss_beacon)
  3289. dev_kfree_skb(priv->ibss_beacon);
  3290. priv->ibss_beacon = beacon;
  3291. mutex_unlock(&priv->mutex);
  3292. iwl4965_send_beacon_cmd(priv);
  3293. }
  3294. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3295. struct iwl4965_rx_mem_buffer *rxb)
  3296. {
  3297. #ifdef CONFIG_IWL4965_DEBUG
  3298. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3299. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3300. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3301. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3302. "tsf %d %d rate %d\n",
  3303. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3304. beacon->beacon_notify_hdr.failure_frame,
  3305. le32_to_cpu(beacon->ibss_mgr_status),
  3306. le32_to_cpu(beacon->high_tsf),
  3307. le32_to_cpu(beacon->low_tsf), rate);
  3308. #endif
  3309. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3310. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3311. queue_work(priv->workqueue, &priv->beacon_update);
  3312. }
  3313. /* Service response to REPLY_SCAN_CMD (0x80) */
  3314. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3315. struct iwl4965_rx_mem_buffer *rxb)
  3316. {
  3317. #ifdef CONFIG_IWL4965_DEBUG
  3318. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3319. struct iwl4965_scanreq_notification *notif =
  3320. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3321. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3322. #endif
  3323. }
  3324. /* Service SCAN_START_NOTIFICATION (0x82) */
  3325. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3326. struct iwl4965_rx_mem_buffer *rxb)
  3327. {
  3328. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3329. struct iwl4965_scanstart_notification *notif =
  3330. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3331. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3332. IWL_DEBUG_SCAN("Scan start: "
  3333. "%d [802.11%s] "
  3334. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3335. notif->channel,
  3336. notif->band ? "bg" : "a",
  3337. notif->tsf_high,
  3338. notif->tsf_low, notif->status, notif->beacon_timer);
  3339. }
  3340. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3341. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3342. struct iwl4965_rx_mem_buffer *rxb)
  3343. {
  3344. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3345. struct iwl4965_scanresults_notification *notif =
  3346. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3347. IWL_DEBUG_SCAN("Scan ch.res: "
  3348. "%d [802.11%s] "
  3349. "(TSF: 0x%08X:%08X) - %d "
  3350. "elapsed=%lu usec (%dms since last)\n",
  3351. notif->channel,
  3352. notif->band ? "bg" : "a",
  3353. le32_to_cpu(notif->tsf_high),
  3354. le32_to_cpu(notif->tsf_low),
  3355. le32_to_cpu(notif->statistics[0]),
  3356. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3357. jiffies_to_msecs(elapsed_jiffies
  3358. (priv->last_scan_jiffies, jiffies)));
  3359. priv->last_scan_jiffies = jiffies;
  3360. priv->next_scan_jiffies = 0;
  3361. }
  3362. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3363. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3364. struct iwl4965_rx_mem_buffer *rxb)
  3365. {
  3366. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3367. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3368. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3369. scan_notif->scanned_channels,
  3370. scan_notif->tsf_low,
  3371. scan_notif->tsf_high, scan_notif->status);
  3372. /* The HW is no longer scanning */
  3373. clear_bit(STATUS_SCAN_HW, &priv->status);
  3374. /* The scan completion notification came in, so kill that timer... */
  3375. cancel_delayed_work(&priv->scan_check);
  3376. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3377. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3378. jiffies_to_msecs(elapsed_jiffies
  3379. (priv->scan_pass_start, jiffies)));
  3380. /* Remove this scanned band from the list
  3381. * of pending bands to scan */
  3382. priv->scan_bands--;
  3383. /* If a request to abort was given, or the scan did not succeed
  3384. * then we reset the scan state machine and terminate,
  3385. * re-queuing another scan if one has been requested */
  3386. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3387. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3388. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3389. } else {
  3390. /* If there are more bands on this scan pass reschedule */
  3391. if (priv->scan_bands > 0)
  3392. goto reschedule;
  3393. }
  3394. priv->last_scan_jiffies = jiffies;
  3395. priv->next_scan_jiffies = 0;
  3396. IWL_DEBUG_INFO("Setting scan to off\n");
  3397. clear_bit(STATUS_SCANNING, &priv->status);
  3398. IWL_DEBUG_INFO("Scan took %dms\n",
  3399. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3400. queue_work(priv->workqueue, &priv->scan_completed);
  3401. return;
  3402. reschedule:
  3403. priv->scan_pass_start = jiffies;
  3404. queue_work(priv->workqueue, &priv->request_scan);
  3405. }
  3406. /* Handle notification from uCode that card's power state is changing
  3407. * due to software, hardware, or critical temperature RFKILL */
  3408. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3409. struct iwl4965_rx_mem_buffer *rxb)
  3410. {
  3411. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3412. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3413. unsigned long status = priv->status;
  3414. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3415. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3416. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3417. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3418. RF_CARD_DISABLED)) {
  3419. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3420. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3421. if (!iwl4965_grab_nic_access(priv)) {
  3422. iwl4965_write_direct32(
  3423. priv, HBUS_TARG_MBX_C,
  3424. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3425. iwl4965_release_nic_access(priv);
  3426. }
  3427. if (!(flags & RXON_CARD_DISABLED)) {
  3428. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3429. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3430. if (!iwl4965_grab_nic_access(priv)) {
  3431. iwl4965_write_direct32(
  3432. priv, HBUS_TARG_MBX_C,
  3433. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3434. iwl4965_release_nic_access(priv);
  3435. }
  3436. }
  3437. if (flags & RF_CARD_DISABLED) {
  3438. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3439. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3440. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3441. if (!iwl4965_grab_nic_access(priv))
  3442. iwl4965_release_nic_access(priv);
  3443. }
  3444. }
  3445. if (flags & HW_CARD_DISABLED)
  3446. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3447. else
  3448. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3449. if (flags & SW_CARD_DISABLED)
  3450. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3451. else
  3452. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3453. if (!(flags & RXON_CARD_DISABLED))
  3454. iwl4965_scan_cancel(priv);
  3455. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3456. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3457. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3458. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3459. queue_work(priv->workqueue, &priv->rf_kill);
  3460. else
  3461. wake_up_interruptible(&priv->wait_command_queue);
  3462. }
  3463. /**
  3464. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3465. *
  3466. * Setup the RX handlers for each of the reply types sent from the uCode
  3467. * to the host.
  3468. *
  3469. * This function chains into the hardware specific files for them to setup
  3470. * any hardware specific handlers as well.
  3471. */
  3472. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3473. {
  3474. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3475. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3476. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3477. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3478. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3479. iwl4965_rx_spectrum_measure_notif;
  3480. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3481. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3482. iwl4965_rx_pm_debug_statistics_notif;
  3483. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3484. /*
  3485. * The same handler is used for both the REPLY to a discrete
  3486. * statistics request from the host as well as for the periodic
  3487. * statistics notifications (after received beacons) from the uCode.
  3488. */
  3489. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3490. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3491. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3492. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3493. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3494. iwl4965_rx_scan_results_notif;
  3495. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3496. iwl4965_rx_scan_complete_notif;
  3497. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3498. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3499. /* Set up hardware specific Rx handlers */
  3500. iwl4965_hw_rx_handler_setup(priv);
  3501. }
  3502. /**
  3503. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3504. * @rxb: Rx buffer to reclaim
  3505. *
  3506. * If an Rx buffer has an async callback associated with it the callback
  3507. * will be executed. The attached skb (if present) will only be freed
  3508. * if the callback returns 1
  3509. */
  3510. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3511. struct iwl4965_rx_mem_buffer *rxb)
  3512. {
  3513. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3514. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3515. int txq_id = SEQ_TO_QUEUE(sequence);
  3516. int index = SEQ_TO_INDEX(sequence);
  3517. int huge = sequence & SEQ_HUGE_FRAME;
  3518. int cmd_index;
  3519. struct iwl4965_cmd *cmd;
  3520. /* If a Tx command is being handled and it isn't in the actual
  3521. * command queue then there a command routing bug has been introduced
  3522. * in the queue management code. */
  3523. if (txq_id != IWL_CMD_QUEUE_NUM)
  3524. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3525. txq_id, pkt->hdr.cmd);
  3526. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3527. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3528. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3529. /* Input error checking is done when commands are added to queue. */
  3530. if (cmd->meta.flags & CMD_WANT_SKB) {
  3531. cmd->meta.source->u.skb = rxb->skb;
  3532. rxb->skb = NULL;
  3533. } else if (cmd->meta.u.callback &&
  3534. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3535. rxb->skb = NULL;
  3536. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3537. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3538. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3539. wake_up_interruptible(&priv->wait_command_queue);
  3540. }
  3541. }
  3542. /************************** RX-FUNCTIONS ****************************/
  3543. /*
  3544. * Rx theory of operation
  3545. *
  3546. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3547. * each of which point to Receive Buffers to be filled by 4965. These get
  3548. * used not only for Rx frames, but for any command response or notification
  3549. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3550. * of indexes into the circular buffer.
  3551. *
  3552. * Rx Queue Indexes
  3553. * The host/firmware share two index registers for managing the Rx buffers.
  3554. *
  3555. * The READ index maps to the first position that the firmware may be writing
  3556. * to -- the driver can read up to (but not including) this position and get
  3557. * good data.
  3558. * The READ index is managed by the firmware once the card is enabled.
  3559. *
  3560. * The WRITE index maps to the last position the driver has read from -- the
  3561. * position preceding WRITE is the last slot the firmware can place a packet.
  3562. *
  3563. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3564. * WRITE = READ.
  3565. *
  3566. * During initialization, the host sets up the READ queue position to the first
  3567. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3568. *
  3569. * When the firmware places a packet in a buffer, it will advance the READ index
  3570. * and fire the RX interrupt. The driver can then query the READ index and
  3571. * process as many packets as possible, moving the WRITE index forward as it
  3572. * resets the Rx queue buffers with new memory.
  3573. *
  3574. * The management in the driver is as follows:
  3575. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3576. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3577. * to replenish the iwl->rxq->rx_free.
  3578. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3579. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3580. * 'processed' and 'read' driver indexes as well)
  3581. * + A received packet is processed and handed to the kernel network stack,
  3582. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3583. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3584. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3585. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3586. * were enough free buffers and RX_STALLED is set it is cleared.
  3587. *
  3588. *
  3589. * Driver sequence:
  3590. *
  3591. * iwl4965_rx_queue_alloc() Allocates rx_free
  3592. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3593. * iwl4965_rx_queue_restock
  3594. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3595. * queue, updates firmware pointers, and updates
  3596. * the WRITE index. If insufficient rx_free buffers
  3597. * are available, schedules iwl4965_rx_replenish
  3598. *
  3599. * -- enable interrupts --
  3600. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3601. * READ INDEX, detaching the SKB from the pool.
  3602. * Moves the packet buffer from queue to rx_used.
  3603. * Calls iwl4965_rx_queue_restock to refill any empty
  3604. * slots.
  3605. * ...
  3606. *
  3607. */
  3608. /**
  3609. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3610. */
  3611. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3612. {
  3613. int s = q->read - q->write;
  3614. if (s <= 0)
  3615. s += RX_QUEUE_SIZE;
  3616. /* keep some buffer to not confuse full and empty queue */
  3617. s -= 2;
  3618. if (s < 0)
  3619. s = 0;
  3620. return s;
  3621. }
  3622. /**
  3623. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3624. */
  3625. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3626. {
  3627. u32 reg = 0;
  3628. int rc = 0;
  3629. unsigned long flags;
  3630. spin_lock_irqsave(&q->lock, flags);
  3631. if (q->need_update == 0)
  3632. goto exit_unlock;
  3633. /* If power-saving is in use, make sure device is awake */
  3634. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3635. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3636. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3637. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3638. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3639. goto exit_unlock;
  3640. }
  3641. rc = iwl4965_grab_nic_access(priv);
  3642. if (rc)
  3643. goto exit_unlock;
  3644. /* Device expects a multiple of 8 */
  3645. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3646. q->write & ~0x7);
  3647. iwl4965_release_nic_access(priv);
  3648. /* Else device is assumed to be awake */
  3649. } else
  3650. /* Device expects a multiple of 8 */
  3651. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3652. q->need_update = 0;
  3653. exit_unlock:
  3654. spin_unlock_irqrestore(&q->lock, flags);
  3655. return rc;
  3656. }
  3657. /**
  3658. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3659. */
  3660. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3661. dma_addr_t dma_addr)
  3662. {
  3663. return cpu_to_le32((u32)(dma_addr >> 8));
  3664. }
  3665. /**
  3666. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3667. *
  3668. * If there are slots in the RX queue that need to be restocked,
  3669. * and we have free pre-allocated buffers, fill the ranks as much
  3670. * as we can, pulling from rx_free.
  3671. *
  3672. * This moves the 'write' index forward to catch up with 'processed', and
  3673. * also updates the memory address in the firmware to reference the new
  3674. * target buffer.
  3675. */
  3676. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3677. {
  3678. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3679. struct list_head *element;
  3680. struct iwl4965_rx_mem_buffer *rxb;
  3681. unsigned long flags;
  3682. int write, rc;
  3683. spin_lock_irqsave(&rxq->lock, flags);
  3684. write = rxq->write & ~0x7;
  3685. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3686. /* Get next free Rx buffer, remove from free list */
  3687. element = rxq->rx_free.next;
  3688. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3689. list_del(element);
  3690. /* Point to Rx buffer via next RBD in circular buffer */
  3691. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3692. rxq->queue[rxq->write] = rxb;
  3693. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3694. rxq->free_count--;
  3695. }
  3696. spin_unlock_irqrestore(&rxq->lock, flags);
  3697. /* If the pre-allocated buffer pool is dropping low, schedule to
  3698. * refill it */
  3699. if (rxq->free_count <= RX_LOW_WATERMARK)
  3700. queue_work(priv->workqueue, &priv->rx_replenish);
  3701. /* If we've added more space for the firmware to place data, tell it.
  3702. * Increment device's write pointer in multiples of 8. */
  3703. if ((write != (rxq->write & ~0x7))
  3704. || (abs(rxq->write - rxq->read) > 7)) {
  3705. spin_lock_irqsave(&rxq->lock, flags);
  3706. rxq->need_update = 1;
  3707. spin_unlock_irqrestore(&rxq->lock, flags);
  3708. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3709. if (rc)
  3710. return rc;
  3711. }
  3712. return 0;
  3713. }
  3714. /**
  3715. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3716. *
  3717. * When moving to rx_free an SKB is allocated for the slot.
  3718. *
  3719. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3720. * This is called as a scheduled work item (except for during initialization)
  3721. */
  3722. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3723. {
  3724. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3725. struct list_head *element;
  3726. struct iwl4965_rx_mem_buffer *rxb;
  3727. unsigned long flags;
  3728. spin_lock_irqsave(&rxq->lock, flags);
  3729. while (!list_empty(&rxq->rx_used)) {
  3730. element = rxq->rx_used.next;
  3731. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3732. /* Alloc a new receive buffer */
  3733. rxb->skb =
  3734. alloc_skb(priv->hw_setting.rx_buf_size,
  3735. __GFP_NOWARN | GFP_ATOMIC);
  3736. if (!rxb->skb) {
  3737. if (net_ratelimit())
  3738. printk(KERN_CRIT DRV_NAME
  3739. ": Can not allocate SKB buffers\n");
  3740. /* We don't reschedule replenish work here -- we will
  3741. * call the restock method and if it still needs
  3742. * more buffers it will schedule replenish */
  3743. break;
  3744. }
  3745. priv->alloc_rxb_skb++;
  3746. list_del(element);
  3747. /* Get physical address of RB/SKB */
  3748. rxb->dma_addr =
  3749. pci_map_single(priv->pci_dev, rxb->skb->data,
  3750. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3751. list_add_tail(&rxb->list, &rxq->rx_free);
  3752. rxq->free_count++;
  3753. }
  3754. spin_unlock_irqrestore(&rxq->lock, flags);
  3755. }
  3756. /*
  3757. * this should be called while priv->lock is locked
  3758. */
  3759. static void __iwl4965_rx_replenish(void *data)
  3760. {
  3761. struct iwl4965_priv *priv = data;
  3762. iwl4965_rx_allocate(priv);
  3763. iwl4965_rx_queue_restock(priv);
  3764. }
  3765. void iwl4965_rx_replenish(void *data)
  3766. {
  3767. struct iwl4965_priv *priv = data;
  3768. unsigned long flags;
  3769. iwl4965_rx_allocate(priv);
  3770. spin_lock_irqsave(&priv->lock, flags);
  3771. iwl4965_rx_queue_restock(priv);
  3772. spin_unlock_irqrestore(&priv->lock, flags);
  3773. }
  3774. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3775. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3776. * This free routine walks the list of POOL entries and if SKB is set to
  3777. * non NULL it is unmapped and freed
  3778. */
  3779. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3780. {
  3781. int i;
  3782. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3783. if (rxq->pool[i].skb != NULL) {
  3784. pci_unmap_single(priv->pci_dev,
  3785. rxq->pool[i].dma_addr,
  3786. priv->hw_setting.rx_buf_size,
  3787. PCI_DMA_FROMDEVICE);
  3788. dev_kfree_skb(rxq->pool[i].skb);
  3789. }
  3790. }
  3791. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3792. rxq->dma_addr);
  3793. rxq->bd = NULL;
  3794. }
  3795. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3796. {
  3797. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3798. struct pci_dev *dev = priv->pci_dev;
  3799. int i;
  3800. spin_lock_init(&rxq->lock);
  3801. INIT_LIST_HEAD(&rxq->rx_free);
  3802. INIT_LIST_HEAD(&rxq->rx_used);
  3803. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3804. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3805. if (!rxq->bd)
  3806. return -ENOMEM;
  3807. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3808. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3809. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3810. /* Set us so that we have processed and used all buffers, but have
  3811. * not restocked the Rx queue with fresh buffers */
  3812. rxq->read = rxq->write = 0;
  3813. rxq->free_count = 0;
  3814. rxq->need_update = 0;
  3815. return 0;
  3816. }
  3817. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3818. {
  3819. unsigned long flags;
  3820. int i;
  3821. spin_lock_irqsave(&rxq->lock, flags);
  3822. INIT_LIST_HEAD(&rxq->rx_free);
  3823. INIT_LIST_HEAD(&rxq->rx_used);
  3824. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3825. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3826. /* In the reset function, these buffers may have been allocated
  3827. * to an SKB, so we need to unmap and free potential storage */
  3828. if (rxq->pool[i].skb != NULL) {
  3829. pci_unmap_single(priv->pci_dev,
  3830. rxq->pool[i].dma_addr,
  3831. priv->hw_setting.rx_buf_size,
  3832. PCI_DMA_FROMDEVICE);
  3833. priv->alloc_rxb_skb--;
  3834. dev_kfree_skb(rxq->pool[i].skb);
  3835. rxq->pool[i].skb = NULL;
  3836. }
  3837. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3838. }
  3839. /* Set us so that we have processed and used all buffers, but have
  3840. * not restocked the Rx queue with fresh buffers */
  3841. rxq->read = rxq->write = 0;
  3842. rxq->free_count = 0;
  3843. spin_unlock_irqrestore(&rxq->lock, flags);
  3844. }
  3845. /* Convert linear signal-to-noise ratio into dB */
  3846. static u8 ratio2dB[100] = {
  3847. /* 0 1 2 3 4 5 6 7 8 9 */
  3848. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3849. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3850. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3851. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3852. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3853. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3854. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3855. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3856. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3857. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3858. };
  3859. /* Calculates a relative dB value from a ratio of linear
  3860. * (i.e. not dB) signal levels.
  3861. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3862. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3863. {
  3864. /* 1000:1 or higher just report as 60 dB */
  3865. if (sig_ratio >= 1000)
  3866. return 60;
  3867. /* 100:1 or higher, divide by 10 and use table,
  3868. * add 20 dB to make up for divide by 10 */
  3869. if (sig_ratio >= 100)
  3870. return (20 + (int)ratio2dB[sig_ratio/10]);
  3871. /* We shouldn't see this */
  3872. if (sig_ratio < 1)
  3873. return 0;
  3874. /* Use table for ratios 1:1 - 99:1 */
  3875. return (int)ratio2dB[sig_ratio];
  3876. }
  3877. #define PERFECT_RSSI (-20) /* dBm */
  3878. #define WORST_RSSI (-95) /* dBm */
  3879. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3880. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3881. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3882. * about formulas used below. */
  3883. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3884. {
  3885. int sig_qual;
  3886. int degradation = PERFECT_RSSI - rssi_dbm;
  3887. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3888. * as indicator; formula is (signal dbm - noise dbm).
  3889. * SNR at or above 40 is a great signal (100%).
  3890. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3891. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3892. if (noise_dbm) {
  3893. if (rssi_dbm - noise_dbm >= 40)
  3894. return 100;
  3895. else if (rssi_dbm < noise_dbm)
  3896. return 0;
  3897. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3898. /* Else use just the signal level.
  3899. * This formula is a least squares fit of data points collected and
  3900. * compared with a reference system that had a percentage (%) display
  3901. * for signal quality. */
  3902. } else
  3903. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3904. (15 * RSSI_RANGE + 62 * degradation)) /
  3905. (RSSI_RANGE * RSSI_RANGE);
  3906. if (sig_qual > 100)
  3907. sig_qual = 100;
  3908. else if (sig_qual < 1)
  3909. sig_qual = 0;
  3910. return sig_qual;
  3911. }
  3912. /**
  3913. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3914. *
  3915. * Uses the priv->rx_handlers callback function array to invoke
  3916. * the appropriate handlers, including command responses,
  3917. * frame-received notifications, and other notifications.
  3918. */
  3919. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3920. {
  3921. struct iwl4965_rx_mem_buffer *rxb;
  3922. struct iwl4965_rx_packet *pkt;
  3923. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3924. u32 r, i;
  3925. int reclaim;
  3926. unsigned long flags;
  3927. u8 fill_rx = 0;
  3928. u32 count = 0;
  3929. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3930. * buffer that the driver may process (last buffer filled by ucode). */
  3931. r = iwl4965_hw_get_rx_read(priv);
  3932. i = rxq->read;
  3933. /* Rx interrupt, but nothing sent from uCode */
  3934. if (i == r)
  3935. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3936. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3937. fill_rx = 1;
  3938. while (i != r) {
  3939. rxb = rxq->queue[i];
  3940. /* If an RXB doesn't have a Rx queue slot associated with it,
  3941. * then a bug has been introduced in the queue refilling
  3942. * routines -- catch it here */
  3943. BUG_ON(rxb == NULL);
  3944. rxq->queue[i] = NULL;
  3945. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3946. priv->hw_setting.rx_buf_size,
  3947. PCI_DMA_FROMDEVICE);
  3948. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3949. /* Reclaim a command buffer only if this packet is a response
  3950. * to a (driver-originated) command.
  3951. * If the packet (e.g. Rx frame) originated from uCode,
  3952. * there is no command buffer to reclaim.
  3953. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3954. * but apparently a few don't get set; catch them here. */
  3955. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3956. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3957. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3958. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3959. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3960. (pkt->hdr.cmd != REPLY_TX);
  3961. /* Based on type of command response or notification,
  3962. * handle those that need handling via function in
  3963. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3964. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3965. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3966. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3967. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3968. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3969. } else {
  3970. /* No handling needed */
  3971. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3972. "r %d i %d No handler needed for %s, 0x%02x\n",
  3973. r, i, get_cmd_string(pkt->hdr.cmd),
  3974. pkt->hdr.cmd);
  3975. }
  3976. if (reclaim) {
  3977. /* Invoke any callbacks, transfer the skb to caller, and
  3978. * fire off the (possibly) blocking iwl4965_send_cmd()
  3979. * as we reclaim the driver command queue */
  3980. if (rxb && rxb->skb)
  3981. iwl4965_tx_cmd_complete(priv, rxb);
  3982. else
  3983. IWL_WARNING("Claim null rxb?\n");
  3984. }
  3985. /* For now we just don't re-use anything. We can tweak this
  3986. * later to try and re-use notification packets and SKBs that
  3987. * fail to Rx correctly */
  3988. if (rxb->skb != NULL) {
  3989. priv->alloc_rxb_skb--;
  3990. dev_kfree_skb_any(rxb->skb);
  3991. rxb->skb = NULL;
  3992. }
  3993. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3994. priv->hw_setting.rx_buf_size,
  3995. PCI_DMA_FROMDEVICE);
  3996. spin_lock_irqsave(&rxq->lock, flags);
  3997. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3998. spin_unlock_irqrestore(&rxq->lock, flags);
  3999. i = (i + 1) & RX_QUEUE_MASK;
  4000. /* If there are a lot of unused frames,
  4001. * restock the Rx queue so ucode wont assert. */
  4002. if (fill_rx) {
  4003. count++;
  4004. if (count >= 8) {
  4005. priv->rxq.read = i;
  4006. __iwl4965_rx_replenish(priv);
  4007. count = 0;
  4008. }
  4009. }
  4010. }
  4011. /* Backtrack one entry */
  4012. priv->rxq.read = i;
  4013. iwl4965_rx_queue_restock(priv);
  4014. }
  4015. /**
  4016. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4017. */
  4018. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4019. struct iwl4965_tx_queue *txq)
  4020. {
  4021. u32 reg = 0;
  4022. int rc = 0;
  4023. int txq_id = txq->q.id;
  4024. if (txq->need_update == 0)
  4025. return rc;
  4026. /* if we're trying to save power */
  4027. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4028. /* wake up nic if it's powered down ...
  4029. * uCode will wake up, and interrupt us again, so next
  4030. * time we'll skip this part. */
  4031. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4032. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4033. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4034. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4035. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4036. return rc;
  4037. }
  4038. /* restore this queue's parameters in nic hardware. */
  4039. rc = iwl4965_grab_nic_access(priv);
  4040. if (rc)
  4041. return rc;
  4042. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4043. txq->q.write_ptr | (txq_id << 8));
  4044. iwl4965_release_nic_access(priv);
  4045. /* else not in power-save mode, uCode will never sleep when we're
  4046. * trying to tx (during RFKILL, we're not trying to tx). */
  4047. } else
  4048. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4049. txq->q.write_ptr | (txq_id << 8));
  4050. txq->need_update = 0;
  4051. return rc;
  4052. }
  4053. #ifdef CONFIG_IWL4965_DEBUG
  4054. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4055. {
  4056. DECLARE_MAC_BUF(mac);
  4057. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4058. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4059. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4060. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4061. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4062. le32_to_cpu(rxon->filter_flags));
  4063. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4064. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4065. rxon->ofdm_basic_rates);
  4066. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4067. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4068. print_mac(mac, rxon->node_addr));
  4069. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4070. print_mac(mac, rxon->bssid_addr));
  4071. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4072. }
  4073. #endif
  4074. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4075. {
  4076. IWL_DEBUG_ISR("Enabling interrupts\n");
  4077. set_bit(STATUS_INT_ENABLED, &priv->status);
  4078. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4079. }
  4080. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4081. {
  4082. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4083. /* disable interrupts from uCode/NIC to host */
  4084. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4085. /* acknowledge/clear/reset any interrupts still pending
  4086. * from uCode or flow handler (Rx/Tx DMA) */
  4087. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4088. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4089. IWL_DEBUG_ISR("Disabled interrupts\n");
  4090. }
  4091. static const char *desc_lookup(int i)
  4092. {
  4093. switch (i) {
  4094. case 1:
  4095. return "FAIL";
  4096. case 2:
  4097. return "BAD_PARAM";
  4098. case 3:
  4099. return "BAD_CHECKSUM";
  4100. case 4:
  4101. return "NMI_INTERRUPT";
  4102. case 5:
  4103. return "SYSASSERT";
  4104. case 6:
  4105. return "FATAL_ERROR";
  4106. }
  4107. return "UNKNOWN";
  4108. }
  4109. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4110. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4111. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4112. {
  4113. u32 data2, line;
  4114. u32 desc, time, count, base, data1;
  4115. u32 blink1, blink2, ilink1, ilink2;
  4116. int rc;
  4117. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4118. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4119. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4120. return;
  4121. }
  4122. rc = iwl4965_grab_nic_access(priv);
  4123. if (rc) {
  4124. IWL_WARNING("Can not read from adapter at this time.\n");
  4125. return;
  4126. }
  4127. count = iwl4965_read_targ_mem(priv, base);
  4128. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4129. IWL_ERROR("Start IWL Error Log Dump:\n");
  4130. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4131. priv->status, priv->config, count);
  4132. }
  4133. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4134. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4135. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4136. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4137. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4138. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4139. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4140. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4141. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4142. IWL_ERROR("Desc Time "
  4143. "data1 data2 line\n");
  4144. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4145. desc_lookup(desc), desc, time, data1, data2, line);
  4146. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4147. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4148. ilink1, ilink2);
  4149. iwl4965_release_nic_access(priv);
  4150. }
  4151. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4152. /**
  4153. * iwl4965_print_event_log - Dump error event log to syslog
  4154. *
  4155. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4156. */
  4157. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4158. u32 num_events, u32 mode)
  4159. {
  4160. u32 i;
  4161. u32 base; /* SRAM byte address of event log header */
  4162. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4163. u32 ptr; /* SRAM byte address of log data */
  4164. u32 ev, time, data; /* event log data */
  4165. if (num_events == 0)
  4166. return;
  4167. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4168. if (mode == 0)
  4169. event_size = 2 * sizeof(u32);
  4170. else
  4171. event_size = 3 * sizeof(u32);
  4172. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4173. /* "time" is actually "data" for mode 0 (no timestamp).
  4174. * place event id # at far right for easier visual parsing. */
  4175. for (i = 0; i < num_events; i++) {
  4176. ev = iwl4965_read_targ_mem(priv, ptr);
  4177. ptr += sizeof(u32);
  4178. time = iwl4965_read_targ_mem(priv, ptr);
  4179. ptr += sizeof(u32);
  4180. if (mode == 0)
  4181. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4182. else {
  4183. data = iwl4965_read_targ_mem(priv, ptr);
  4184. ptr += sizeof(u32);
  4185. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4186. }
  4187. }
  4188. }
  4189. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4190. {
  4191. int rc;
  4192. u32 base; /* SRAM byte address of event log header */
  4193. u32 capacity; /* event log capacity in # entries */
  4194. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4195. u32 num_wraps; /* # times uCode wrapped to top of log */
  4196. u32 next_entry; /* index of next entry to be written by uCode */
  4197. u32 size; /* # entries that we'll print */
  4198. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4199. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4200. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4201. return;
  4202. }
  4203. rc = iwl4965_grab_nic_access(priv);
  4204. if (rc) {
  4205. IWL_WARNING("Can not read from adapter at this time.\n");
  4206. return;
  4207. }
  4208. /* event log header */
  4209. capacity = iwl4965_read_targ_mem(priv, base);
  4210. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4211. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4212. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4213. size = num_wraps ? capacity : next_entry;
  4214. /* bail out if nothing in log */
  4215. if (size == 0) {
  4216. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4217. iwl4965_release_nic_access(priv);
  4218. return;
  4219. }
  4220. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4221. size, num_wraps);
  4222. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4223. * i.e the next one that uCode would fill. */
  4224. if (num_wraps)
  4225. iwl4965_print_event_log(priv, next_entry,
  4226. capacity - next_entry, mode);
  4227. /* (then/else) start at top of log */
  4228. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4229. iwl4965_release_nic_access(priv);
  4230. }
  4231. /**
  4232. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4233. */
  4234. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4235. {
  4236. /* Set the FW error flag -- cleared on iwl4965_down */
  4237. set_bit(STATUS_FW_ERROR, &priv->status);
  4238. /* Cancel currently queued command. */
  4239. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4240. #ifdef CONFIG_IWL4965_DEBUG
  4241. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4242. iwl4965_dump_nic_error_log(priv);
  4243. iwl4965_dump_nic_event_log(priv);
  4244. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4245. }
  4246. #endif
  4247. wake_up_interruptible(&priv->wait_command_queue);
  4248. /* Keep the restart process from trying to send host
  4249. * commands by clearing the INIT status bit */
  4250. clear_bit(STATUS_READY, &priv->status);
  4251. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4252. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4253. "Restarting adapter due to uCode error.\n");
  4254. if (iwl4965_is_associated(priv)) {
  4255. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4256. sizeof(priv->recovery_rxon));
  4257. priv->error_recovering = 1;
  4258. }
  4259. queue_work(priv->workqueue, &priv->restart);
  4260. }
  4261. }
  4262. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4263. {
  4264. unsigned long flags;
  4265. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4266. sizeof(priv->staging_rxon));
  4267. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4268. iwl4965_commit_rxon(priv);
  4269. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4270. spin_lock_irqsave(&priv->lock, flags);
  4271. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4272. priv->error_recovering = 0;
  4273. spin_unlock_irqrestore(&priv->lock, flags);
  4274. }
  4275. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4276. {
  4277. u32 inta, handled = 0;
  4278. u32 inta_fh;
  4279. unsigned long flags;
  4280. #ifdef CONFIG_IWL4965_DEBUG
  4281. u32 inta_mask;
  4282. #endif
  4283. spin_lock_irqsave(&priv->lock, flags);
  4284. /* Ack/clear/reset pending uCode interrupts.
  4285. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4286. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4287. inta = iwl4965_read32(priv, CSR_INT);
  4288. iwl4965_write32(priv, CSR_INT, inta);
  4289. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4290. * Any new interrupts that happen after this, either while we're
  4291. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4292. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4293. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4294. #ifdef CONFIG_IWL4965_DEBUG
  4295. if (iwl4965_debug_level & IWL_DL_ISR) {
  4296. /* just for debug */
  4297. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4298. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4299. inta, inta_mask, inta_fh);
  4300. }
  4301. #endif
  4302. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4303. * atomic, make sure that inta covers all the interrupts that
  4304. * we've discovered, even if FH interrupt came in just after
  4305. * reading CSR_INT. */
  4306. if (inta_fh & CSR_FH_INT_RX_MASK)
  4307. inta |= CSR_INT_BIT_FH_RX;
  4308. if (inta_fh & CSR_FH_INT_TX_MASK)
  4309. inta |= CSR_INT_BIT_FH_TX;
  4310. /* Now service all interrupt bits discovered above. */
  4311. if (inta & CSR_INT_BIT_HW_ERR) {
  4312. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4313. /* Tell the device to stop sending interrupts */
  4314. iwl4965_disable_interrupts(priv);
  4315. iwl4965_irq_handle_error(priv);
  4316. handled |= CSR_INT_BIT_HW_ERR;
  4317. spin_unlock_irqrestore(&priv->lock, flags);
  4318. return;
  4319. }
  4320. #ifdef CONFIG_IWL4965_DEBUG
  4321. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4322. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4323. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4324. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4325. /* Alive notification via Rx interrupt will do the real work */
  4326. if (inta & CSR_INT_BIT_ALIVE)
  4327. IWL_DEBUG_ISR("Alive interrupt\n");
  4328. }
  4329. #endif
  4330. /* Safely ignore these bits for debug checks below */
  4331. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4332. /* HW RF KILL switch toggled */
  4333. if (inta & CSR_INT_BIT_RF_KILL) {
  4334. int hw_rf_kill = 0;
  4335. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4336. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4337. hw_rf_kill = 1;
  4338. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4339. "RF_KILL bit toggled to %s.\n",
  4340. hw_rf_kill ? "disable radio":"enable radio");
  4341. /* Queue restart only if RF_KILL switch was set to "kill"
  4342. * when we loaded driver, and is now set to "enable".
  4343. * After we're Alive, RF_KILL gets handled by
  4344. * iwl_rx_card_state_notif() */
  4345. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4346. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4347. queue_work(priv->workqueue, &priv->restart);
  4348. }
  4349. handled |= CSR_INT_BIT_RF_KILL;
  4350. }
  4351. /* Chip got too hot and stopped itself */
  4352. if (inta & CSR_INT_BIT_CT_KILL) {
  4353. IWL_ERROR("Microcode CT kill error detected.\n");
  4354. handled |= CSR_INT_BIT_CT_KILL;
  4355. }
  4356. /* Error detected by uCode */
  4357. if (inta & CSR_INT_BIT_SW_ERR) {
  4358. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4359. inta);
  4360. iwl4965_irq_handle_error(priv);
  4361. handled |= CSR_INT_BIT_SW_ERR;
  4362. }
  4363. /* uCode wakes up after power-down sleep */
  4364. if (inta & CSR_INT_BIT_WAKEUP) {
  4365. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4366. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4367. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4368. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4369. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4370. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4371. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4372. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4373. handled |= CSR_INT_BIT_WAKEUP;
  4374. }
  4375. /* All uCode command responses, including Tx command responses,
  4376. * Rx "responses" (frame-received notification), and other
  4377. * notifications from uCode come through here*/
  4378. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4379. iwl4965_rx_handle(priv);
  4380. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4381. }
  4382. if (inta & CSR_INT_BIT_FH_TX) {
  4383. IWL_DEBUG_ISR("Tx interrupt\n");
  4384. handled |= CSR_INT_BIT_FH_TX;
  4385. }
  4386. if (inta & ~handled)
  4387. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4388. if (inta & ~CSR_INI_SET_MASK) {
  4389. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4390. inta & ~CSR_INI_SET_MASK);
  4391. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4392. }
  4393. /* Re-enable all interrupts */
  4394. iwl4965_enable_interrupts(priv);
  4395. #ifdef CONFIG_IWL4965_DEBUG
  4396. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4397. inta = iwl4965_read32(priv, CSR_INT);
  4398. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4399. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4400. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4401. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4402. }
  4403. #endif
  4404. spin_unlock_irqrestore(&priv->lock, flags);
  4405. }
  4406. static irqreturn_t iwl4965_isr(int irq, void *data)
  4407. {
  4408. struct iwl4965_priv *priv = data;
  4409. u32 inta, inta_mask;
  4410. u32 inta_fh;
  4411. if (!priv)
  4412. return IRQ_NONE;
  4413. spin_lock(&priv->lock);
  4414. /* Disable (but don't clear!) interrupts here to avoid
  4415. * back-to-back ISRs and sporadic interrupts from our NIC.
  4416. * If we have something to service, the tasklet will re-enable ints.
  4417. * If we *don't* have something, we'll re-enable before leaving here. */
  4418. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4419. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4420. /* Discover which interrupts are active/pending */
  4421. inta = iwl4965_read32(priv, CSR_INT);
  4422. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4423. /* Ignore interrupt if there's nothing in NIC to service.
  4424. * This may be due to IRQ shared with another device,
  4425. * or due to sporadic interrupts thrown from our NIC. */
  4426. if (!inta && !inta_fh) {
  4427. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4428. goto none;
  4429. }
  4430. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4431. /* Hardware disappeared. It might have already raised
  4432. * an interrupt */
  4433. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4434. goto unplugged;
  4435. }
  4436. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4437. inta, inta_mask, inta_fh);
  4438. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4439. tasklet_schedule(&priv->irq_tasklet);
  4440. unplugged:
  4441. spin_unlock(&priv->lock);
  4442. return IRQ_HANDLED;
  4443. none:
  4444. /* re-enable interrupts here since we don't have anything to service. */
  4445. iwl4965_enable_interrupts(priv);
  4446. spin_unlock(&priv->lock);
  4447. return IRQ_NONE;
  4448. }
  4449. /************************** EEPROM BANDS ****************************
  4450. *
  4451. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4452. * EEPROM contents to the specific channel number supported for each
  4453. * band.
  4454. *
  4455. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4456. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4457. * The specific geography and calibration information for that channel
  4458. * is contained in the eeprom map itself.
  4459. *
  4460. * During init, we copy the eeprom information and channel map
  4461. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4462. *
  4463. * channel_map_24/52 provides the index in the channel_info array for a
  4464. * given channel. We have to have two separate maps as there is channel
  4465. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4466. * band_2
  4467. *
  4468. * A value of 0xff stored in the channel_map indicates that the channel
  4469. * is not supported by the hardware at all.
  4470. *
  4471. * A value of 0xfe in the channel_map indicates that the channel is not
  4472. * valid for Tx with the current hardware. This means that
  4473. * while the system can tune and receive on a given channel, it may not
  4474. * be able to associate or transmit any frames on that
  4475. * channel. There is no corresponding channel information for that
  4476. * entry.
  4477. *
  4478. *********************************************************************/
  4479. /* 2.4 GHz */
  4480. static const u8 iwl4965_eeprom_band_1[14] = {
  4481. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4482. };
  4483. /* 5.2 GHz bands */
  4484. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4485. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4486. };
  4487. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4488. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4489. };
  4490. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4491. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4492. };
  4493. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4494. 145, 149, 153, 157, 161, 165
  4495. };
  4496. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4497. 1, 2, 3, 4, 5, 6, 7
  4498. };
  4499. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4500. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4501. };
  4502. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4503. int band,
  4504. int *eeprom_ch_count,
  4505. const struct iwl4965_eeprom_channel
  4506. **eeprom_ch_info,
  4507. const u8 **eeprom_ch_index)
  4508. {
  4509. switch (band) {
  4510. case 1: /* 2.4GHz band */
  4511. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4512. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4513. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4514. break;
  4515. case 2: /* 4.9GHz band */
  4516. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4517. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4518. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4519. break;
  4520. case 3: /* 5.2GHz band */
  4521. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4522. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4523. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4524. break;
  4525. case 4: /* 5.5GHz band */
  4526. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4527. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4528. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4529. break;
  4530. case 5: /* 5.7GHz band */
  4531. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4532. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4533. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4534. break;
  4535. case 6: /* 2.4GHz FAT channels */
  4536. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4537. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4538. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4539. break;
  4540. case 7: /* 5 GHz FAT channels */
  4541. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4542. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4543. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4544. break;
  4545. default:
  4546. BUG();
  4547. return;
  4548. }
  4549. }
  4550. /**
  4551. * iwl4965_get_channel_info - Find driver's private channel info
  4552. *
  4553. * Based on band and channel number.
  4554. */
  4555. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4556. int phymode, u16 channel)
  4557. {
  4558. int i;
  4559. switch (phymode) {
  4560. case MODE_IEEE80211A:
  4561. for (i = 14; i < priv->channel_count; i++) {
  4562. if (priv->channel_info[i].channel == channel)
  4563. return &priv->channel_info[i];
  4564. }
  4565. break;
  4566. case MODE_IEEE80211B:
  4567. case MODE_IEEE80211G:
  4568. if (channel >= 1 && channel <= 14)
  4569. return &priv->channel_info[channel - 1];
  4570. break;
  4571. }
  4572. return NULL;
  4573. }
  4574. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4575. ? # x " " : "")
  4576. /**
  4577. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4578. */
  4579. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4580. {
  4581. int eeprom_ch_count = 0;
  4582. const u8 *eeprom_ch_index = NULL;
  4583. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4584. int band, ch;
  4585. struct iwl4965_channel_info *ch_info;
  4586. if (priv->channel_count) {
  4587. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4588. return 0;
  4589. }
  4590. if (priv->eeprom.version < 0x2f) {
  4591. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4592. priv->eeprom.version);
  4593. return -EINVAL;
  4594. }
  4595. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4596. priv->channel_count =
  4597. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4598. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4599. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4600. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4601. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4602. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4603. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4604. priv->channel_count, GFP_KERNEL);
  4605. if (!priv->channel_info) {
  4606. IWL_ERROR("Could not allocate channel_info\n");
  4607. priv->channel_count = 0;
  4608. return -ENOMEM;
  4609. }
  4610. ch_info = priv->channel_info;
  4611. /* Loop through the 5 EEPROM bands adding them in order to the
  4612. * channel map we maintain (that contains additional information than
  4613. * what just in the EEPROM) */
  4614. for (band = 1; band <= 5; band++) {
  4615. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4616. &eeprom_ch_info, &eeprom_ch_index);
  4617. /* Loop through each band adding each of the channels */
  4618. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4619. ch_info->channel = eeprom_ch_index[ch];
  4620. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4621. MODE_IEEE80211A;
  4622. /* permanently store EEPROM's channel regulatory flags
  4623. * and max power in channel info database. */
  4624. ch_info->eeprom = eeprom_ch_info[ch];
  4625. /* Copy the run-time flags so they are there even on
  4626. * invalid channels */
  4627. ch_info->flags = eeprom_ch_info[ch].flags;
  4628. if (!(is_channel_valid(ch_info))) {
  4629. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4630. "No traffic\n",
  4631. ch_info->channel,
  4632. ch_info->flags,
  4633. is_channel_a_band(ch_info) ?
  4634. "5.2" : "2.4");
  4635. ch_info++;
  4636. continue;
  4637. }
  4638. /* Initialize regulatory-based run-time data */
  4639. ch_info->max_power_avg = ch_info->curr_txpow =
  4640. eeprom_ch_info[ch].max_power_avg;
  4641. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4642. ch_info->min_power = 0;
  4643. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4644. " %ddBm): Ad-Hoc %ssupported\n",
  4645. ch_info->channel,
  4646. is_channel_a_band(ch_info) ?
  4647. "5.2" : "2.4",
  4648. CHECK_AND_PRINT(IBSS),
  4649. CHECK_AND_PRINT(ACTIVE),
  4650. CHECK_AND_PRINT(RADAR),
  4651. CHECK_AND_PRINT(WIDE),
  4652. CHECK_AND_PRINT(NARROW),
  4653. CHECK_AND_PRINT(DFS),
  4654. eeprom_ch_info[ch].flags,
  4655. eeprom_ch_info[ch].max_power_avg,
  4656. ((eeprom_ch_info[ch].
  4657. flags & EEPROM_CHANNEL_IBSS)
  4658. && !(eeprom_ch_info[ch].
  4659. flags & EEPROM_CHANNEL_RADAR))
  4660. ? "" : "not ");
  4661. /* Set the user_txpower_limit to the highest power
  4662. * supported by any channel */
  4663. if (eeprom_ch_info[ch].max_power_avg >
  4664. priv->user_txpower_limit)
  4665. priv->user_txpower_limit =
  4666. eeprom_ch_info[ch].max_power_avg;
  4667. ch_info++;
  4668. }
  4669. }
  4670. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4671. for (band = 6; band <= 7; band++) {
  4672. int phymode;
  4673. u8 fat_extension_chan;
  4674. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4675. &eeprom_ch_info, &eeprom_ch_index);
  4676. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4677. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4678. /* Loop through each band adding each of the channels */
  4679. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4680. if ((band == 6) &&
  4681. ((eeprom_ch_index[ch] == 5) ||
  4682. (eeprom_ch_index[ch] == 6) ||
  4683. (eeprom_ch_index[ch] == 7)))
  4684. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4685. else
  4686. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4687. /* Set up driver's info for lower half */
  4688. iwl4965_set_fat_chan_info(priv, phymode,
  4689. eeprom_ch_index[ch],
  4690. &(eeprom_ch_info[ch]),
  4691. fat_extension_chan);
  4692. /* Set up driver's info for upper half */
  4693. iwl4965_set_fat_chan_info(priv, phymode,
  4694. (eeprom_ch_index[ch] + 4),
  4695. &(eeprom_ch_info[ch]),
  4696. HT_IE_EXT_CHANNEL_BELOW);
  4697. }
  4698. }
  4699. return 0;
  4700. }
  4701. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4702. * sending probe req. This should be set long enough to hear probe responses
  4703. * from more than one AP. */
  4704. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4705. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4706. /* For faster active scanning, scan will move to the next channel if fewer than
  4707. * PLCP_QUIET_THRESH packets are heard on this channel within
  4708. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4709. * time if it's a quiet channel (nothing responded to our probe, and there's
  4710. * no other traffic).
  4711. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4712. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4713. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4714. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4715. * Must be set longer than active dwell time.
  4716. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4717. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4718. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4719. #define IWL_PASSIVE_DWELL_BASE (100)
  4720. #define IWL_CHANNEL_TUNE_TIME 5
  4721. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4722. {
  4723. if (phymode == MODE_IEEE80211A)
  4724. return IWL_ACTIVE_DWELL_TIME_52;
  4725. else
  4726. return IWL_ACTIVE_DWELL_TIME_24;
  4727. }
  4728. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4729. {
  4730. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4731. u16 passive = (phymode != MODE_IEEE80211A) ?
  4732. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4733. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4734. if (iwl4965_is_associated(priv)) {
  4735. /* If we're associated, we clamp the maximum passive
  4736. * dwell time to be 98% of the beacon interval (minus
  4737. * 2 * channel tune time) */
  4738. passive = priv->beacon_int;
  4739. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4740. passive = IWL_PASSIVE_DWELL_BASE;
  4741. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4742. }
  4743. if (passive <= active)
  4744. passive = active + 1;
  4745. return passive;
  4746. }
  4747. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4748. u8 is_active, u8 direct_mask,
  4749. struct iwl4965_scan_channel *scan_ch)
  4750. {
  4751. const struct ieee80211_channel *channels = NULL;
  4752. const struct ieee80211_hw_mode *hw_mode;
  4753. const struct iwl4965_channel_info *ch_info;
  4754. u16 passive_dwell = 0;
  4755. u16 active_dwell = 0;
  4756. int added, i;
  4757. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4758. if (!hw_mode)
  4759. return 0;
  4760. channels = hw_mode->channels;
  4761. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4762. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4763. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4764. if (channels[i].chan ==
  4765. le16_to_cpu(priv->active_rxon.channel)) {
  4766. if (iwl4965_is_associated(priv)) {
  4767. IWL_DEBUG_SCAN
  4768. ("Skipping current channel %d\n",
  4769. le16_to_cpu(priv->active_rxon.channel));
  4770. continue;
  4771. }
  4772. } else if (priv->only_active_channel)
  4773. continue;
  4774. scan_ch->channel = channels[i].chan;
  4775. ch_info = iwl4965_get_channel_info(priv, phymode,
  4776. scan_ch->channel);
  4777. if (!is_channel_valid(ch_info)) {
  4778. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4779. scan_ch->channel);
  4780. continue;
  4781. }
  4782. if (!is_active || is_channel_passive(ch_info) ||
  4783. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4784. scan_ch->type = 0; /* passive */
  4785. else
  4786. scan_ch->type = 1; /* active */
  4787. if (scan_ch->type & 1)
  4788. scan_ch->type |= (direct_mask << 1);
  4789. if (is_channel_narrow(ch_info))
  4790. scan_ch->type |= (1 << 7);
  4791. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4792. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4793. /* Set txpower levels to defaults */
  4794. scan_ch->tpc.dsp_atten = 110;
  4795. /* scan_pwr_info->tpc.dsp_atten; */
  4796. /*scan_pwr_info->tpc.tx_gain; */
  4797. if (phymode == MODE_IEEE80211A)
  4798. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4799. else {
  4800. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4801. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4802. * power level:
  4803. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4804. */
  4805. }
  4806. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4807. scan_ch->channel,
  4808. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4809. (scan_ch->type & 1) ?
  4810. active_dwell : passive_dwell);
  4811. scan_ch++;
  4812. added++;
  4813. }
  4814. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4815. return added;
  4816. }
  4817. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4818. {
  4819. int i, j;
  4820. for (i = 0; i < 3; i++) {
  4821. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4822. for (j = 0; j < hw_mode->num_channels; j++)
  4823. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4824. }
  4825. }
  4826. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4827. struct ieee80211_rate *rates)
  4828. {
  4829. int i;
  4830. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4831. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4832. rates[i].val = i; /* Rate scaling will work on indexes */
  4833. rates[i].val2 = i;
  4834. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4835. /* Only OFDM have the bits-per-symbol set */
  4836. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4837. rates[i].flags |= IEEE80211_RATE_OFDM;
  4838. else {
  4839. /*
  4840. * If CCK 1M then set rate flag to CCK else CCK_2
  4841. * which is CCK | PREAMBLE2
  4842. */
  4843. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4844. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4845. }
  4846. /* Set up which ones are basic rates... */
  4847. if (IWL_BASIC_RATES_MASK & (1 << i))
  4848. rates[i].flags |= IEEE80211_RATE_BASIC;
  4849. }
  4850. }
  4851. /**
  4852. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4853. */
  4854. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4855. {
  4856. struct iwl4965_channel_info *ch;
  4857. struct ieee80211_hw_mode *modes;
  4858. struct ieee80211_channel *channels;
  4859. struct ieee80211_channel *geo_ch;
  4860. struct ieee80211_rate *rates;
  4861. int i = 0;
  4862. enum {
  4863. A = 0,
  4864. B = 1,
  4865. G = 2,
  4866. };
  4867. int mode_count = 3;
  4868. if (priv->modes) {
  4869. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4870. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4871. return 0;
  4872. }
  4873. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4874. GFP_KERNEL);
  4875. if (!modes)
  4876. return -ENOMEM;
  4877. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4878. priv->channel_count, GFP_KERNEL);
  4879. if (!channels) {
  4880. kfree(modes);
  4881. return -ENOMEM;
  4882. }
  4883. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4884. GFP_KERNEL);
  4885. if (!rates) {
  4886. kfree(modes);
  4887. kfree(channels);
  4888. return -ENOMEM;
  4889. }
  4890. /* 0 = 802.11a
  4891. * 1 = 802.11b
  4892. * 2 = 802.11g
  4893. */
  4894. /* 5.2GHz channels start after the 2.4GHz channels */
  4895. modes[A].mode = MODE_IEEE80211A;
  4896. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4897. modes[A].rates = rates;
  4898. modes[A].num_rates = 8; /* just OFDM */
  4899. modes[A].rates = &rates[4];
  4900. modes[A].num_channels = 0;
  4901. #ifdef CONFIG_IWL4965_HT
  4902. iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
  4903. #endif
  4904. modes[B].mode = MODE_IEEE80211B;
  4905. modes[B].channels = channels;
  4906. modes[B].rates = rates;
  4907. modes[B].num_rates = 4; /* just CCK */
  4908. modes[B].num_channels = 0;
  4909. modes[G].mode = MODE_IEEE80211G;
  4910. modes[G].channels = channels;
  4911. modes[G].rates = rates;
  4912. modes[G].num_rates = 12; /* OFDM & CCK */
  4913. modes[G].num_channels = 0;
  4914. #ifdef CONFIG_IWL4965_HT
  4915. iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
  4916. #endif
  4917. priv->ieee_channels = channels;
  4918. priv->ieee_rates = rates;
  4919. iwl4965_init_hw_rates(priv, rates);
  4920. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4921. ch = &priv->channel_info[i];
  4922. if (!is_channel_valid(ch)) {
  4923. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4924. "skipping.\n",
  4925. ch->channel, is_channel_a_band(ch) ?
  4926. "5.2" : "2.4");
  4927. continue;
  4928. }
  4929. if (is_channel_a_band(ch)) {
  4930. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4931. } else {
  4932. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4933. modes[G].num_channels++;
  4934. }
  4935. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4936. geo_ch->chan = ch->channel;
  4937. geo_ch->power_level = ch->max_power_avg;
  4938. geo_ch->antenna_max = 0xff;
  4939. if (is_channel_valid(ch)) {
  4940. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4941. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4942. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4943. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4944. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4945. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4946. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4947. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4948. priv->max_channel_txpower_limit =
  4949. ch->max_power_avg;
  4950. }
  4951. geo_ch->val = geo_ch->flag;
  4952. }
  4953. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4954. printk(KERN_INFO DRV_NAME
  4955. ": Incorrectly detected BG card as ABG. Please send "
  4956. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4957. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4958. priv->is_abg = 0;
  4959. }
  4960. printk(KERN_INFO DRV_NAME
  4961. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4962. modes[G].num_channels, modes[A].num_channels);
  4963. /*
  4964. * NOTE: We register these in preference of order -- the
  4965. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4966. * a phymode based on rates or AP capabilities but seems to
  4967. * configure it purely on if the channel being configured
  4968. * is supported by a mode -- and the first match is taken
  4969. */
  4970. if (modes[G].num_channels)
  4971. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4972. if (modes[B].num_channels)
  4973. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4974. if (modes[A].num_channels)
  4975. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4976. priv->modes = modes;
  4977. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4978. return 0;
  4979. }
  4980. /******************************************************************************
  4981. *
  4982. * uCode download functions
  4983. *
  4984. ******************************************************************************/
  4985. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4986. {
  4987. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4988. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4989. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4990. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4991. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4992. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4993. }
  4994. /**
  4995. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4996. * looking at all data.
  4997. */
  4998. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4999. u32 len)
  5000. {
  5001. u32 val;
  5002. u32 save_len = len;
  5003. int rc = 0;
  5004. u32 errcnt;
  5005. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5006. rc = iwl4965_grab_nic_access(priv);
  5007. if (rc)
  5008. return rc;
  5009. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5010. errcnt = 0;
  5011. for (; len > 0; len -= sizeof(u32), image++) {
  5012. /* read data comes through single port, auto-incr addr */
  5013. /* NOTE: Use the debugless read so we don't flood kernel log
  5014. * if IWL_DL_IO is set */
  5015. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5016. if (val != le32_to_cpu(*image)) {
  5017. IWL_ERROR("uCode INST section is invalid at "
  5018. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5019. save_len - len, val, le32_to_cpu(*image));
  5020. rc = -EIO;
  5021. errcnt++;
  5022. if (errcnt >= 20)
  5023. break;
  5024. }
  5025. }
  5026. iwl4965_release_nic_access(priv);
  5027. if (!errcnt)
  5028. IWL_DEBUG_INFO
  5029. ("ucode image in INSTRUCTION memory is good\n");
  5030. return rc;
  5031. }
  5032. /**
  5033. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5034. * using sample data 100 bytes apart. If these sample points are good,
  5035. * it's a pretty good bet that everything between them is good, too.
  5036. */
  5037. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5038. {
  5039. u32 val;
  5040. int rc = 0;
  5041. u32 errcnt = 0;
  5042. u32 i;
  5043. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5044. rc = iwl4965_grab_nic_access(priv);
  5045. if (rc)
  5046. return rc;
  5047. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5048. /* read data comes through single port, auto-incr addr */
  5049. /* NOTE: Use the debugless read so we don't flood kernel log
  5050. * if IWL_DL_IO is set */
  5051. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5052. i + RTC_INST_LOWER_BOUND);
  5053. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5054. if (val != le32_to_cpu(*image)) {
  5055. #if 0 /* Enable this if you want to see details */
  5056. IWL_ERROR("uCode INST section is invalid at "
  5057. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5058. i, val, *image);
  5059. #endif
  5060. rc = -EIO;
  5061. errcnt++;
  5062. if (errcnt >= 3)
  5063. break;
  5064. }
  5065. }
  5066. iwl4965_release_nic_access(priv);
  5067. return rc;
  5068. }
  5069. /**
  5070. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5071. * and verify its contents
  5072. */
  5073. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5074. {
  5075. __le32 *image;
  5076. u32 len;
  5077. int rc = 0;
  5078. /* Try bootstrap */
  5079. image = (__le32 *)priv->ucode_boot.v_addr;
  5080. len = priv->ucode_boot.len;
  5081. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5082. if (rc == 0) {
  5083. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5084. return 0;
  5085. }
  5086. /* Try initialize */
  5087. image = (__le32 *)priv->ucode_init.v_addr;
  5088. len = priv->ucode_init.len;
  5089. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5090. if (rc == 0) {
  5091. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5092. return 0;
  5093. }
  5094. /* Try runtime/protocol */
  5095. image = (__le32 *)priv->ucode_code.v_addr;
  5096. len = priv->ucode_code.len;
  5097. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5098. if (rc == 0) {
  5099. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5100. return 0;
  5101. }
  5102. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5103. /* Since nothing seems to match, show first several data entries in
  5104. * instruction SRAM, so maybe visual inspection will give a clue.
  5105. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5106. image = (__le32 *)priv->ucode_boot.v_addr;
  5107. len = priv->ucode_boot.len;
  5108. rc = iwl4965_verify_inst_full(priv, image, len);
  5109. return rc;
  5110. }
  5111. /* check contents of special bootstrap uCode SRAM */
  5112. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5113. {
  5114. __le32 *image = priv->ucode_boot.v_addr;
  5115. u32 len = priv->ucode_boot.len;
  5116. u32 reg;
  5117. u32 val;
  5118. IWL_DEBUG_INFO("Begin verify bsm\n");
  5119. /* verify BSM SRAM contents */
  5120. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5121. for (reg = BSM_SRAM_LOWER_BOUND;
  5122. reg < BSM_SRAM_LOWER_BOUND + len;
  5123. reg += sizeof(u32), image ++) {
  5124. val = iwl4965_read_prph(priv, reg);
  5125. if (val != le32_to_cpu(*image)) {
  5126. IWL_ERROR("BSM uCode verification failed at "
  5127. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5128. BSM_SRAM_LOWER_BOUND,
  5129. reg - BSM_SRAM_LOWER_BOUND, len,
  5130. val, le32_to_cpu(*image));
  5131. return -EIO;
  5132. }
  5133. }
  5134. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5135. return 0;
  5136. }
  5137. /**
  5138. * iwl4965_load_bsm - Load bootstrap instructions
  5139. *
  5140. * BSM operation:
  5141. *
  5142. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5143. * in special SRAM that does not power down during RFKILL. When powering back
  5144. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5145. * the bootstrap program into the on-board processor, and starts it.
  5146. *
  5147. * The bootstrap program loads (via DMA) instructions and data for a new
  5148. * program from host DRAM locations indicated by the host driver in the
  5149. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5150. * automatically.
  5151. *
  5152. * When initializing the NIC, the host driver points the BSM to the
  5153. * "initialize" uCode image. This uCode sets up some internal data, then
  5154. * notifies host via "initialize alive" that it is complete.
  5155. *
  5156. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5157. * normal runtime uCode instructions and a backup uCode data cache buffer
  5158. * (filled initially with starting data values for the on-board processor),
  5159. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5160. * which begins normal operation.
  5161. *
  5162. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5163. * the backup data cache in DRAM before SRAM is powered down.
  5164. *
  5165. * When powering back up, the BSM loads the bootstrap program. This reloads
  5166. * the runtime uCode instructions and the backup data cache into SRAM,
  5167. * and re-launches the runtime uCode from where it left off.
  5168. */
  5169. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5170. {
  5171. __le32 *image = priv->ucode_boot.v_addr;
  5172. u32 len = priv->ucode_boot.len;
  5173. dma_addr_t pinst;
  5174. dma_addr_t pdata;
  5175. u32 inst_len;
  5176. u32 data_len;
  5177. int rc;
  5178. int i;
  5179. u32 done;
  5180. u32 reg_offset;
  5181. IWL_DEBUG_INFO("Begin load bsm\n");
  5182. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5183. if (len > IWL_MAX_BSM_SIZE)
  5184. return -EINVAL;
  5185. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5186. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5187. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5188. * after the "initialize" uCode has run, to point to
  5189. * runtime/protocol instructions and backup data cache. */
  5190. pinst = priv->ucode_init.p_addr >> 4;
  5191. pdata = priv->ucode_init_data.p_addr >> 4;
  5192. inst_len = priv->ucode_init.len;
  5193. data_len = priv->ucode_init_data.len;
  5194. rc = iwl4965_grab_nic_access(priv);
  5195. if (rc)
  5196. return rc;
  5197. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5198. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5199. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5200. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5201. /* Fill BSM memory with bootstrap instructions */
  5202. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5203. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5204. reg_offset += sizeof(u32), image++)
  5205. _iwl4965_write_prph(priv, reg_offset,
  5206. le32_to_cpu(*image));
  5207. rc = iwl4965_verify_bsm(priv);
  5208. if (rc) {
  5209. iwl4965_release_nic_access(priv);
  5210. return rc;
  5211. }
  5212. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5213. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5214. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5215. RTC_INST_LOWER_BOUND);
  5216. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5217. /* Load bootstrap code into instruction SRAM now,
  5218. * to prepare to load "initialize" uCode */
  5219. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5220. BSM_WR_CTRL_REG_BIT_START);
  5221. /* Wait for load of bootstrap uCode to finish */
  5222. for (i = 0; i < 100; i++) {
  5223. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5224. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5225. break;
  5226. udelay(10);
  5227. }
  5228. if (i < 100)
  5229. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5230. else {
  5231. IWL_ERROR("BSM write did not complete!\n");
  5232. return -EIO;
  5233. }
  5234. /* Enable future boot loads whenever power management unit triggers it
  5235. * (e.g. when powering back up after power-save shutdown) */
  5236. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5237. BSM_WR_CTRL_REG_BIT_START_EN);
  5238. iwl4965_release_nic_access(priv);
  5239. return 0;
  5240. }
  5241. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5242. {
  5243. /* Remove all resets to allow NIC to operate */
  5244. iwl4965_write32(priv, CSR_RESET, 0);
  5245. }
  5246. /**
  5247. * iwl4965_read_ucode - Read uCode images from disk file.
  5248. *
  5249. * Copy into buffers for card to fetch via bus-mastering
  5250. */
  5251. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5252. {
  5253. struct iwl4965_ucode *ucode;
  5254. int ret;
  5255. const struct firmware *ucode_raw;
  5256. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5257. u8 *src;
  5258. size_t len;
  5259. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5260. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5261. * request_firmware() is synchronous, file is in memory on return. */
  5262. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5263. if (ret < 0) {
  5264. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5265. name, ret);
  5266. goto error;
  5267. }
  5268. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5269. name, ucode_raw->size);
  5270. /* Make sure that we got at least our header! */
  5271. if (ucode_raw->size < sizeof(*ucode)) {
  5272. IWL_ERROR("File size way too small!\n");
  5273. ret = -EINVAL;
  5274. goto err_release;
  5275. }
  5276. /* Data from ucode file: header followed by uCode images */
  5277. ucode = (void *)ucode_raw->data;
  5278. ver = le32_to_cpu(ucode->ver);
  5279. inst_size = le32_to_cpu(ucode->inst_size);
  5280. data_size = le32_to_cpu(ucode->data_size);
  5281. init_size = le32_to_cpu(ucode->init_size);
  5282. init_data_size = le32_to_cpu(ucode->init_data_size);
  5283. boot_size = le32_to_cpu(ucode->boot_size);
  5284. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5285. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5286. inst_size);
  5287. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5288. data_size);
  5289. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5290. init_size);
  5291. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5292. init_data_size);
  5293. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5294. boot_size);
  5295. /* Verify size of file vs. image size info in file's header */
  5296. if (ucode_raw->size < sizeof(*ucode) +
  5297. inst_size + data_size + init_size +
  5298. init_data_size + boot_size) {
  5299. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5300. (int)ucode_raw->size);
  5301. ret = -EINVAL;
  5302. goto err_release;
  5303. }
  5304. /* Verify that uCode images will fit in card's SRAM */
  5305. if (inst_size > IWL_MAX_INST_SIZE) {
  5306. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5307. inst_size);
  5308. ret = -EINVAL;
  5309. goto err_release;
  5310. }
  5311. if (data_size > IWL_MAX_DATA_SIZE) {
  5312. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5313. data_size);
  5314. ret = -EINVAL;
  5315. goto err_release;
  5316. }
  5317. if (init_size > IWL_MAX_INST_SIZE) {
  5318. IWL_DEBUG_INFO
  5319. ("uCode init instr len %d too large to fit in\n",
  5320. init_size);
  5321. ret = -EINVAL;
  5322. goto err_release;
  5323. }
  5324. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5325. IWL_DEBUG_INFO
  5326. ("uCode init data len %d too large to fit in\n",
  5327. init_data_size);
  5328. ret = -EINVAL;
  5329. goto err_release;
  5330. }
  5331. if (boot_size > IWL_MAX_BSM_SIZE) {
  5332. IWL_DEBUG_INFO
  5333. ("uCode boot instr len %d too large to fit in\n",
  5334. boot_size);
  5335. ret = -EINVAL;
  5336. goto err_release;
  5337. }
  5338. /* Allocate ucode buffers for card's bus-master loading ... */
  5339. /* Runtime instructions and 2 copies of data:
  5340. * 1) unmodified from disk
  5341. * 2) backup cache for save/restore during power-downs */
  5342. priv->ucode_code.len = inst_size;
  5343. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5344. priv->ucode_data.len = data_size;
  5345. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5346. priv->ucode_data_backup.len = data_size;
  5347. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5348. /* Initialization instructions and data */
  5349. if (init_size && init_data_size) {
  5350. priv->ucode_init.len = init_size;
  5351. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5352. priv->ucode_init_data.len = init_data_size;
  5353. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5354. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5355. goto err_pci_alloc;
  5356. }
  5357. /* Bootstrap (instructions only, no data) */
  5358. if (boot_size) {
  5359. priv->ucode_boot.len = boot_size;
  5360. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5361. if (!priv->ucode_boot.v_addr)
  5362. goto err_pci_alloc;
  5363. }
  5364. /* Copy images into buffers for card's bus-master reads ... */
  5365. /* Runtime instructions (first block of data in file) */
  5366. src = &ucode->data[0];
  5367. len = priv->ucode_code.len;
  5368. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5369. memcpy(priv->ucode_code.v_addr, src, len);
  5370. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5371. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5372. /* Runtime data (2nd block)
  5373. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5374. src = &ucode->data[inst_size];
  5375. len = priv->ucode_data.len;
  5376. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5377. memcpy(priv->ucode_data.v_addr, src, len);
  5378. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5379. /* Initialization instructions (3rd block) */
  5380. if (init_size) {
  5381. src = &ucode->data[inst_size + data_size];
  5382. len = priv->ucode_init.len;
  5383. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5384. len);
  5385. memcpy(priv->ucode_init.v_addr, src, len);
  5386. }
  5387. /* Initialization data (4th block) */
  5388. if (init_data_size) {
  5389. src = &ucode->data[inst_size + data_size + init_size];
  5390. len = priv->ucode_init_data.len;
  5391. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5392. len);
  5393. memcpy(priv->ucode_init_data.v_addr, src, len);
  5394. }
  5395. /* Bootstrap instructions (5th block) */
  5396. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5397. len = priv->ucode_boot.len;
  5398. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5399. memcpy(priv->ucode_boot.v_addr, src, len);
  5400. /* We have our copies now, allow OS release its copies */
  5401. release_firmware(ucode_raw);
  5402. return 0;
  5403. err_pci_alloc:
  5404. IWL_ERROR("failed to allocate pci memory\n");
  5405. ret = -ENOMEM;
  5406. iwl4965_dealloc_ucode_pci(priv);
  5407. err_release:
  5408. release_firmware(ucode_raw);
  5409. error:
  5410. return ret;
  5411. }
  5412. /**
  5413. * iwl4965_set_ucode_ptrs - Set uCode address location
  5414. *
  5415. * Tell initialization uCode where to find runtime uCode.
  5416. *
  5417. * BSM registers initially contain pointers to initialization uCode.
  5418. * We need to replace them to load runtime uCode inst and data,
  5419. * and to save runtime data when powering down.
  5420. */
  5421. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5422. {
  5423. dma_addr_t pinst;
  5424. dma_addr_t pdata;
  5425. int rc = 0;
  5426. unsigned long flags;
  5427. /* bits 35:4 for 4965 */
  5428. pinst = priv->ucode_code.p_addr >> 4;
  5429. pdata = priv->ucode_data_backup.p_addr >> 4;
  5430. spin_lock_irqsave(&priv->lock, flags);
  5431. rc = iwl4965_grab_nic_access(priv);
  5432. if (rc) {
  5433. spin_unlock_irqrestore(&priv->lock, flags);
  5434. return rc;
  5435. }
  5436. /* Tell bootstrap uCode where to find image to load */
  5437. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5438. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5439. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5440. priv->ucode_data.len);
  5441. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5442. * that all new ptr/size info is in place */
  5443. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5444. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5445. iwl4965_release_nic_access(priv);
  5446. spin_unlock_irqrestore(&priv->lock, flags);
  5447. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5448. return rc;
  5449. }
  5450. /**
  5451. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5452. *
  5453. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5454. *
  5455. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5456. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5457. * (3945 does not contain this data).
  5458. *
  5459. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5460. */
  5461. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5462. {
  5463. /* Check alive response for "valid" sign from uCode */
  5464. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5465. /* We had an error bringing up the hardware, so take it
  5466. * all the way back down so we can try again */
  5467. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5468. goto restart;
  5469. }
  5470. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5471. * This is a paranoid check, because we would not have gotten the
  5472. * "initialize" alive if code weren't properly loaded. */
  5473. if (iwl4965_verify_ucode(priv)) {
  5474. /* Runtime instruction load was bad;
  5475. * take it all the way back down so we can try again */
  5476. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5477. goto restart;
  5478. }
  5479. /* Calculate temperature */
  5480. priv->temperature = iwl4965_get_temperature(priv);
  5481. /* Send pointers to protocol/runtime uCode image ... init code will
  5482. * load and launch runtime uCode, which will send us another "Alive"
  5483. * notification. */
  5484. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5485. if (iwl4965_set_ucode_ptrs(priv)) {
  5486. /* Runtime instruction load won't happen;
  5487. * take it all the way back down so we can try again */
  5488. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5489. goto restart;
  5490. }
  5491. return;
  5492. restart:
  5493. queue_work(priv->workqueue, &priv->restart);
  5494. }
  5495. /**
  5496. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5497. * from protocol/runtime uCode (initialization uCode's
  5498. * Alive gets handled by iwl4965_init_alive_start()).
  5499. */
  5500. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5501. {
  5502. int rc = 0;
  5503. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5504. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5505. /* We had an error bringing up the hardware, so take it
  5506. * all the way back down so we can try again */
  5507. IWL_DEBUG_INFO("Alive failed.\n");
  5508. goto restart;
  5509. }
  5510. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5511. * This is a paranoid check, because we would not have gotten the
  5512. * "runtime" alive if code weren't properly loaded. */
  5513. if (iwl4965_verify_ucode(priv)) {
  5514. /* Runtime instruction load was bad;
  5515. * take it all the way back down so we can try again */
  5516. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5517. goto restart;
  5518. }
  5519. iwl4965_clear_stations_table(priv);
  5520. rc = iwl4965_alive_notify(priv);
  5521. if (rc) {
  5522. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5523. rc);
  5524. goto restart;
  5525. }
  5526. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5527. set_bit(STATUS_ALIVE, &priv->status);
  5528. /* Clear out the uCode error bit if it is set */
  5529. clear_bit(STATUS_FW_ERROR, &priv->status);
  5530. rc = iwl4965_init_channel_map(priv);
  5531. if (rc) {
  5532. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5533. return;
  5534. }
  5535. iwl4965_init_geos(priv);
  5536. iwl4965_reset_channel_flag(priv);
  5537. if (iwl4965_is_rfkill(priv))
  5538. return;
  5539. ieee80211_start_queues(priv->hw);
  5540. priv->active_rate = priv->rates_mask;
  5541. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5542. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5543. if (iwl4965_is_associated(priv)) {
  5544. struct iwl4965_rxon_cmd *active_rxon =
  5545. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5546. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5547. sizeof(priv->staging_rxon));
  5548. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5549. } else {
  5550. /* Initialize our rx_config data */
  5551. iwl4965_connection_init_rx_config(priv);
  5552. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5553. }
  5554. /* Configure Bluetooth device coexistence support */
  5555. iwl4965_send_bt_config(priv);
  5556. /* Configure the adapter for unassociated operation */
  5557. iwl4965_commit_rxon(priv);
  5558. /* At this point, the NIC is initialized and operational */
  5559. priv->notif_missed_beacons = 0;
  5560. set_bit(STATUS_READY, &priv->status);
  5561. iwl4965_rf_kill_ct_config(priv);
  5562. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5563. wake_up_interruptible(&priv->wait_command_queue);
  5564. if (priv->error_recovering)
  5565. iwl4965_error_recovery(priv);
  5566. return;
  5567. restart:
  5568. queue_work(priv->workqueue, &priv->restart);
  5569. }
  5570. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5571. static void __iwl4965_down(struct iwl4965_priv *priv)
  5572. {
  5573. unsigned long flags;
  5574. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5575. struct ieee80211_conf *conf = NULL;
  5576. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5577. conf = ieee80211_get_hw_conf(priv->hw);
  5578. if (!exit_pending)
  5579. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5580. iwl4965_clear_stations_table(priv);
  5581. /* Unblock any waiting calls */
  5582. wake_up_interruptible_all(&priv->wait_command_queue);
  5583. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5584. * exiting the module */
  5585. if (!exit_pending)
  5586. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5587. /* stop and reset the on-board processor */
  5588. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5589. /* tell the device to stop sending interrupts */
  5590. iwl4965_disable_interrupts(priv);
  5591. if (priv->mac80211_registered)
  5592. ieee80211_stop_queues(priv->hw);
  5593. /* If we have not previously called iwl4965_init() then
  5594. * clear all bits but the RF Kill and SUSPEND bits and return */
  5595. if (!iwl4965_is_init(priv)) {
  5596. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5597. STATUS_RF_KILL_HW |
  5598. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5599. STATUS_RF_KILL_SW |
  5600. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5601. STATUS_IN_SUSPEND;
  5602. goto exit;
  5603. }
  5604. /* ...otherwise clear out all the status bits but the RF Kill and
  5605. * SUSPEND bits and continue taking the NIC down. */
  5606. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5607. STATUS_RF_KILL_HW |
  5608. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5609. STATUS_RF_KILL_SW |
  5610. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5611. STATUS_IN_SUSPEND |
  5612. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5613. STATUS_FW_ERROR;
  5614. spin_lock_irqsave(&priv->lock, flags);
  5615. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5616. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5617. spin_unlock_irqrestore(&priv->lock, flags);
  5618. iwl4965_hw_txq_ctx_stop(priv);
  5619. iwl4965_hw_rxq_stop(priv);
  5620. spin_lock_irqsave(&priv->lock, flags);
  5621. if (!iwl4965_grab_nic_access(priv)) {
  5622. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5623. APMG_CLK_VAL_DMA_CLK_RQT);
  5624. iwl4965_release_nic_access(priv);
  5625. }
  5626. spin_unlock_irqrestore(&priv->lock, flags);
  5627. udelay(5);
  5628. iwl4965_hw_nic_stop_master(priv);
  5629. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5630. iwl4965_hw_nic_reset(priv);
  5631. exit:
  5632. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5633. if (priv->ibss_beacon)
  5634. dev_kfree_skb(priv->ibss_beacon);
  5635. priv->ibss_beacon = NULL;
  5636. /* clear out any free frames */
  5637. iwl4965_clear_free_frames(priv);
  5638. }
  5639. static void iwl4965_down(struct iwl4965_priv *priv)
  5640. {
  5641. mutex_lock(&priv->mutex);
  5642. __iwl4965_down(priv);
  5643. mutex_unlock(&priv->mutex);
  5644. iwl4965_cancel_deferred_work(priv);
  5645. }
  5646. #define MAX_HW_RESTARTS 5
  5647. static int __iwl4965_up(struct iwl4965_priv *priv)
  5648. {
  5649. int rc, i;
  5650. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5651. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5652. return -EIO;
  5653. }
  5654. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5655. IWL_WARNING("Radio disabled by SW RF kill (module "
  5656. "parameter)\n");
  5657. return -ENODEV;
  5658. }
  5659. /* If platform's RF_KILL switch is NOT set to KILL */
  5660. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5661. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5662. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5663. else {
  5664. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5665. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5666. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5667. return -ENODEV;
  5668. }
  5669. }
  5670. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5671. IWL_ERROR("ucode not available for device bringup\n");
  5672. return -EIO;
  5673. }
  5674. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5675. rc = iwl4965_hw_nic_init(priv);
  5676. if (rc) {
  5677. IWL_ERROR("Unable to int nic\n");
  5678. return rc;
  5679. }
  5680. /* make sure rfkill handshake bits are cleared */
  5681. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5682. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5683. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5684. /* clear (again), then enable host interrupts */
  5685. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5686. iwl4965_enable_interrupts(priv);
  5687. /* really make sure rfkill handshake bits are cleared */
  5688. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5689. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5690. /* Copy original ucode data image from disk into backup cache.
  5691. * This will be used to initialize the on-board processor's
  5692. * data SRAM for a clean start when the runtime program first loads. */
  5693. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5694. priv->ucode_data.len);
  5695. /* We return success when we resume from suspend and rf_kill is on. */
  5696. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5697. return 0;
  5698. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5699. iwl4965_clear_stations_table(priv);
  5700. /* load bootstrap state machine,
  5701. * load bootstrap program into processor's memory,
  5702. * prepare to load the "initialize" uCode */
  5703. rc = iwl4965_load_bsm(priv);
  5704. if (rc) {
  5705. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5706. continue;
  5707. }
  5708. /* start card; "initialize" will load runtime ucode */
  5709. iwl4965_nic_start(priv);
  5710. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5711. return 0;
  5712. }
  5713. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5714. __iwl4965_down(priv);
  5715. /* tried to restart and config the device for as long as our
  5716. * patience could withstand */
  5717. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5718. return -EIO;
  5719. }
  5720. /*****************************************************************************
  5721. *
  5722. * Workqueue callbacks
  5723. *
  5724. *****************************************************************************/
  5725. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5726. {
  5727. struct iwl4965_priv *priv =
  5728. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5729. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5730. return;
  5731. mutex_lock(&priv->mutex);
  5732. iwl4965_init_alive_start(priv);
  5733. mutex_unlock(&priv->mutex);
  5734. }
  5735. static void iwl4965_bg_alive_start(struct work_struct *data)
  5736. {
  5737. struct iwl4965_priv *priv =
  5738. container_of(data, struct iwl4965_priv, alive_start.work);
  5739. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5740. return;
  5741. mutex_lock(&priv->mutex);
  5742. iwl4965_alive_start(priv);
  5743. mutex_unlock(&priv->mutex);
  5744. }
  5745. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5746. {
  5747. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5748. wake_up_interruptible(&priv->wait_command_queue);
  5749. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5750. return;
  5751. mutex_lock(&priv->mutex);
  5752. if (!iwl4965_is_rfkill(priv)) {
  5753. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5754. "HW and/or SW RF Kill no longer active, restarting "
  5755. "device\n");
  5756. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5757. queue_work(priv->workqueue, &priv->restart);
  5758. } else {
  5759. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5760. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5761. "disabled by SW switch\n");
  5762. else
  5763. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5764. "Kill switch must be turned off for "
  5765. "wireless networking to work.\n");
  5766. }
  5767. mutex_unlock(&priv->mutex);
  5768. }
  5769. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5770. static void iwl4965_bg_scan_check(struct work_struct *data)
  5771. {
  5772. struct iwl4965_priv *priv =
  5773. container_of(data, struct iwl4965_priv, scan_check.work);
  5774. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5775. return;
  5776. mutex_lock(&priv->mutex);
  5777. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5778. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5779. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5780. "Scan completion watchdog resetting adapter (%dms)\n",
  5781. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5782. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5783. iwl4965_send_scan_abort(priv);
  5784. }
  5785. mutex_unlock(&priv->mutex);
  5786. }
  5787. static void iwl4965_bg_request_scan(struct work_struct *data)
  5788. {
  5789. struct iwl4965_priv *priv =
  5790. container_of(data, struct iwl4965_priv, request_scan);
  5791. struct iwl4965_host_cmd cmd = {
  5792. .id = REPLY_SCAN_CMD,
  5793. .len = sizeof(struct iwl4965_scan_cmd),
  5794. .meta.flags = CMD_SIZE_HUGE,
  5795. };
  5796. int rc = 0;
  5797. struct iwl4965_scan_cmd *scan;
  5798. struct ieee80211_conf *conf = NULL;
  5799. u8 direct_mask;
  5800. int phymode;
  5801. conf = ieee80211_get_hw_conf(priv->hw);
  5802. mutex_lock(&priv->mutex);
  5803. if (!iwl4965_is_ready(priv)) {
  5804. IWL_WARNING("request scan called when driver not ready.\n");
  5805. goto done;
  5806. }
  5807. /* Make sure the scan wasn't cancelled before this queued work
  5808. * was given the chance to run... */
  5809. if (!test_bit(STATUS_SCANNING, &priv->status))
  5810. goto done;
  5811. /* This should never be called or scheduled if there is currently
  5812. * a scan active in the hardware. */
  5813. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5814. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5815. "Ignoring second request.\n");
  5816. rc = -EIO;
  5817. goto done;
  5818. }
  5819. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5820. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5821. goto done;
  5822. }
  5823. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5824. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5825. goto done;
  5826. }
  5827. if (iwl4965_is_rfkill(priv)) {
  5828. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5829. goto done;
  5830. }
  5831. if (!test_bit(STATUS_READY, &priv->status)) {
  5832. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5833. goto done;
  5834. }
  5835. if (!priv->scan_bands) {
  5836. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5837. goto done;
  5838. }
  5839. if (!priv->scan) {
  5840. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5841. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5842. if (!priv->scan) {
  5843. rc = -ENOMEM;
  5844. goto done;
  5845. }
  5846. }
  5847. scan = priv->scan;
  5848. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5849. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5850. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5851. if (iwl4965_is_associated(priv)) {
  5852. u16 interval = 0;
  5853. u32 extra;
  5854. u32 suspend_time = 100;
  5855. u32 scan_suspend_time = 100;
  5856. unsigned long flags;
  5857. IWL_DEBUG_INFO("Scanning while associated...\n");
  5858. spin_lock_irqsave(&priv->lock, flags);
  5859. interval = priv->beacon_int;
  5860. spin_unlock_irqrestore(&priv->lock, flags);
  5861. scan->suspend_time = 0;
  5862. scan->max_out_time = cpu_to_le32(200 * 1024);
  5863. if (!interval)
  5864. interval = suspend_time;
  5865. extra = (suspend_time / interval) << 22;
  5866. scan_suspend_time = (extra |
  5867. ((suspend_time % interval) * 1024));
  5868. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5869. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5870. scan_suspend_time, interval);
  5871. }
  5872. /* We should add the ability for user to lock to PASSIVE ONLY */
  5873. if (priv->one_direct_scan) {
  5874. IWL_DEBUG_SCAN
  5875. ("Kicking off one direct scan for '%s'\n",
  5876. iwl4965_escape_essid(priv->direct_ssid,
  5877. priv->direct_ssid_len));
  5878. scan->direct_scan[0].id = WLAN_EID_SSID;
  5879. scan->direct_scan[0].len = priv->direct_ssid_len;
  5880. memcpy(scan->direct_scan[0].ssid,
  5881. priv->direct_ssid, priv->direct_ssid_len);
  5882. direct_mask = 1;
  5883. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5884. scan->direct_scan[0].id = WLAN_EID_SSID;
  5885. scan->direct_scan[0].len = priv->essid_len;
  5886. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5887. direct_mask = 1;
  5888. } else
  5889. direct_mask = 0;
  5890. /* We don't build a direct scan probe request; the uCode will do
  5891. * that based on the direct_mask added to each channel entry */
  5892. scan->tx_cmd.len = cpu_to_le16(
  5893. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5894. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5895. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5896. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5897. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5898. /* flags + rate selection */
  5899. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5900. switch (priv->scan_bands) {
  5901. case 2:
  5902. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5903. scan->tx_cmd.rate_n_flags =
  5904. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5905. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5906. scan->good_CRC_th = 0;
  5907. phymode = MODE_IEEE80211G;
  5908. break;
  5909. case 1:
  5910. scan->tx_cmd.rate_n_flags =
  5911. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5912. RATE_MCS_ANT_B_MSK);
  5913. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5914. phymode = MODE_IEEE80211A;
  5915. break;
  5916. default:
  5917. IWL_WARNING("Invalid scan band count\n");
  5918. goto done;
  5919. }
  5920. /* select Rx chains */
  5921. /* Force use of chains B and C (0x6) for scan Rx.
  5922. * Avoid A (0x1) because of its off-channel reception on A-band.
  5923. * MIMO is not used here, but value is required to make uCode happy. */
  5924. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5925. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5926. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5927. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5928. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5929. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5930. if (direct_mask)
  5931. IWL_DEBUG_SCAN
  5932. ("Initiating direct scan for %s.\n",
  5933. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5934. else
  5935. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5936. scan->channel_count =
  5937. iwl4965_get_channels_for_scan(
  5938. priv, phymode, 1, /* active */
  5939. direct_mask,
  5940. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5941. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5942. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5943. cmd.data = scan;
  5944. scan->len = cpu_to_le16(cmd.len);
  5945. set_bit(STATUS_SCAN_HW, &priv->status);
  5946. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5947. if (rc)
  5948. goto done;
  5949. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5950. IWL_SCAN_CHECK_WATCHDOG);
  5951. mutex_unlock(&priv->mutex);
  5952. return;
  5953. done:
  5954. /* inform mac80211 scan aborted */
  5955. queue_work(priv->workqueue, &priv->scan_completed);
  5956. mutex_unlock(&priv->mutex);
  5957. }
  5958. static void iwl4965_bg_up(struct work_struct *data)
  5959. {
  5960. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5961. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5962. return;
  5963. mutex_lock(&priv->mutex);
  5964. __iwl4965_up(priv);
  5965. mutex_unlock(&priv->mutex);
  5966. }
  5967. static void iwl4965_bg_restart(struct work_struct *data)
  5968. {
  5969. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5970. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5971. return;
  5972. iwl4965_down(priv);
  5973. queue_work(priv->workqueue, &priv->up);
  5974. }
  5975. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5976. {
  5977. struct iwl4965_priv *priv =
  5978. container_of(data, struct iwl4965_priv, rx_replenish);
  5979. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5980. return;
  5981. mutex_lock(&priv->mutex);
  5982. iwl4965_rx_replenish(priv);
  5983. mutex_unlock(&priv->mutex);
  5984. }
  5985. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5986. static void iwl4965_bg_post_associate(struct work_struct *data)
  5987. {
  5988. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5989. post_associate.work);
  5990. int rc = 0;
  5991. struct ieee80211_conf *conf = NULL;
  5992. DECLARE_MAC_BUF(mac);
  5993. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5994. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5995. return;
  5996. }
  5997. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5998. priv->assoc_id,
  5999. print_mac(mac, priv->active_rxon.bssid_addr));
  6000. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6001. return;
  6002. mutex_lock(&priv->mutex);
  6003. if (!priv->vif || !priv->is_open) {
  6004. mutex_unlock(&priv->mutex);
  6005. return;
  6006. }
  6007. iwl4965_scan_cancel_timeout(priv, 200);
  6008. conf = ieee80211_get_hw_conf(priv->hw);
  6009. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6010. iwl4965_commit_rxon(priv);
  6011. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6012. iwl4965_setup_rxon_timing(priv);
  6013. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6014. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6015. if (rc)
  6016. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6017. "Attempting to continue.\n");
  6018. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6019. #ifdef CONFIG_IWL4965_HT
  6020. if (priv->current_ht_config.is_ht)
  6021. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  6022. #endif /* CONFIG_IWL4965_HT*/
  6023. iwl4965_set_rxon_chain(priv);
  6024. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6025. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6026. priv->assoc_id, priv->beacon_int);
  6027. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6028. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6029. else
  6030. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6031. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6032. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6033. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6034. else
  6035. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6036. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6037. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6038. }
  6039. iwl4965_commit_rxon(priv);
  6040. switch (priv->iw_mode) {
  6041. case IEEE80211_IF_TYPE_STA:
  6042. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6043. break;
  6044. case IEEE80211_IF_TYPE_IBSS:
  6045. /* clear out the station table */
  6046. iwl4965_clear_stations_table(priv);
  6047. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6048. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6049. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6050. iwl4965_send_beacon_cmd(priv);
  6051. break;
  6052. default:
  6053. IWL_ERROR("%s Should not be called in %d mode\n",
  6054. __FUNCTION__, priv->iw_mode);
  6055. break;
  6056. }
  6057. iwl4965_sequence_reset(priv);
  6058. #ifdef CONFIG_IWL4965_SENSITIVITY
  6059. /* Enable Rx differential gain and sensitivity calibrations */
  6060. iwl4965_chain_noise_reset(priv);
  6061. priv->start_calib = 1;
  6062. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6063. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6064. priv->assoc_station_added = 1;
  6065. #ifdef CONFIG_IWL4965_QOS
  6066. iwl4965_activate_qos(priv, 0);
  6067. #endif /* CONFIG_IWL4965_QOS */
  6068. /* we have just associated, don't start scan too early */
  6069. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6070. mutex_unlock(&priv->mutex);
  6071. }
  6072. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6073. {
  6074. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6075. if (!iwl4965_is_ready(priv))
  6076. return;
  6077. mutex_lock(&priv->mutex);
  6078. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6079. iwl4965_send_scan_abort(priv);
  6080. mutex_unlock(&priv->mutex);
  6081. }
  6082. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  6083. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6084. {
  6085. struct iwl4965_priv *priv =
  6086. container_of(work, struct iwl4965_priv, scan_completed);
  6087. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6088. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6089. return;
  6090. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  6091. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  6092. ieee80211_scan_completed(priv->hw);
  6093. /* Since setting the TXPOWER may have been deferred while
  6094. * performing the scan, fire one off */
  6095. mutex_lock(&priv->mutex);
  6096. iwl4965_hw_reg_send_txpower(priv);
  6097. mutex_unlock(&priv->mutex);
  6098. }
  6099. /*****************************************************************************
  6100. *
  6101. * mac80211 entry point functions
  6102. *
  6103. *****************************************************************************/
  6104. #define UCODE_READY_TIMEOUT (2 * HZ)
  6105. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6106. {
  6107. struct iwl4965_priv *priv = hw->priv;
  6108. int ret;
  6109. IWL_DEBUG_MAC80211("enter\n");
  6110. if (pci_enable_device(priv->pci_dev)) {
  6111. IWL_ERROR("Fail to pci_enable_device\n");
  6112. return -ENODEV;
  6113. }
  6114. pci_restore_state(priv->pci_dev);
  6115. pci_enable_msi(priv->pci_dev);
  6116. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  6117. DRV_NAME, priv);
  6118. if (ret) {
  6119. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  6120. goto out_disable_msi;
  6121. }
  6122. /* we should be verifying the device is ready to be opened */
  6123. mutex_lock(&priv->mutex);
  6124. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  6125. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  6126. * ucode filename and max sizes are card-specific. */
  6127. if (!priv->ucode_code.len) {
  6128. ret = iwl4965_read_ucode(priv);
  6129. if (ret) {
  6130. IWL_ERROR("Could not read microcode: %d\n", ret);
  6131. mutex_unlock(&priv->mutex);
  6132. goto out_release_irq;
  6133. }
  6134. }
  6135. ret = __iwl4965_up(priv);
  6136. mutex_unlock(&priv->mutex);
  6137. if (ret)
  6138. goto out_release_irq;
  6139. IWL_DEBUG_INFO("Start UP work done.\n");
  6140. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  6141. return 0;
  6142. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  6143. * mac80211 will not be run successfully. */
  6144. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  6145. test_bit(STATUS_READY, &priv->status),
  6146. UCODE_READY_TIMEOUT);
  6147. if (!ret) {
  6148. if (!test_bit(STATUS_READY, &priv->status)) {
  6149. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  6150. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  6151. ret = -ETIMEDOUT;
  6152. goto out_release_irq;
  6153. }
  6154. }
  6155. priv->is_open = 1;
  6156. IWL_DEBUG_MAC80211("leave\n");
  6157. return 0;
  6158. out_release_irq:
  6159. free_irq(priv->pci_dev->irq, priv);
  6160. out_disable_msi:
  6161. pci_disable_msi(priv->pci_dev);
  6162. pci_disable_device(priv->pci_dev);
  6163. priv->is_open = 0;
  6164. IWL_DEBUG_MAC80211("leave - failed\n");
  6165. return ret;
  6166. }
  6167. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6168. {
  6169. struct iwl4965_priv *priv = hw->priv;
  6170. IWL_DEBUG_MAC80211("enter\n");
  6171. if (!priv->is_open) {
  6172. IWL_DEBUG_MAC80211("leave - skip\n");
  6173. return;
  6174. }
  6175. priv->is_open = 0;
  6176. if (iwl4965_is_ready_rf(priv)) {
  6177. /* stop mac, cancel any scan request and clear
  6178. * RXON_FILTER_ASSOC_MSK BIT
  6179. */
  6180. mutex_lock(&priv->mutex);
  6181. iwl4965_scan_cancel_timeout(priv, 100);
  6182. cancel_delayed_work(&priv->post_associate);
  6183. mutex_unlock(&priv->mutex);
  6184. }
  6185. iwl4965_down(priv);
  6186. flush_workqueue(priv->workqueue);
  6187. free_irq(priv->pci_dev->irq, priv);
  6188. pci_disable_msi(priv->pci_dev);
  6189. pci_save_state(priv->pci_dev);
  6190. pci_disable_device(priv->pci_dev);
  6191. IWL_DEBUG_MAC80211("leave\n");
  6192. }
  6193. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6194. struct ieee80211_tx_control *ctl)
  6195. {
  6196. struct iwl4965_priv *priv = hw->priv;
  6197. IWL_DEBUG_MAC80211("enter\n");
  6198. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6199. IWL_DEBUG_MAC80211("leave - monitor\n");
  6200. return -1;
  6201. }
  6202. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6203. ctl->tx_rate);
  6204. if (iwl4965_tx_skb(priv, skb, ctl))
  6205. dev_kfree_skb_any(skb);
  6206. IWL_DEBUG_MAC80211("leave\n");
  6207. return 0;
  6208. }
  6209. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6210. struct ieee80211_if_init_conf *conf)
  6211. {
  6212. struct iwl4965_priv *priv = hw->priv;
  6213. unsigned long flags;
  6214. DECLARE_MAC_BUF(mac);
  6215. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6216. if (priv->vif) {
  6217. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6218. return 0;
  6219. }
  6220. spin_lock_irqsave(&priv->lock, flags);
  6221. priv->vif = conf->vif;
  6222. spin_unlock_irqrestore(&priv->lock, flags);
  6223. mutex_lock(&priv->mutex);
  6224. if (conf->mac_addr) {
  6225. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6226. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6227. }
  6228. if (iwl4965_is_ready(priv))
  6229. iwl4965_set_mode(priv, conf->type);
  6230. mutex_unlock(&priv->mutex);
  6231. IWL_DEBUG_MAC80211("leave\n");
  6232. return 0;
  6233. }
  6234. /**
  6235. * iwl4965_mac_config - mac80211 config callback
  6236. *
  6237. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6238. * be set inappropriately and the driver currently sets the hardware up to
  6239. * use it whenever needed.
  6240. */
  6241. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6242. {
  6243. struct iwl4965_priv *priv = hw->priv;
  6244. const struct iwl4965_channel_info *ch_info;
  6245. unsigned long flags;
  6246. int ret = 0;
  6247. mutex_lock(&priv->mutex);
  6248. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6249. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6250. if (!iwl4965_is_ready(priv)) {
  6251. IWL_DEBUG_MAC80211("leave - not ready\n");
  6252. ret = -EIO;
  6253. goto out;
  6254. }
  6255. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6256. test_bit(STATUS_SCANNING, &priv->status))) {
  6257. IWL_DEBUG_MAC80211("leave - scanning\n");
  6258. set_bit(STATUS_CONF_PENDING, &priv->status);
  6259. mutex_unlock(&priv->mutex);
  6260. return 0;
  6261. }
  6262. spin_lock_irqsave(&priv->lock, flags);
  6263. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6264. if (!is_channel_valid(ch_info)) {
  6265. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6266. conf->channel, conf->phymode);
  6267. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6268. spin_unlock_irqrestore(&priv->lock, flags);
  6269. ret = -EINVAL;
  6270. goto out;
  6271. }
  6272. #ifdef CONFIG_IWL4965_HT
  6273. /* if we are switching fron ht to 2.4 clear flags
  6274. * from any ht related info since 2.4 does not
  6275. * support ht */
  6276. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6277. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6278. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6279. #endif
  6280. )
  6281. priv->staging_rxon.flags = 0;
  6282. #endif /* CONFIG_IWL4965_HT */
  6283. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6284. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6285. /* The list of supported rates and rate mask can be different
  6286. * for each phymode; since the phymode may have changed, reset
  6287. * the rate mask to what mac80211 lists */
  6288. iwl4965_set_rate(priv);
  6289. spin_unlock_irqrestore(&priv->lock, flags);
  6290. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6291. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6292. iwl4965_hw_channel_switch(priv, conf->channel);
  6293. goto out;
  6294. }
  6295. #endif
  6296. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6297. if (!conf->radio_enabled) {
  6298. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6299. goto out;
  6300. }
  6301. if (iwl4965_is_rfkill(priv)) {
  6302. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6303. ret = -EIO;
  6304. goto out;
  6305. }
  6306. iwl4965_set_rate(priv);
  6307. if (memcmp(&priv->active_rxon,
  6308. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6309. iwl4965_commit_rxon(priv);
  6310. else
  6311. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6312. IWL_DEBUG_MAC80211("leave\n");
  6313. out:
  6314. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6315. mutex_unlock(&priv->mutex);
  6316. return ret;
  6317. }
  6318. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6319. {
  6320. int rc = 0;
  6321. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6322. return;
  6323. /* The following should be done only at AP bring up */
  6324. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6325. /* RXON - unassoc (to set timing command) */
  6326. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6327. iwl4965_commit_rxon(priv);
  6328. /* RXON Timing */
  6329. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6330. iwl4965_setup_rxon_timing(priv);
  6331. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6332. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6333. if (rc)
  6334. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6335. "Attempting to continue.\n");
  6336. iwl4965_set_rxon_chain(priv);
  6337. /* FIXME: what should be the assoc_id for AP? */
  6338. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6339. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6340. priv->staging_rxon.flags |=
  6341. RXON_FLG_SHORT_PREAMBLE_MSK;
  6342. else
  6343. priv->staging_rxon.flags &=
  6344. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6345. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6346. if (priv->assoc_capability &
  6347. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6348. priv->staging_rxon.flags |=
  6349. RXON_FLG_SHORT_SLOT_MSK;
  6350. else
  6351. priv->staging_rxon.flags &=
  6352. ~RXON_FLG_SHORT_SLOT_MSK;
  6353. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6354. priv->staging_rxon.flags &=
  6355. ~RXON_FLG_SHORT_SLOT_MSK;
  6356. }
  6357. /* restore RXON assoc */
  6358. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6359. iwl4965_commit_rxon(priv);
  6360. #ifdef CONFIG_IWL4965_QOS
  6361. iwl4965_activate_qos(priv, 1);
  6362. #endif
  6363. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6364. }
  6365. iwl4965_send_beacon_cmd(priv);
  6366. /* FIXME - we need to add code here to detect a totally new
  6367. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6368. * clear sta table, add BCAST sta... */
  6369. }
  6370. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6371. struct ieee80211_vif *vif,
  6372. struct ieee80211_if_conf *conf)
  6373. {
  6374. struct iwl4965_priv *priv = hw->priv;
  6375. DECLARE_MAC_BUF(mac);
  6376. unsigned long flags;
  6377. int rc;
  6378. if (conf == NULL)
  6379. return -EIO;
  6380. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6381. (!conf->beacon || !conf->ssid_len)) {
  6382. IWL_DEBUG_MAC80211
  6383. ("Leaving in AP mode because HostAPD is not ready.\n");
  6384. return 0;
  6385. }
  6386. if (!iwl4965_is_alive(priv))
  6387. return -EAGAIN;
  6388. mutex_lock(&priv->mutex);
  6389. if (conf->bssid)
  6390. IWL_DEBUG_MAC80211("bssid: %s\n",
  6391. print_mac(mac, conf->bssid));
  6392. /*
  6393. * very dubious code was here; the probe filtering flag is never set:
  6394. *
  6395. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6396. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6397. */
  6398. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6399. IWL_DEBUG_MAC80211("leave - scanning\n");
  6400. mutex_unlock(&priv->mutex);
  6401. return 0;
  6402. }
  6403. if (priv->vif != vif) {
  6404. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6405. mutex_unlock(&priv->mutex);
  6406. return 0;
  6407. }
  6408. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6409. if (!conf->bssid) {
  6410. conf->bssid = priv->mac_addr;
  6411. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6412. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6413. print_mac(mac, conf->bssid));
  6414. }
  6415. if (priv->ibss_beacon)
  6416. dev_kfree_skb(priv->ibss_beacon);
  6417. priv->ibss_beacon = conf->beacon;
  6418. }
  6419. if (iwl4965_is_rfkill(priv))
  6420. goto done;
  6421. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6422. !is_multicast_ether_addr(conf->bssid)) {
  6423. /* If there is currently a HW scan going on in the background
  6424. * then we need to cancel it else the RXON below will fail. */
  6425. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6426. IWL_WARNING("Aborted scan still in progress "
  6427. "after 100ms\n");
  6428. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6429. mutex_unlock(&priv->mutex);
  6430. return -EAGAIN;
  6431. }
  6432. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6433. /* TODO: Audit driver for usage of these members and see
  6434. * if mac80211 deprecates them (priv->bssid looks like it
  6435. * shouldn't be there, but I haven't scanned the IBSS code
  6436. * to verify) - jpk */
  6437. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6438. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6439. iwl4965_config_ap(priv);
  6440. else {
  6441. rc = iwl4965_commit_rxon(priv);
  6442. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6443. iwl4965_rxon_add_station(
  6444. priv, priv->active_rxon.bssid_addr, 1);
  6445. }
  6446. } else {
  6447. iwl4965_scan_cancel_timeout(priv, 100);
  6448. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6449. iwl4965_commit_rxon(priv);
  6450. }
  6451. done:
  6452. spin_lock_irqsave(&priv->lock, flags);
  6453. if (!conf->ssid_len)
  6454. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6455. else
  6456. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6457. priv->essid_len = conf->ssid_len;
  6458. spin_unlock_irqrestore(&priv->lock, flags);
  6459. IWL_DEBUG_MAC80211("leave\n");
  6460. mutex_unlock(&priv->mutex);
  6461. return 0;
  6462. }
  6463. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6464. unsigned int changed_flags,
  6465. unsigned int *total_flags,
  6466. int mc_count, struct dev_addr_list *mc_list)
  6467. {
  6468. /*
  6469. * XXX: dummy
  6470. * see also iwl4965_connection_init_rx_config
  6471. */
  6472. *total_flags = 0;
  6473. }
  6474. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6475. struct ieee80211_if_init_conf *conf)
  6476. {
  6477. struct iwl4965_priv *priv = hw->priv;
  6478. IWL_DEBUG_MAC80211("enter\n");
  6479. mutex_lock(&priv->mutex);
  6480. if (iwl4965_is_ready_rf(priv)) {
  6481. iwl4965_scan_cancel_timeout(priv, 100);
  6482. cancel_delayed_work(&priv->post_associate);
  6483. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6484. iwl4965_commit_rxon(priv);
  6485. }
  6486. if (priv->vif == conf->vif) {
  6487. priv->vif = NULL;
  6488. memset(priv->bssid, 0, ETH_ALEN);
  6489. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6490. priv->essid_len = 0;
  6491. }
  6492. mutex_unlock(&priv->mutex);
  6493. IWL_DEBUG_MAC80211("leave\n");
  6494. }
  6495. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6496. struct ieee80211_vif *vif,
  6497. struct ieee80211_bss_conf *bss_conf,
  6498. u32 changes)
  6499. {
  6500. struct iwl4965_priv *priv = hw->priv;
  6501. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6502. if (bss_conf->use_short_preamble)
  6503. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6504. else
  6505. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6506. }
  6507. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6508. if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
  6509. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6510. else
  6511. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6512. }
  6513. if (changes & BSS_CHANGED_ASSOC) {
  6514. /*
  6515. * TODO:
  6516. * do stuff instead of sniffing assoc resp
  6517. */
  6518. }
  6519. if (iwl4965_is_associated(priv))
  6520. iwl4965_send_rxon_assoc(priv);
  6521. }
  6522. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6523. {
  6524. int rc = 0;
  6525. unsigned long flags;
  6526. struct iwl4965_priv *priv = hw->priv;
  6527. IWL_DEBUG_MAC80211("enter\n");
  6528. mutex_lock(&priv->mutex);
  6529. spin_lock_irqsave(&priv->lock, flags);
  6530. if (!iwl4965_is_ready_rf(priv)) {
  6531. rc = -EIO;
  6532. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6533. goto out_unlock;
  6534. }
  6535. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6536. rc = -EIO;
  6537. IWL_ERROR("ERROR: APs don't scan\n");
  6538. goto out_unlock;
  6539. }
  6540. /* we don't schedule scan within next_scan_jiffies period */
  6541. if (priv->next_scan_jiffies &&
  6542. time_after(priv->next_scan_jiffies, jiffies)) {
  6543. rc = -EAGAIN;
  6544. goto out_unlock;
  6545. }
  6546. /* if we just finished scan ask for delay */
  6547. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6548. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6549. rc = -EAGAIN;
  6550. goto out_unlock;
  6551. }
  6552. if (len) {
  6553. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6554. iwl4965_escape_essid(ssid, len), (int)len);
  6555. priv->one_direct_scan = 1;
  6556. priv->direct_ssid_len = (u8)
  6557. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6558. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6559. } else
  6560. priv->one_direct_scan = 0;
  6561. rc = iwl4965_scan_initiate(priv);
  6562. IWL_DEBUG_MAC80211("leave\n");
  6563. out_unlock:
  6564. spin_unlock_irqrestore(&priv->lock, flags);
  6565. mutex_unlock(&priv->mutex);
  6566. return rc;
  6567. }
  6568. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6569. const u8 *local_addr, const u8 *addr,
  6570. struct ieee80211_key_conf *key)
  6571. {
  6572. struct iwl4965_priv *priv = hw->priv;
  6573. DECLARE_MAC_BUF(mac);
  6574. int rc = 0;
  6575. u8 sta_id;
  6576. IWL_DEBUG_MAC80211("enter\n");
  6577. if (!iwl4965_param_hwcrypto) {
  6578. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6579. return -EOPNOTSUPP;
  6580. }
  6581. if (is_zero_ether_addr(addr))
  6582. /* only support pairwise keys */
  6583. return -EOPNOTSUPP;
  6584. sta_id = iwl4965_hw_find_station(priv, addr);
  6585. if (sta_id == IWL_INVALID_STATION) {
  6586. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6587. print_mac(mac, addr));
  6588. return -EINVAL;
  6589. }
  6590. mutex_lock(&priv->mutex);
  6591. iwl4965_scan_cancel_timeout(priv, 100);
  6592. switch (cmd) {
  6593. case SET_KEY:
  6594. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6595. if (!rc) {
  6596. iwl4965_set_rxon_hwcrypto(priv, 1);
  6597. iwl4965_commit_rxon(priv);
  6598. key->hw_key_idx = sta_id;
  6599. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6600. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6601. }
  6602. break;
  6603. case DISABLE_KEY:
  6604. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6605. if (!rc) {
  6606. iwl4965_set_rxon_hwcrypto(priv, 0);
  6607. iwl4965_commit_rxon(priv);
  6608. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6609. }
  6610. break;
  6611. default:
  6612. rc = -EINVAL;
  6613. }
  6614. IWL_DEBUG_MAC80211("leave\n");
  6615. mutex_unlock(&priv->mutex);
  6616. return rc;
  6617. }
  6618. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6619. const struct ieee80211_tx_queue_params *params)
  6620. {
  6621. struct iwl4965_priv *priv = hw->priv;
  6622. #ifdef CONFIG_IWL4965_QOS
  6623. unsigned long flags;
  6624. int q;
  6625. #endif /* CONFIG_IWL4965_QOS */
  6626. IWL_DEBUG_MAC80211("enter\n");
  6627. if (!iwl4965_is_ready_rf(priv)) {
  6628. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6629. return -EIO;
  6630. }
  6631. if (queue >= AC_NUM) {
  6632. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6633. return 0;
  6634. }
  6635. #ifdef CONFIG_IWL4965_QOS
  6636. if (!priv->qos_data.qos_enable) {
  6637. priv->qos_data.qos_active = 0;
  6638. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6639. return 0;
  6640. }
  6641. q = AC_NUM - 1 - queue;
  6642. spin_lock_irqsave(&priv->lock, flags);
  6643. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6644. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6645. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6646. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6647. cpu_to_le16((params->burst_time * 100));
  6648. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6649. priv->qos_data.qos_active = 1;
  6650. spin_unlock_irqrestore(&priv->lock, flags);
  6651. mutex_lock(&priv->mutex);
  6652. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6653. iwl4965_activate_qos(priv, 1);
  6654. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6655. iwl4965_activate_qos(priv, 0);
  6656. mutex_unlock(&priv->mutex);
  6657. #endif /*CONFIG_IWL4965_QOS */
  6658. IWL_DEBUG_MAC80211("leave\n");
  6659. return 0;
  6660. }
  6661. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6662. struct ieee80211_tx_queue_stats *stats)
  6663. {
  6664. struct iwl4965_priv *priv = hw->priv;
  6665. int i, avail;
  6666. struct iwl4965_tx_queue *txq;
  6667. struct iwl4965_queue *q;
  6668. unsigned long flags;
  6669. IWL_DEBUG_MAC80211("enter\n");
  6670. if (!iwl4965_is_ready_rf(priv)) {
  6671. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6672. return -EIO;
  6673. }
  6674. spin_lock_irqsave(&priv->lock, flags);
  6675. for (i = 0; i < AC_NUM; i++) {
  6676. txq = &priv->txq[i];
  6677. q = &txq->q;
  6678. avail = iwl4965_queue_space(q);
  6679. stats->data[i].len = q->n_window - avail;
  6680. stats->data[i].limit = q->n_window - q->high_mark;
  6681. stats->data[i].count = q->n_window;
  6682. }
  6683. spin_unlock_irqrestore(&priv->lock, flags);
  6684. IWL_DEBUG_MAC80211("leave\n");
  6685. return 0;
  6686. }
  6687. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6688. struct ieee80211_low_level_stats *stats)
  6689. {
  6690. IWL_DEBUG_MAC80211("enter\n");
  6691. IWL_DEBUG_MAC80211("leave\n");
  6692. return 0;
  6693. }
  6694. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6695. {
  6696. IWL_DEBUG_MAC80211("enter\n");
  6697. IWL_DEBUG_MAC80211("leave\n");
  6698. return 0;
  6699. }
  6700. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6701. {
  6702. struct iwl4965_priv *priv = hw->priv;
  6703. unsigned long flags;
  6704. mutex_lock(&priv->mutex);
  6705. IWL_DEBUG_MAC80211("enter\n");
  6706. priv->lq_mngr.lq_ready = 0;
  6707. #ifdef CONFIG_IWL4965_HT
  6708. spin_lock_irqsave(&priv->lock, flags);
  6709. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6710. spin_unlock_irqrestore(&priv->lock, flags);
  6711. #ifdef CONFIG_IWL4965_HT_AGG
  6712. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6713. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6714. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6715. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6716. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6717. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6718. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6719. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6720. #endif /*CONFIG_IWL4965_HT_AGG */
  6721. #endif /* CONFIG_IWL4965_HT */
  6722. #ifdef CONFIG_IWL4965_QOS
  6723. iwl4965_reset_qos(priv);
  6724. #endif
  6725. cancel_delayed_work(&priv->post_associate);
  6726. spin_lock_irqsave(&priv->lock, flags);
  6727. priv->assoc_id = 0;
  6728. priv->assoc_capability = 0;
  6729. priv->call_post_assoc_from_beacon = 0;
  6730. priv->assoc_station_added = 0;
  6731. /* new association get rid of ibss beacon skb */
  6732. if (priv->ibss_beacon)
  6733. dev_kfree_skb(priv->ibss_beacon);
  6734. priv->ibss_beacon = NULL;
  6735. priv->beacon_int = priv->hw->conf.beacon_int;
  6736. priv->timestamp1 = 0;
  6737. priv->timestamp0 = 0;
  6738. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6739. priv->beacon_int = 0;
  6740. spin_unlock_irqrestore(&priv->lock, flags);
  6741. if (!iwl4965_is_ready_rf(priv)) {
  6742. IWL_DEBUG_MAC80211("leave - not ready\n");
  6743. mutex_unlock(&priv->mutex);
  6744. return;
  6745. }
  6746. /* we are restarting association process
  6747. * clear RXON_FILTER_ASSOC_MSK bit
  6748. */
  6749. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6750. iwl4965_scan_cancel_timeout(priv, 100);
  6751. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6752. iwl4965_commit_rxon(priv);
  6753. }
  6754. /* Per mac80211.h: This is only used in IBSS mode... */
  6755. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6756. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6757. mutex_unlock(&priv->mutex);
  6758. return;
  6759. }
  6760. priv->only_active_channel = 0;
  6761. iwl4965_set_rate(priv);
  6762. mutex_unlock(&priv->mutex);
  6763. IWL_DEBUG_MAC80211("leave\n");
  6764. }
  6765. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6766. struct ieee80211_tx_control *control)
  6767. {
  6768. struct iwl4965_priv *priv = hw->priv;
  6769. unsigned long flags;
  6770. mutex_lock(&priv->mutex);
  6771. IWL_DEBUG_MAC80211("enter\n");
  6772. if (!iwl4965_is_ready_rf(priv)) {
  6773. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6774. mutex_unlock(&priv->mutex);
  6775. return -EIO;
  6776. }
  6777. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6778. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6779. mutex_unlock(&priv->mutex);
  6780. return -EIO;
  6781. }
  6782. spin_lock_irqsave(&priv->lock, flags);
  6783. if (priv->ibss_beacon)
  6784. dev_kfree_skb(priv->ibss_beacon);
  6785. priv->ibss_beacon = skb;
  6786. priv->assoc_id = 0;
  6787. IWL_DEBUG_MAC80211("leave\n");
  6788. spin_unlock_irqrestore(&priv->lock, flags);
  6789. #ifdef CONFIG_IWL4965_QOS
  6790. iwl4965_reset_qos(priv);
  6791. #endif
  6792. queue_work(priv->workqueue, &priv->post_associate.work);
  6793. mutex_unlock(&priv->mutex);
  6794. return 0;
  6795. }
  6796. #ifdef CONFIG_IWL4965_HT
  6797. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6798. struct iwl4965_priv *priv)
  6799. {
  6800. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6801. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6802. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6803. IWL_DEBUG_MAC80211("enter: \n");
  6804. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6805. iwl_conf->is_ht = 0;
  6806. return;
  6807. }
  6808. iwl_conf->is_ht = 1;
  6809. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6810. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6811. iwl_conf->sgf |= 0x1;
  6812. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6813. iwl_conf->sgf |= 0x2;
  6814. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6815. iwl_conf->max_amsdu_size =
  6816. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6817. iwl_conf->supported_chan_width =
  6818. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6819. iwl_conf->tx_mimo_ps_mode =
  6820. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6821. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6822. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6823. iwl_conf->extension_chan_offset =
  6824. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6825. iwl_conf->tx_chan_width =
  6826. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6827. iwl_conf->ht_protection =
  6828. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6829. iwl_conf->non_GF_STA_present =
  6830. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6831. IWL_DEBUG_MAC80211("control channel %d\n",
  6832. iwl_conf->control_channel);
  6833. IWL_DEBUG_MAC80211("leave\n");
  6834. }
  6835. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6836. struct ieee80211_conf *conf)
  6837. {
  6838. struct iwl4965_priv *priv = hw->priv;
  6839. IWL_DEBUG_MAC80211("enter: \n");
  6840. iwl4965_ht_info_fill(conf, priv);
  6841. iwl4965_set_rxon_chain(priv);
  6842. if (priv && priv->assoc_id &&
  6843. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6844. unsigned long flags;
  6845. spin_lock_irqsave(&priv->lock, flags);
  6846. if (priv->beacon_int)
  6847. queue_work(priv->workqueue, &priv->post_associate.work);
  6848. else
  6849. priv->call_post_assoc_from_beacon = 1;
  6850. spin_unlock_irqrestore(&priv->lock, flags);
  6851. }
  6852. IWL_DEBUG_MAC80211("leave:\n");
  6853. return 0;
  6854. }
  6855. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6856. struct ieee80211_ht_cap *ht_cap,
  6857. u8 use_current_config)
  6858. {
  6859. struct ieee80211_conf *conf = &hw->conf;
  6860. struct ieee80211_hw_mode *mode = conf->mode;
  6861. if (use_current_config) {
  6862. ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
  6863. memcpy(ht_cap->supp_mcs_set,
  6864. conf->ht_conf.supp_mcs_set, 16);
  6865. } else {
  6866. ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
  6867. memcpy(ht_cap->supp_mcs_set,
  6868. mode->ht_info.supp_mcs_set, 16);
  6869. }
  6870. ht_cap->ampdu_params_info =
  6871. (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
  6872. ((mode->ht_info.ampdu_density << 2) &
  6873. IEEE80211_HT_CAP_AMPDU_DENSITY);
  6874. }
  6875. #endif /*CONFIG_IWL4965_HT*/
  6876. /*****************************************************************************
  6877. *
  6878. * sysfs attributes
  6879. *
  6880. *****************************************************************************/
  6881. #ifdef CONFIG_IWL4965_DEBUG
  6882. /*
  6883. * The following adds a new attribute to the sysfs representation
  6884. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6885. * used for controlling the debug level.
  6886. *
  6887. * See the level definitions in iwl for details.
  6888. */
  6889. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6890. {
  6891. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6892. }
  6893. static ssize_t store_debug_level(struct device_driver *d,
  6894. const char *buf, size_t count)
  6895. {
  6896. char *p = (char *)buf;
  6897. u32 val;
  6898. val = simple_strtoul(p, &p, 0);
  6899. if (p == buf)
  6900. printk(KERN_INFO DRV_NAME
  6901. ": %s is not in hex or decimal form.\n", buf);
  6902. else
  6903. iwl4965_debug_level = val;
  6904. return strnlen(buf, count);
  6905. }
  6906. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6907. show_debug_level, store_debug_level);
  6908. #endif /* CONFIG_IWL4965_DEBUG */
  6909. static ssize_t show_rf_kill(struct device *d,
  6910. struct device_attribute *attr, char *buf)
  6911. {
  6912. /*
  6913. * 0 - RF kill not enabled
  6914. * 1 - SW based RF kill active (sysfs)
  6915. * 2 - HW based RF kill active
  6916. * 3 - Both HW and SW based RF kill active
  6917. */
  6918. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6919. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6920. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6921. return sprintf(buf, "%i\n", val);
  6922. }
  6923. static ssize_t store_rf_kill(struct device *d,
  6924. struct device_attribute *attr,
  6925. const char *buf, size_t count)
  6926. {
  6927. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6928. mutex_lock(&priv->mutex);
  6929. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6930. mutex_unlock(&priv->mutex);
  6931. return count;
  6932. }
  6933. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6934. static ssize_t show_temperature(struct device *d,
  6935. struct device_attribute *attr, char *buf)
  6936. {
  6937. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6938. if (!iwl4965_is_alive(priv))
  6939. return -EAGAIN;
  6940. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6941. }
  6942. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6943. static ssize_t show_rs_window(struct device *d,
  6944. struct device_attribute *attr,
  6945. char *buf)
  6946. {
  6947. struct iwl4965_priv *priv = d->driver_data;
  6948. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6949. }
  6950. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6951. static ssize_t show_tx_power(struct device *d,
  6952. struct device_attribute *attr, char *buf)
  6953. {
  6954. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6955. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6956. }
  6957. static ssize_t store_tx_power(struct device *d,
  6958. struct device_attribute *attr,
  6959. const char *buf, size_t count)
  6960. {
  6961. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6962. char *p = (char *)buf;
  6963. u32 val;
  6964. val = simple_strtoul(p, &p, 10);
  6965. if (p == buf)
  6966. printk(KERN_INFO DRV_NAME
  6967. ": %s is not in decimal form.\n", buf);
  6968. else
  6969. iwl4965_hw_reg_set_txpower(priv, val);
  6970. return count;
  6971. }
  6972. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6973. static ssize_t show_flags(struct device *d,
  6974. struct device_attribute *attr, char *buf)
  6975. {
  6976. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6977. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6978. }
  6979. static ssize_t store_flags(struct device *d,
  6980. struct device_attribute *attr,
  6981. const char *buf, size_t count)
  6982. {
  6983. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6984. u32 flags = simple_strtoul(buf, NULL, 0);
  6985. mutex_lock(&priv->mutex);
  6986. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6987. /* Cancel any currently running scans... */
  6988. if (iwl4965_scan_cancel_timeout(priv, 100))
  6989. IWL_WARNING("Could not cancel scan.\n");
  6990. else {
  6991. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6992. flags);
  6993. priv->staging_rxon.flags = cpu_to_le32(flags);
  6994. iwl4965_commit_rxon(priv);
  6995. }
  6996. }
  6997. mutex_unlock(&priv->mutex);
  6998. return count;
  6999. }
  7000. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  7001. static ssize_t show_filter_flags(struct device *d,
  7002. struct device_attribute *attr, char *buf)
  7003. {
  7004. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7005. return sprintf(buf, "0x%04X\n",
  7006. le32_to_cpu(priv->active_rxon.filter_flags));
  7007. }
  7008. static ssize_t store_filter_flags(struct device *d,
  7009. struct device_attribute *attr,
  7010. const char *buf, size_t count)
  7011. {
  7012. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7013. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7014. mutex_lock(&priv->mutex);
  7015. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7016. /* Cancel any currently running scans... */
  7017. if (iwl4965_scan_cancel_timeout(priv, 100))
  7018. IWL_WARNING("Could not cancel scan.\n");
  7019. else {
  7020. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7021. "0x%04X\n", filter_flags);
  7022. priv->staging_rxon.filter_flags =
  7023. cpu_to_le32(filter_flags);
  7024. iwl4965_commit_rxon(priv);
  7025. }
  7026. }
  7027. mutex_unlock(&priv->mutex);
  7028. return count;
  7029. }
  7030. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7031. store_filter_flags);
  7032. static ssize_t show_tune(struct device *d,
  7033. struct device_attribute *attr, char *buf)
  7034. {
  7035. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7036. return sprintf(buf, "0x%04X\n",
  7037. (priv->phymode << 8) |
  7038. le16_to_cpu(priv->active_rxon.channel));
  7039. }
  7040. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7041. static ssize_t store_tune(struct device *d,
  7042. struct device_attribute *attr,
  7043. const char *buf, size_t count)
  7044. {
  7045. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7046. char *p = (char *)buf;
  7047. u16 tune = simple_strtoul(p, &p, 0);
  7048. u8 phymode = (tune >> 8) & 0xff;
  7049. u16 channel = tune & 0xff;
  7050. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7051. mutex_lock(&priv->mutex);
  7052. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7053. (priv->phymode != phymode)) {
  7054. const struct iwl4965_channel_info *ch_info;
  7055. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7056. if (!ch_info) {
  7057. IWL_WARNING("Requested invalid phymode/channel "
  7058. "combination: %d %d\n", phymode, channel);
  7059. mutex_unlock(&priv->mutex);
  7060. return -EINVAL;
  7061. }
  7062. /* Cancel any currently running scans... */
  7063. if (iwl4965_scan_cancel_timeout(priv, 100))
  7064. IWL_WARNING("Could not cancel scan.\n");
  7065. else {
  7066. IWL_DEBUG_INFO("Committing phymode and "
  7067. "rxon.channel = %d %d\n",
  7068. phymode, channel);
  7069. iwl4965_set_rxon_channel(priv, phymode, channel);
  7070. iwl4965_set_flags_for_phymode(priv, phymode);
  7071. iwl4965_set_rate(priv);
  7072. iwl4965_commit_rxon(priv);
  7073. }
  7074. }
  7075. mutex_unlock(&priv->mutex);
  7076. return count;
  7077. }
  7078. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7079. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7080. static ssize_t show_measurement(struct device *d,
  7081. struct device_attribute *attr, char *buf)
  7082. {
  7083. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7084. struct iwl4965_spectrum_notification measure_report;
  7085. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7086. u8 *data = (u8 *) & measure_report;
  7087. unsigned long flags;
  7088. spin_lock_irqsave(&priv->lock, flags);
  7089. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7090. spin_unlock_irqrestore(&priv->lock, flags);
  7091. return 0;
  7092. }
  7093. memcpy(&measure_report, &priv->measure_report, size);
  7094. priv->measurement_status = 0;
  7095. spin_unlock_irqrestore(&priv->lock, flags);
  7096. while (size && (PAGE_SIZE - len)) {
  7097. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7098. PAGE_SIZE - len, 1);
  7099. len = strlen(buf);
  7100. if (PAGE_SIZE - len)
  7101. buf[len++] = '\n';
  7102. ofs += 16;
  7103. size -= min(size, 16U);
  7104. }
  7105. return len;
  7106. }
  7107. static ssize_t store_measurement(struct device *d,
  7108. struct device_attribute *attr,
  7109. const char *buf, size_t count)
  7110. {
  7111. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7112. struct ieee80211_measurement_params params = {
  7113. .channel = le16_to_cpu(priv->active_rxon.channel),
  7114. .start_time = cpu_to_le64(priv->last_tsf),
  7115. .duration = cpu_to_le16(1),
  7116. };
  7117. u8 type = IWL_MEASURE_BASIC;
  7118. u8 buffer[32];
  7119. u8 channel;
  7120. if (count) {
  7121. char *p = buffer;
  7122. strncpy(buffer, buf, min(sizeof(buffer), count));
  7123. channel = simple_strtoul(p, NULL, 0);
  7124. if (channel)
  7125. params.channel = channel;
  7126. p = buffer;
  7127. while (*p && *p != ' ')
  7128. p++;
  7129. if (*p)
  7130. type = simple_strtoul(p + 1, NULL, 0);
  7131. }
  7132. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7133. "channel %d (for '%s')\n", type, params.channel, buf);
  7134. iwl4965_get_measurement(priv, &params, type);
  7135. return count;
  7136. }
  7137. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7138. show_measurement, store_measurement);
  7139. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7140. static ssize_t store_retry_rate(struct device *d,
  7141. struct device_attribute *attr,
  7142. const char *buf, size_t count)
  7143. {
  7144. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7145. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7146. if (priv->retry_rate <= 0)
  7147. priv->retry_rate = 1;
  7148. return count;
  7149. }
  7150. static ssize_t show_retry_rate(struct device *d,
  7151. struct device_attribute *attr, char *buf)
  7152. {
  7153. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7154. return sprintf(buf, "%d", priv->retry_rate);
  7155. }
  7156. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7157. store_retry_rate);
  7158. static ssize_t store_power_level(struct device *d,
  7159. struct device_attribute *attr,
  7160. const char *buf, size_t count)
  7161. {
  7162. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7163. int rc;
  7164. int mode;
  7165. mode = simple_strtoul(buf, NULL, 0);
  7166. mutex_lock(&priv->mutex);
  7167. if (!iwl4965_is_ready(priv)) {
  7168. rc = -EAGAIN;
  7169. goto out;
  7170. }
  7171. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7172. mode = IWL_POWER_AC;
  7173. else
  7174. mode |= IWL_POWER_ENABLED;
  7175. if (mode != priv->power_mode) {
  7176. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7177. if (rc) {
  7178. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7179. goto out;
  7180. }
  7181. priv->power_mode = mode;
  7182. }
  7183. rc = count;
  7184. out:
  7185. mutex_unlock(&priv->mutex);
  7186. return rc;
  7187. }
  7188. #define MAX_WX_STRING 80
  7189. /* Values are in microsecond */
  7190. static const s32 timeout_duration[] = {
  7191. 350000,
  7192. 250000,
  7193. 75000,
  7194. 37000,
  7195. 25000,
  7196. };
  7197. static const s32 period_duration[] = {
  7198. 400000,
  7199. 700000,
  7200. 1000000,
  7201. 1000000,
  7202. 1000000
  7203. };
  7204. static ssize_t show_power_level(struct device *d,
  7205. struct device_attribute *attr, char *buf)
  7206. {
  7207. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7208. int level = IWL_POWER_LEVEL(priv->power_mode);
  7209. char *p = buf;
  7210. p += sprintf(p, "%d ", level);
  7211. switch (level) {
  7212. case IWL_POWER_MODE_CAM:
  7213. case IWL_POWER_AC:
  7214. p += sprintf(p, "(AC)");
  7215. break;
  7216. case IWL_POWER_BATTERY:
  7217. p += sprintf(p, "(BATTERY)");
  7218. break;
  7219. default:
  7220. p += sprintf(p,
  7221. "(Timeout %dms, Period %dms)",
  7222. timeout_duration[level - 1] / 1000,
  7223. period_duration[level - 1] / 1000);
  7224. }
  7225. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7226. p += sprintf(p, " OFF\n");
  7227. else
  7228. p += sprintf(p, " \n");
  7229. return (p - buf + 1);
  7230. }
  7231. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7232. store_power_level);
  7233. static ssize_t show_channels(struct device *d,
  7234. struct device_attribute *attr, char *buf)
  7235. {
  7236. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7237. int len = 0, i;
  7238. struct ieee80211_channel *channels = NULL;
  7239. const struct ieee80211_hw_mode *hw_mode = NULL;
  7240. int count = 0;
  7241. if (!iwl4965_is_ready(priv))
  7242. return -EAGAIN;
  7243. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7244. if (!hw_mode)
  7245. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7246. if (hw_mode) {
  7247. channels = hw_mode->channels;
  7248. count = hw_mode->num_channels;
  7249. }
  7250. len +=
  7251. sprintf(&buf[len],
  7252. "Displaying %d channels in 2.4GHz band "
  7253. "(802.11bg):\n", count);
  7254. for (i = 0; i < count; i++)
  7255. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7256. channels[i].chan,
  7257. channels[i].power_level,
  7258. channels[i].
  7259. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7260. " (IEEE 802.11h required)" : "",
  7261. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7262. || (channels[i].
  7263. flag &
  7264. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7265. ", IBSS",
  7266. channels[i].
  7267. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7268. "active/passive" : "passive only");
  7269. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7270. if (hw_mode) {
  7271. channels = hw_mode->channels;
  7272. count = hw_mode->num_channels;
  7273. } else {
  7274. channels = NULL;
  7275. count = 0;
  7276. }
  7277. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7278. "(802.11a):\n", count);
  7279. for (i = 0; i < count; i++)
  7280. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7281. channels[i].chan,
  7282. channels[i].power_level,
  7283. channels[i].
  7284. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7285. " (IEEE 802.11h required)" : "",
  7286. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7287. || (channels[i].
  7288. flag &
  7289. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7290. ", IBSS",
  7291. channels[i].
  7292. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7293. "active/passive" : "passive only");
  7294. return len;
  7295. }
  7296. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7297. static ssize_t show_statistics(struct device *d,
  7298. struct device_attribute *attr, char *buf)
  7299. {
  7300. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7301. u32 size = sizeof(struct iwl4965_notif_statistics);
  7302. u32 len = 0, ofs = 0;
  7303. u8 *data = (u8 *) & priv->statistics;
  7304. int rc = 0;
  7305. if (!iwl4965_is_alive(priv))
  7306. return -EAGAIN;
  7307. mutex_lock(&priv->mutex);
  7308. rc = iwl4965_send_statistics_request(priv);
  7309. mutex_unlock(&priv->mutex);
  7310. if (rc) {
  7311. len = sprintf(buf,
  7312. "Error sending statistics request: 0x%08X\n", rc);
  7313. return len;
  7314. }
  7315. while (size && (PAGE_SIZE - len)) {
  7316. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7317. PAGE_SIZE - len, 1);
  7318. len = strlen(buf);
  7319. if (PAGE_SIZE - len)
  7320. buf[len++] = '\n';
  7321. ofs += 16;
  7322. size -= min(size, 16U);
  7323. }
  7324. return len;
  7325. }
  7326. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7327. static ssize_t show_antenna(struct device *d,
  7328. struct device_attribute *attr, char *buf)
  7329. {
  7330. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7331. if (!iwl4965_is_alive(priv))
  7332. return -EAGAIN;
  7333. return sprintf(buf, "%d\n", priv->antenna);
  7334. }
  7335. static ssize_t store_antenna(struct device *d,
  7336. struct device_attribute *attr,
  7337. const char *buf, size_t count)
  7338. {
  7339. int ant;
  7340. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7341. if (count == 0)
  7342. return 0;
  7343. if (sscanf(buf, "%1i", &ant) != 1) {
  7344. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7345. return count;
  7346. }
  7347. if ((ant >= 0) && (ant <= 2)) {
  7348. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7349. priv->antenna = (enum iwl4965_antenna)ant;
  7350. } else
  7351. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7352. return count;
  7353. }
  7354. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7355. static ssize_t show_status(struct device *d,
  7356. struct device_attribute *attr, char *buf)
  7357. {
  7358. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7359. if (!iwl4965_is_alive(priv))
  7360. return -EAGAIN;
  7361. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7362. }
  7363. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7364. static ssize_t dump_error_log(struct device *d,
  7365. struct device_attribute *attr,
  7366. const char *buf, size_t count)
  7367. {
  7368. char *p = (char *)buf;
  7369. if (p[0] == '1')
  7370. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7371. return strnlen(buf, count);
  7372. }
  7373. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7374. static ssize_t dump_event_log(struct device *d,
  7375. struct device_attribute *attr,
  7376. const char *buf, size_t count)
  7377. {
  7378. char *p = (char *)buf;
  7379. if (p[0] == '1')
  7380. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7381. return strnlen(buf, count);
  7382. }
  7383. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7384. /*****************************************************************************
  7385. *
  7386. * driver setup and teardown
  7387. *
  7388. *****************************************************************************/
  7389. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7390. {
  7391. priv->workqueue = create_workqueue(DRV_NAME);
  7392. init_waitqueue_head(&priv->wait_command_queue);
  7393. INIT_WORK(&priv->up, iwl4965_bg_up);
  7394. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7395. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7396. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7397. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7398. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7399. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7400. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7401. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7402. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7403. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7404. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7405. iwl4965_hw_setup_deferred_work(priv);
  7406. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7407. iwl4965_irq_tasklet, (unsigned long)priv);
  7408. }
  7409. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7410. {
  7411. iwl4965_hw_cancel_deferred_work(priv);
  7412. cancel_delayed_work_sync(&priv->init_alive_start);
  7413. cancel_delayed_work(&priv->scan_check);
  7414. cancel_delayed_work(&priv->alive_start);
  7415. cancel_delayed_work(&priv->post_associate);
  7416. cancel_work_sync(&priv->beacon_update);
  7417. }
  7418. static struct attribute *iwl4965_sysfs_entries[] = {
  7419. &dev_attr_antenna.attr,
  7420. &dev_attr_channels.attr,
  7421. &dev_attr_dump_errors.attr,
  7422. &dev_attr_dump_events.attr,
  7423. &dev_attr_flags.attr,
  7424. &dev_attr_filter_flags.attr,
  7425. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7426. &dev_attr_measurement.attr,
  7427. #endif
  7428. &dev_attr_power_level.attr,
  7429. &dev_attr_retry_rate.attr,
  7430. &dev_attr_rf_kill.attr,
  7431. &dev_attr_rs_window.attr,
  7432. &dev_attr_statistics.attr,
  7433. &dev_attr_status.attr,
  7434. &dev_attr_temperature.attr,
  7435. &dev_attr_tune.attr,
  7436. &dev_attr_tx_power.attr,
  7437. NULL
  7438. };
  7439. static struct attribute_group iwl4965_attribute_group = {
  7440. .name = NULL, /* put in device directory */
  7441. .attrs = iwl4965_sysfs_entries,
  7442. };
  7443. static struct ieee80211_ops iwl4965_hw_ops = {
  7444. .tx = iwl4965_mac_tx,
  7445. .start = iwl4965_mac_start,
  7446. .stop = iwl4965_mac_stop,
  7447. .add_interface = iwl4965_mac_add_interface,
  7448. .remove_interface = iwl4965_mac_remove_interface,
  7449. .config = iwl4965_mac_config,
  7450. .config_interface = iwl4965_mac_config_interface,
  7451. .configure_filter = iwl4965_configure_filter,
  7452. .set_key = iwl4965_mac_set_key,
  7453. .get_stats = iwl4965_mac_get_stats,
  7454. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7455. .conf_tx = iwl4965_mac_conf_tx,
  7456. .get_tsf = iwl4965_mac_get_tsf,
  7457. .reset_tsf = iwl4965_mac_reset_tsf,
  7458. .beacon_update = iwl4965_mac_beacon_update,
  7459. .bss_info_changed = iwl4965_bss_info_changed,
  7460. #ifdef CONFIG_IWL4965_HT
  7461. .conf_ht = iwl4965_mac_conf_ht,
  7462. .ampdu_action = iwl4965_mac_ampdu_action,
  7463. #ifdef CONFIG_IWL4965_HT_AGG
  7464. .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
  7465. .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
  7466. #endif /* CONFIG_IWL4965_HT_AGG */
  7467. #endif /* CONFIG_IWL4965_HT */
  7468. .hw_scan = iwl4965_mac_hw_scan
  7469. };
  7470. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7471. {
  7472. int err = 0;
  7473. struct iwl4965_priv *priv;
  7474. struct ieee80211_hw *hw;
  7475. int i;
  7476. DECLARE_MAC_BUF(mac);
  7477. /* Disabling hardware scan means that mac80211 will perform scans
  7478. * "the hard way", rather than using device's scan. */
  7479. if (iwl4965_param_disable_hw_scan) {
  7480. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7481. iwl4965_hw_ops.hw_scan = NULL;
  7482. }
  7483. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7484. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7485. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7486. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7487. err = -EINVAL;
  7488. goto out;
  7489. }
  7490. /* mac80211 allocates memory for this device instance, including
  7491. * space for this driver's private structure */
  7492. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7493. if (hw == NULL) {
  7494. IWL_ERROR("Can not allocate network device\n");
  7495. err = -ENOMEM;
  7496. goto out;
  7497. }
  7498. SET_IEEE80211_DEV(hw, &pdev->dev);
  7499. hw->rate_control_algorithm = "iwl-4965-rs";
  7500. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7501. priv = hw->priv;
  7502. priv->hw = hw;
  7503. priv->pci_dev = pdev;
  7504. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7505. #ifdef CONFIG_IWL4965_DEBUG
  7506. iwl4965_debug_level = iwl4965_param_debug;
  7507. atomic_set(&priv->restrict_refcnt, 0);
  7508. #endif
  7509. priv->retry_rate = 1;
  7510. priv->ibss_beacon = NULL;
  7511. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7512. * the range of signal quality values that we'll provide.
  7513. * Negative values for level/noise indicate that we'll provide dBm.
  7514. * For WE, at least, non-0 values here *enable* display of values
  7515. * in app (iwconfig). */
  7516. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7517. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7518. hw->max_signal = 100; /* link quality indication (%) */
  7519. /* Tell mac80211 our Tx characteristics */
  7520. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7521. /* Default value; 4 EDCA QOS priorities */
  7522. hw->queues = 4;
  7523. #ifdef CONFIG_IWL4965_HT
  7524. #ifdef CONFIG_IWL4965_HT_AGG
  7525. /* Enhanced value; more queues, to support 11n aggregation */
  7526. hw->queues = 16;
  7527. #endif /* CONFIG_IWL4965_HT_AGG */
  7528. #endif /* CONFIG_IWL4965_HT */
  7529. spin_lock_init(&priv->lock);
  7530. spin_lock_init(&priv->power_data.lock);
  7531. spin_lock_init(&priv->sta_lock);
  7532. spin_lock_init(&priv->hcmd_lock);
  7533. spin_lock_init(&priv->lq_mngr.lock);
  7534. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7535. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7536. INIT_LIST_HEAD(&priv->free_frames);
  7537. mutex_init(&priv->mutex);
  7538. if (pci_enable_device(pdev)) {
  7539. err = -ENODEV;
  7540. goto out_ieee80211_free_hw;
  7541. }
  7542. pci_set_master(pdev);
  7543. /* Clear the driver's (not device's) station table */
  7544. iwl4965_clear_stations_table(priv);
  7545. priv->data_retry_limit = -1;
  7546. priv->ieee_channels = NULL;
  7547. priv->ieee_rates = NULL;
  7548. priv->phymode = -1;
  7549. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7550. if (!err)
  7551. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7552. if (err) {
  7553. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7554. goto out_pci_disable_device;
  7555. }
  7556. pci_set_drvdata(pdev, priv);
  7557. err = pci_request_regions(pdev, DRV_NAME);
  7558. if (err)
  7559. goto out_pci_disable_device;
  7560. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7561. * PCI Tx retries from interfering with C3 CPU state */
  7562. pci_write_config_byte(pdev, 0x41, 0x00);
  7563. priv->hw_base = pci_iomap(pdev, 0, 0);
  7564. if (!priv->hw_base) {
  7565. err = -ENODEV;
  7566. goto out_pci_release_regions;
  7567. }
  7568. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7569. (unsigned long long) pci_resource_len(pdev, 0));
  7570. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7571. /* Initialize module parameter values here */
  7572. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7573. if (iwl4965_param_disable) {
  7574. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7575. IWL_DEBUG_INFO("Radio disabled.\n");
  7576. }
  7577. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7578. priv->ps_mode = 0;
  7579. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7580. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7581. priv->ps_mode = IWL_MIMO_PS_NONE;
  7582. /* Choose which receivers/antennas to use */
  7583. iwl4965_set_rxon_chain(priv);
  7584. printk(KERN_INFO DRV_NAME
  7585. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7586. /* Device-specific setup */
  7587. if (iwl4965_hw_set_hw_setting(priv)) {
  7588. IWL_ERROR("failed to set hw settings\n");
  7589. goto out_iounmap;
  7590. }
  7591. #ifdef CONFIG_IWL4965_QOS
  7592. if (iwl4965_param_qos_enable)
  7593. priv->qos_data.qos_enable = 1;
  7594. iwl4965_reset_qos(priv);
  7595. priv->qos_data.qos_active = 0;
  7596. priv->qos_data.qos_cap.val = 0;
  7597. #endif /* CONFIG_IWL4965_QOS */
  7598. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7599. iwl4965_setup_deferred_work(priv);
  7600. iwl4965_setup_rx_handlers(priv);
  7601. priv->rates_mask = IWL_RATES_MASK;
  7602. /* If power management is turned on, default to AC mode */
  7603. priv->power_mode = IWL_POWER_AC;
  7604. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7605. iwl4965_disable_interrupts(priv);
  7606. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7607. if (err) {
  7608. IWL_ERROR("failed to create sysfs device attributes\n");
  7609. goto out_release_irq;
  7610. }
  7611. /* nic init */
  7612. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7613. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7614. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7615. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7616. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7617. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7618. if (err < 0) {
  7619. IWL_DEBUG_INFO("Failed to init the card\n");
  7620. goto out_remove_sysfs;
  7621. }
  7622. /* Read the EEPROM */
  7623. err = iwl4965_eeprom_init(priv);
  7624. if (err) {
  7625. IWL_ERROR("Unable to init EEPROM\n");
  7626. goto out_remove_sysfs;
  7627. }
  7628. /* MAC Address location in EEPROM same for 3945/4965 */
  7629. get_eeprom_mac(priv, priv->mac_addr);
  7630. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7631. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7632. iwl4965_rate_control_register(priv->hw);
  7633. err = ieee80211_register_hw(priv->hw);
  7634. if (err) {
  7635. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7636. goto out_remove_sysfs;
  7637. }
  7638. priv->hw->conf.beacon_int = 100;
  7639. priv->mac80211_registered = 1;
  7640. pci_save_state(pdev);
  7641. pci_disable_device(pdev);
  7642. return 0;
  7643. out_remove_sysfs:
  7644. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7645. out_release_irq:
  7646. destroy_workqueue(priv->workqueue);
  7647. priv->workqueue = NULL;
  7648. iwl4965_unset_hw_setting(priv);
  7649. out_iounmap:
  7650. pci_iounmap(pdev, priv->hw_base);
  7651. out_pci_release_regions:
  7652. pci_release_regions(pdev);
  7653. out_pci_disable_device:
  7654. pci_disable_device(pdev);
  7655. pci_set_drvdata(pdev, NULL);
  7656. out_ieee80211_free_hw:
  7657. ieee80211_free_hw(priv->hw);
  7658. out:
  7659. return err;
  7660. }
  7661. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7662. {
  7663. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7664. struct list_head *p, *q;
  7665. int i;
  7666. if (!priv)
  7667. return;
  7668. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7669. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7670. iwl4965_down(priv);
  7671. /* Free MAC hash list for ADHOC */
  7672. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7673. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7674. list_del(p);
  7675. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7676. }
  7677. }
  7678. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7679. iwl4965_dealloc_ucode_pci(priv);
  7680. if (priv->rxq.bd)
  7681. iwl4965_rx_queue_free(priv, &priv->rxq);
  7682. iwl4965_hw_txq_ctx_free(priv);
  7683. iwl4965_unset_hw_setting(priv);
  7684. iwl4965_clear_stations_table(priv);
  7685. if (priv->mac80211_registered) {
  7686. ieee80211_unregister_hw(priv->hw);
  7687. iwl4965_rate_control_unregister(priv->hw);
  7688. }
  7689. /*netif_stop_queue(dev); */
  7690. flush_workqueue(priv->workqueue);
  7691. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7692. * priv->workqueue... so we can't take down the workqueue
  7693. * until now... */
  7694. destroy_workqueue(priv->workqueue);
  7695. priv->workqueue = NULL;
  7696. pci_iounmap(pdev, priv->hw_base);
  7697. pci_release_regions(pdev);
  7698. pci_disable_device(pdev);
  7699. pci_set_drvdata(pdev, NULL);
  7700. kfree(priv->channel_info);
  7701. kfree(priv->ieee_channels);
  7702. kfree(priv->ieee_rates);
  7703. if (priv->ibss_beacon)
  7704. dev_kfree_skb(priv->ibss_beacon);
  7705. ieee80211_free_hw(priv->hw);
  7706. }
  7707. #ifdef CONFIG_PM
  7708. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7709. {
  7710. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7711. if (priv->is_open) {
  7712. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7713. iwl4965_mac_stop(priv->hw);
  7714. priv->is_open = 1;
  7715. }
  7716. pci_set_power_state(pdev, PCI_D3hot);
  7717. return 0;
  7718. }
  7719. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7720. {
  7721. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7722. pci_set_power_state(pdev, PCI_D0);
  7723. if (priv->is_open)
  7724. iwl4965_mac_start(priv->hw);
  7725. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7726. return 0;
  7727. }
  7728. #endif /* CONFIG_PM */
  7729. /*****************************************************************************
  7730. *
  7731. * driver and module entry point
  7732. *
  7733. *****************************************************************************/
  7734. static struct pci_driver iwl4965_driver = {
  7735. .name = DRV_NAME,
  7736. .id_table = iwl4965_hw_card_ids,
  7737. .probe = iwl4965_pci_probe,
  7738. .remove = __devexit_p(iwl4965_pci_remove),
  7739. #ifdef CONFIG_PM
  7740. .suspend = iwl4965_pci_suspend,
  7741. .resume = iwl4965_pci_resume,
  7742. #endif
  7743. };
  7744. static int __init iwl4965_init(void)
  7745. {
  7746. int ret;
  7747. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7748. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7749. ret = pci_register_driver(&iwl4965_driver);
  7750. if (ret) {
  7751. IWL_ERROR("Unable to initialize PCI module\n");
  7752. return ret;
  7753. }
  7754. #ifdef CONFIG_IWL4965_DEBUG
  7755. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7756. if (ret) {
  7757. IWL_ERROR("Unable to create driver sysfs file\n");
  7758. pci_unregister_driver(&iwl4965_driver);
  7759. return ret;
  7760. }
  7761. #endif
  7762. return ret;
  7763. }
  7764. static void __exit iwl4965_exit(void)
  7765. {
  7766. #ifdef CONFIG_IWL4965_DEBUG
  7767. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7768. #endif
  7769. pci_unregister_driver(&iwl4965_driver);
  7770. }
  7771. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7772. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7773. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7774. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7775. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7776. MODULE_PARM_DESC(hwcrypto,
  7777. "using hardware crypto engine (default 0 [software])\n");
  7778. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7779. MODULE_PARM_DESC(debug, "debug output mask");
  7780. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7781. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7782. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7783. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7784. /* QoS */
  7785. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7786. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7787. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7788. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7789. module_exit(iwl4965_exit);
  7790. module_init(iwl4965_init);