stamp.c 51 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/io.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/nand.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/plat-ram.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  20. #include <linux/usb/isp1362.h>
  21. #endif
  22. #include <linux/ata_platform.h>
  23. #include <linux/irq.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/i2c.h>
  26. #include <linux/usb/sl811.h>
  27. #include <linux/spi/mmc_spi.h>
  28. #include <linux/leds.h>
  29. #include <linux/input.h>
  30. #include <asm/dma.h>
  31. #include <asm/bfin5xx_spi.h>
  32. #include <asm/reboot.h>
  33. #include <asm/portmux.h>
  34. #include <asm/dpmc.h>
  35. /*
  36. * Name the Board for the /proc/cpuinfo
  37. */
  38. const char bfin_board_name[] = "ADI BF537-STAMP";
  39. /*
  40. * Driver needs to know address, irq and flag pin.
  41. */
  42. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  43. #include <linux/usb/isp1760.h>
  44. static struct resource bfin_isp1760_resources[] = {
  45. [0] = {
  46. .start = 0x203C0000,
  47. .end = 0x203C0000 + 0x000fffff,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. [1] = {
  51. .start = IRQ_PF7,
  52. .end = IRQ_PF7,
  53. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  54. },
  55. };
  56. static struct isp1760_platform_data isp1760_priv = {
  57. .is_isp1761 = 0,
  58. .bus_width_16 = 1,
  59. .port1_otg = 0,
  60. .analog_oc = 0,
  61. .dack_polarity_high = 0,
  62. .dreq_polarity_high = 0,
  63. };
  64. static struct platform_device bfin_isp1760_device = {
  65. .name = "isp1760",
  66. .id = 0,
  67. .dev = {
  68. .platform_data = &isp1760_priv,
  69. },
  70. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  71. .resource = bfin_isp1760_resources,
  72. };
  73. #endif
  74. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  75. #include <linux/gpio_keys.h>
  76. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  77. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  78. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  79. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  80. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  81. };
  82. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  83. .buttons = bfin_gpio_keys_table,
  84. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  85. };
  86. static struct platform_device bfin_device_gpiokeys = {
  87. .name = "gpio-keys",
  88. .dev = {
  89. .platform_data = &bfin_gpio_keys_data,
  90. },
  91. };
  92. #endif
  93. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  94. static struct resource bfin_pcmcia_cf_resources[] = {
  95. {
  96. .start = 0x20310000, /* IO PORT */
  97. .end = 0x20312000,
  98. .flags = IORESOURCE_MEM,
  99. }, {
  100. .start = 0x20311000, /* Attribute Memory */
  101. .end = 0x20311FFF,
  102. .flags = IORESOURCE_MEM,
  103. }, {
  104. .start = IRQ_PF4,
  105. .end = IRQ_PF4,
  106. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  107. }, {
  108. .start = 6, /* Card Detect PF6 */
  109. .end = 6,
  110. .flags = IORESOURCE_IRQ,
  111. },
  112. };
  113. static struct platform_device bfin_pcmcia_cf_device = {
  114. .name = "bfin_cf_pcmcia",
  115. .id = -1,
  116. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  117. .resource = bfin_pcmcia_cf_resources,
  118. };
  119. #endif
  120. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  121. static struct platform_device rtc_device = {
  122. .name = "rtc-bfin",
  123. .id = -1,
  124. };
  125. #endif
  126. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  127. #include <linux/smc91x.h>
  128. static struct smc91x_platdata smc91x_info = {
  129. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  130. .leda = RPC_LED_100_10,
  131. .ledb = RPC_LED_TX_RX,
  132. };
  133. static struct resource smc91x_resources[] = {
  134. {
  135. .name = "smc91x-regs",
  136. .start = 0x20300300,
  137. .end = 0x20300300 + 16,
  138. .flags = IORESOURCE_MEM,
  139. }, {
  140. .start = IRQ_PF7,
  141. .end = IRQ_PF7,
  142. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  143. },
  144. };
  145. static struct platform_device smc91x_device = {
  146. .name = "smc91x",
  147. .id = 0,
  148. .num_resources = ARRAY_SIZE(smc91x_resources),
  149. .resource = smc91x_resources,
  150. .dev = {
  151. .platform_data = &smc91x_info,
  152. },
  153. };
  154. #endif
  155. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  156. static struct resource dm9000_resources[] = {
  157. [0] = {
  158. .start = 0x203FB800,
  159. .end = 0x203FB800 + 1,
  160. .flags = IORESOURCE_MEM,
  161. },
  162. [1] = {
  163. .start = 0x203FB804,
  164. .end = 0x203FB804 + 1,
  165. .flags = IORESOURCE_MEM,
  166. },
  167. [2] = {
  168. .start = IRQ_PF9,
  169. .end = IRQ_PF9,
  170. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  171. },
  172. };
  173. static struct platform_device dm9000_device = {
  174. .name = "dm9000",
  175. .id = -1,
  176. .num_resources = ARRAY_SIZE(dm9000_resources),
  177. .resource = dm9000_resources,
  178. };
  179. #endif
  180. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  181. static struct resource sl811_hcd_resources[] = {
  182. {
  183. .start = 0x20340000,
  184. .end = 0x20340000,
  185. .flags = IORESOURCE_MEM,
  186. }, {
  187. .start = 0x20340004,
  188. .end = 0x20340004,
  189. .flags = IORESOURCE_MEM,
  190. }, {
  191. .start = CONFIG_USB_SL811_BFIN_IRQ,
  192. .end = CONFIG_USB_SL811_BFIN_IRQ,
  193. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  194. },
  195. };
  196. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  197. void sl811_port_power(struct device *dev, int is_on)
  198. {
  199. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  200. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  201. }
  202. #endif
  203. static struct sl811_platform_data sl811_priv = {
  204. .potpg = 10,
  205. .power = 250, /* == 500mA */
  206. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  207. .port_power = &sl811_port_power,
  208. #endif
  209. };
  210. static struct platform_device sl811_hcd_device = {
  211. .name = "sl811-hcd",
  212. .id = 0,
  213. .dev = {
  214. .platform_data = &sl811_priv,
  215. },
  216. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  217. .resource = sl811_hcd_resources,
  218. };
  219. #endif
  220. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  221. static struct resource isp1362_hcd_resources[] = {
  222. {
  223. .start = 0x20360000,
  224. .end = 0x20360000,
  225. .flags = IORESOURCE_MEM,
  226. }, {
  227. .start = 0x20360004,
  228. .end = 0x20360004,
  229. .flags = IORESOURCE_MEM,
  230. }, {
  231. .start = IRQ_PF3,
  232. .end = IRQ_PF3,
  233. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  234. },
  235. };
  236. static struct isp1362_platform_data isp1362_priv = {
  237. .sel15Kres = 1,
  238. .clknotstop = 0,
  239. .oc_enable = 0,
  240. .int_act_high = 0,
  241. .int_edge_triggered = 0,
  242. .remote_wakeup_connected = 0,
  243. .no_power_switching = 1,
  244. .power_switching_mode = 0,
  245. };
  246. static struct platform_device isp1362_hcd_device = {
  247. .name = "isp1362-hcd",
  248. .id = 0,
  249. .dev = {
  250. .platform_data = &isp1362_priv,
  251. },
  252. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  253. .resource = isp1362_hcd_resources,
  254. };
  255. #endif
  256. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  257. unsigned short bfin_can_peripherals[] = {
  258. P_CAN0_RX, P_CAN0_TX, 0
  259. };
  260. static struct resource bfin_can_resources[] = {
  261. {
  262. .start = 0xFFC02A00,
  263. .end = 0xFFC02FFF,
  264. .flags = IORESOURCE_MEM,
  265. },
  266. {
  267. .start = IRQ_CAN_RX,
  268. .end = IRQ_CAN_RX,
  269. .flags = IORESOURCE_IRQ,
  270. },
  271. {
  272. .start = IRQ_CAN_TX,
  273. .end = IRQ_CAN_TX,
  274. .flags = IORESOURCE_IRQ,
  275. },
  276. {
  277. .start = IRQ_CAN_ERROR,
  278. .end = IRQ_CAN_ERROR,
  279. .flags = IORESOURCE_IRQ,
  280. },
  281. };
  282. static struct platform_device bfin_can_device = {
  283. .name = "bfin_can",
  284. .num_resources = ARRAY_SIZE(bfin_can_resources),
  285. .resource = bfin_can_resources,
  286. .dev = {
  287. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  288. },
  289. };
  290. #endif
  291. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  292. static struct platform_device bfin_mii_bus = {
  293. .name = "bfin_mii_bus",
  294. };
  295. static struct platform_device bfin_mac_device = {
  296. .name = "bfin_mac",
  297. .dev.platform_data = &bfin_mii_bus,
  298. };
  299. #endif
  300. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  301. static struct resource net2272_bfin_resources[] = {
  302. {
  303. .start = 0x20300000,
  304. .end = 0x20300000 + 0x100,
  305. .flags = IORESOURCE_MEM,
  306. }, {
  307. .start = IRQ_PF7,
  308. .end = IRQ_PF7,
  309. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  310. },
  311. };
  312. static struct platform_device net2272_bfin_device = {
  313. .name = "net2272",
  314. .id = -1,
  315. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  316. .resource = net2272_bfin_resources,
  317. };
  318. #endif
  319. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  320. #ifdef CONFIG_MTD_PARTITIONS
  321. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  322. static struct mtd_partition bfin_plat_nand_partitions[] = {
  323. {
  324. .name = "linux kernel(nand)",
  325. .size = 0x400000,
  326. .offset = 0,
  327. }, {
  328. .name = "file system(nand)",
  329. .size = MTDPART_SIZ_FULL,
  330. .offset = MTDPART_OFS_APPEND,
  331. },
  332. };
  333. #endif
  334. #define BFIN_NAND_PLAT_CLE 2
  335. #define BFIN_NAND_PLAT_ALE 1
  336. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  337. {
  338. struct nand_chip *this = mtd->priv;
  339. if (cmd == NAND_CMD_NONE)
  340. return;
  341. if (ctrl & NAND_CLE)
  342. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  343. else
  344. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  345. }
  346. #define BFIN_NAND_PLAT_READY GPIO_PF3
  347. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  348. {
  349. return gpio_get_value(BFIN_NAND_PLAT_READY);
  350. }
  351. static struct platform_nand_data bfin_plat_nand_data = {
  352. .chip = {
  353. .chip_delay = 30,
  354. #ifdef CONFIG_MTD_PARTITIONS
  355. .part_probe_types = part_probes,
  356. .partitions = bfin_plat_nand_partitions,
  357. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  358. #endif
  359. },
  360. .ctrl = {
  361. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  362. .dev_ready = bfin_plat_nand_dev_ready,
  363. },
  364. };
  365. #define MAX(x, y) (x > y ? x : y)
  366. static struct resource bfin_plat_nand_resources = {
  367. .start = 0x20212000,
  368. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  369. .flags = IORESOURCE_IO,
  370. };
  371. static struct platform_device bfin_async_nand_device = {
  372. .name = "gen_nand",
  373. .id = -1,
  374. .num_resources = 1,
  375. .resource = &bfin_plat_nand_resources,
  376. .dev = {
  377. .platform_data = &bfin_plat_nand_data,
  378. },
  379. };
  380. static void bfin_plat_nand_init(void)
  381. {
  382. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  383. }
  384. #else
  385. static void bfin_plat_nand_init(void) {}
  386. #endif
  387. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  388. static struct mtd_partition stamp_partitions[] = {
  389. {
  390. .name = "bootloader(nor)",
  391. .size = 0x40000,
  392. .offset = 0,
  393. }, {
  394. .name = "linux kernel(nor)",
  395. .size = 0x180000,
  396. .offset = MTDPART_OFS_APPEND,
  397. }, {
  398. .name = "file system(nor)",
  399. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  400. .offset = MTDPART_OFS_APPEND,
  401. }, {
  402. .name = "MAC Address(nor)",
  403. .size = MTDPART_SIZ_FULL,
  404. .offset = 0x3F0000,
  405. .mask_flags = MTD_WRITEABLE,
  406. }
  407. };
  408. static struct physmap_flash_data stamp_flash_data = {
  409. .width = 2,
  410. .parts = stamp_partitions,
  411. .nr_parts = ARRAY_SIZE(stamp_partitions),
  412. };
  413. static struct resource stamp_flash_resource = {
  414. .start = 0x20000000,
  415. .end = 0x203fffff,
  416. .flags = IORESOURCE_MEM,
  417. };
  418. static struct platform_device stamp_flash_device = {
  419. .name = "physmap-flash",
  420. .id = 0,
  421. .dev = {
  422. .platform_data = &stamp_flash_data,
  423. },
  424. .num_resources = 1,
  425. .resource = &stamp_flash_resource,
  426. };
  427. #endif
  428. #if defined(CONFIG_MTD_M25P80) \
  429. || defined(CONFIG_MTD_M25P80_MODULE)
  430. static struct mtd_partition bfin_spi_flash_partitions[] = {
  431. {
  432. .name = "bootloader(spi)",
  433. .size = 0x00040000,
  434. .offset = 0,
  435. .mask_flags = MTD_CAP_ROM
  436. }, {
  437. .name = "linux kernel(spi)",
  438. .size = 0x180000,
  439. .offset = MTDPART_OFS_APPEND,
  440. }, {
  441. .name = "file system(spi)",
  442. .size = MTDPART_SIZ_FULL,
  443. .offset = MTDPART_OFS_APPEND,
  444. }
  445. };
  446. static struct flash_platform_data bfin_spi_flash_data = {
  447. .name = "m25p80",
  448. .parts = bfin_spi_flash_partitions,
  449. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  450. /* .type = "m25p64", */
  451. };
  452. /* SPI flash chip (m25p64) */
  453. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  454. .enable_dma = 0, /* use dma transfer with this chip*/
  455. .bits_per_word = 8,
  456. };
  457. #endif
  458. #if defined(CONFIG_BFIN_SPI_ADC) \
  459. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  460. /* SPI ADC chip */
  461. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  462. .enable_dma = 1, /* use dma transfer with this chip*/
  463. .bits_per_word = 16,
  464. };
  465. #endif
  466. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  467. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  468. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  469. .enable_dma = 0,
  470. .bits_per_word = 16,
  471. };
  472. #endif
  473. #if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
  474. || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
  475. static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
  476. .enable_dma = 0,
  477. .bits_per_word = 8,
  478. };
  479. #endif
  480. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  481. #include <linux/input/ad714x.h>
  482. static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
  483. .enable_dma = 0,
  484. .bits_per_word = 16,
  485. };
  486. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  487. {
  488. .start_stage = 0,
  489. .end_stage = 7,
  490. .max_coord = 128,
  491. },
  492. };
  493. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  494. {
  495. .keycode = BTN_FORWARD,
  496. .l_mask = 0,
  497. .h_mask = 0x600,
  498. },
  499. {
  500. .keycode = BTN_LEFT,
  501. .l_mask = 0,
  502. .h_mask = 0x500,
  503. },
  504. {
  505. .keycode = BTN_MIDDLE,
  506. .l_mask = 0,
  507. .h_mask = 0x800,
  508. },
  509. {
  510. .keycode = BTN_RIGHT,
  511. .l_mask = 0x100,
  512. .h_mask = 0x400,
  513. },
  514. {
  515. .keycode = BTN_BACK,
  516. .l_mask = 0x200,
  517. .h_mask = 0x400,
  518. },
  519. };
  520. static struct ad714x_platform_data ad7147_spi_platform_data = {
  521. .slider_num = 1,
  522. .button_num = 5,
  523. .slider = ad7147_spi_slider_plat,
  524. .button = ad7147_spi_button_plat,
  525. .stage_cfg_reg = {
  526. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  527. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  528. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  529. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  530. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  531. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  532. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  533. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  534. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  535. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  536. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  537. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  538. },
  539. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  540. };
  541. #endif
  542. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  543. #include <linux/input/ad714x.h>
  544. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  545. {
  546. .keycode = BTN_1,
  547. .l_mask = 0,
  548. .h_mask = 0x1,
  549. },
  550. {
  551. .keycode = BTN_2,
  552. .l_mask = 0,
  553. .h_mask = 0x2,
  554. },
  555. {
  556. .keycode = BTN_3,
  557. .l_mask = 0,
  558. .h_mask = 0x4,
  559. },
  560. {
  561. .keycode = BTN_4,
  562. .l_mask = 0x0,
  563. .h_mask = 0x8,
  564. },
  565. };
  566. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  567. .button_num = 4,
  568. .button = ad7142_i2c_button_plat,
  569. .stage_cfg_reg = {
  570. /* fixme: figure out right setting for all comoponent according
  571. * to hardware feature of EVAL-AD7142EB board */
  572. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  573. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  574. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  575. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  576. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  577. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  578. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  579. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  580. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  581. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  582. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  583. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  584. },
  585. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  586. };
  587. #endif
  588. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  589. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  590. static int bfin_mmc_spi_init(struct device *dev,
  591. irqreturn_t (*detect_int)(int, void *), void *data)
  592. {
  593. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  594. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  595. }
  596. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  597. {
  598. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  599. }
  600. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  601. .init = bfin_mmc_spi_init,
  602. .exit = bfin_mmc_spi_exit,
  603. .detect_delay = 100, /* msecs */
  604. };
  605. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  606. .enable_dma = 0,
  607. .bits_per_word = 8,
  608. .pio_interrupt = 0,
  609. };
  610. #endif
  611. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  612. #include <linux/spi/ad7877.h>
  613. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  614. .enable_dma = 0,
  615. .bits_per_word = 16,
  616. };
  617. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  618. .model = 7877,
  619. .vref_delay_usecs = 50, /* internal, no capacitor */
  620. .x_plate_ohms = 419,
  621. .y_plate_ohms = 486,
  622. .pressure_max = 1000,
  623. .pressure_min = 0,
  624. .stopacq_polarity = 1,
  625. .first_conversion_delay = 3,
  626. .acquisition_time = 1,
  627. .averaging = 1,
  628. .pen_down_acc_interval = 1,
  629. };
  630. #endif
  631. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  632. #include <linux/spi/ad7879.h>
  633. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  634. .model = 7879, /* Model = AD7879 */
  635. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  636. .pressure_max = 10000,
  637. .pressure_min = 0,
  638. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  639. .acquisition_time = 1, /* 4us acquisition time per sample */
  640. .median = 2, /* do 8 measurements */
  641. .averaging = 1, /* take the average of 4 middle samples */
  642. .pen_down_acc_interval = 255, /* 9.4 ms */
  643. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  644. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  645. };
  646. #endif
  647. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  648. #include <linux/input/adxl34x.h>
  649. static const struct adxl34x_platform_data adxl34x_info = {
  650. .x_axis_offset = 0,
  651. .y_axis_offset = 0,
  652. .z_axis_offset = 0,
  653. .tap_threshold = 0x31,
  654. .tap_duration = 0x10,
  655. .tap_latency = 0x60,
  656. .tap_window = 0xF0,
  657. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  658. .act_axis_control = 0xFF,
  659. .activity_threshold = 5,
  660. .inactivity_threshold = 3,
  661. .inactivity_time = 4,
  662. .free_fall_threshold = 0x7,
  663. .free_fall_time = 0x20,
  664. .data_rate = 0x8,
  665. .data_range = ADXL_FULL_RES,
  666. .ev_type = EV_ABS,
  667. .ev_code_x = ABS_X, /* EV_REL */
  668. .ev_code_y = ABS_Y, /* EV_REL */
  669. .ev_code_z = ABS_Z, /* EV_REL */
  670. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  671. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  672. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  673. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  674. .fifo_mode = ADXL_FIFO_STREAM,
  675. };
  676. #endif
  677. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  678. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  679. .enable_dma = 0,
  680. .bits_per_word = 16,
  681. };
  682. #endif
  683. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  684. static struct bfin5xx_spi_chip spidev_chip_info = {
  685. .enable_dma = 0,
  686. .bits_per_word = 8,
  687. };
  688. #endif
  689. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  690. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  691. .enable_dma = 0,
  692. .bits_per_word = 8,
  693. };
  694. #endif
  695. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  696. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  697. .enable_dma = 1,
  698. .bits_per_word = 8,
  699. .cs_gpio = GPIO_PF10,
  700. };
  701. #endif
  702. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  703. static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
  704. .bits_per_word = 16,
  705. .cs_gpio = GPIO_PF10,
  706. };
  707. #include <linux/spi/adf702x.h>
  708. #define TXREG 0x0160A470
  709. static const u32 adf7021_regs[] = {
  710. 0x09608FA0,
  711. 0x00575011,
  712. 0x00A7F092,
  713. 0x2B141563,
  714. 0x81F29E94,
  715. 0x00003155,
  716. 0x050A4F66,
  717. 0x00000007,
  718. 0x00000008,
  719. 0x000231E9,
  720. 0x3296354A,
  721. 0x891A2B3B,
  722. 0x00000D9C,
  723. 0x0000000D,
  724. 0x0000000E,
  725. 0x0000000F,
  726. };
  727. static struct adf702x_platform_data adf7021_platform_data = {
  728. .regs_base = (void *)SPORT1_TCR1,
  729. .dma_ch_rx = CH_SPORT1_RX,
  730. .dma_ch_tx = CH_SPORT1_TX,
  731. .irq_sport_err = IRQ_SPORT1_ERROR,
  732. .gpio_int_rfs = GPIO_PF8,
  733. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  734. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  735. .adf702x_model = MODEL_ADF7021,
  736. .adf702x_regs = adf7021_regs,
  737. .tx_reg = TXREG,
  738. };
  739. #endif
  740. #if defined(CONFIG_MTD_DATAFLASH) \
  741. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  742. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  743. {
  744. .name = "bootloader(spi)",
  745. .size = 0x00040000,
  746. .offset = 0,
  747. .mask_flags = MTD_CAP_ROM
  748. }, {
  749. .name = "linux kernel(spi)",
  750. .size = 0x180000,
  751. .offset = MTDPART_OFS_APPEND,
  752. }, {
  753. .name = "file system(spi)",
  754. .size = MTDPART_SIZ_FULL,
  755. .offset = MTDPART_OFS_APPEND,
  756. }
  757. };
  758. static struct flash_platform_data bfin_spi_dataflash_data = {
  759. .name = "SPI Dataflash",
  760. .parts = bfin_spi_dataflash_partitions,
  761. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  762. };
  763. /* DataFlash chip */
  764. static struct bfin5xx_spi_chip data_flash_chip_info = {
  765. .enable_dma = 0, /* use dma transfer with this chip*/
  766. .bits_per_word = 8,
  767. };
  768. #endif
  769. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  770. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  771. .enable_dma = 0, /* use dma transfer with this chip*/
  772. .bits_per_word = 8,
  773. };
  774. #endif
  775. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  776. #if defined(CONFIG_MTD_M25P80) \
  777. || defined(CONFIG_MTD_M25P80_MODULE)
  778. {
  779. /* the modalias must be the same as spi device driver name */
  780. .modalias = "m25p80", /* Name of spi_driver for this device */
  781. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  782. .bus_num = 0, /* Framework bus number */
  783. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  784. .platform_data = &bfin_spi_flash_data,
  785. .controller_data = &spi_flash_chip_info,
  786. .mode = SPI_MODE_3,
  787. },
  788. #endif
  789. #if defined(CONFIG_MTD_DATAFLASH) \
  790. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  791. { /* DataFlash chip */
  792. .modalias = "mtd_dataflash",
  793. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  794. .bus_num = 0, /* Framework bus number */
  795. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  796. .platform_data = &bfin_spi_dataflash_data,
  797. .controller_data = &data_flash_chip_info,
  798. .mode = SPI_MODE_3,
  799. },
  800. #endif
  801. #if defined(CONFIG_BFIN_SPI_ADC) \
  802. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  803. {
  804. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  805. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  806. .bus_num = 0, /* Framework bus number */
  807. .chip_select = 1, /* Framework chip select. */
  808. .platform_data = NULL, /* No spi_driver specific config */
  809. .controller_data = &spi_adc_chip_info,
  810. },
  811. #endif
  812. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  813. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  814. {
  815. .modalias = "ad1836",
  816. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  817. .bus_num = 0,
  818. .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
  819. .controller_data = &ad1836_spi_chip_info,
  820. .mode = SPI_MODE_3,
  821. },
  822. #endif
  823. #if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
  824. {
  825. .modalias = "ad1938",
  826. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  827. .bus_num = 0,
  828. .chip_select = 5,
  829. .controller_data = &ad1938_spi_chip_info,
  830. .mode = SPI_MODE_3,
  831. },
  832. #endif
  833. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  834. {
  835. .modalias = "ad714x_captouch",
  836. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  837. .irq = IRQ_PF4,
  838. .bus_num = 0,
  839. .chip_select = 5,
  840. .mode = SPI_MODE_3,
  841. .platform_data = &ad7147_spi_platform_data,
  842. .controller_data = &ad7147_spi_chip_info,
  843. },
  844. #endif
  845. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  846. {
  847. .modalias = "mmc_spi",
  848. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  849. .bus_num = 0,
  850. .chip_select = 4,
  851. .platform_data = &bfin_mmc_spi_pdata,
  852. .controller_data = &mmc_spi_chip_info,
  853. .mode = SPI_MODE_3,
  854. },
  855. #endif
  856. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  857. {
  858. .modalias = "ad7877",
  859. .platform_data = &bfin_ad7877_ts_info,
  860. .irq = IRQ_PF6,
  861. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  862. .bus_num = 0,
  863. .chip_select = 1,
  864. .controller_data = &spi_ad7877_chip_info,
  865. },
  866. #endif
  867. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  868. {
  869. .modalias = "ad7879",
  870. .platform_data = &bfin_ad7879_ts_info,
  871. .irq = IRQ_PF7,
  872. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  873. .bus_num = 0,
  874. .chip_select = 1,
  875. .controller_data = &spi_ad7879_chip_info,
  876. .mode = SPI_CPHA | SPI_CPOL,
  877. },
  878. #endif
  879. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  880. {
  881. .modalias = "spidev",
  882. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  883. .bus_num = 0,
  884. .chip_select = 1,
  885. .controller_data = &spidev_chip_info,
  886. },
  887. #endif
  888. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  889. {
  890. .modalias = "bfin-lq035q1-spi",
  891. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  892. .bus_num = 0,
  893. .chip_select = 2,
  894. .controller_data = &lq035q1_spi_chip_info,
  895. .mode = SPI_CPHA | SPI_CPOL,
  896. },
  897. #endif
  898. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  899. {
  900. .modalias = "enc28j60",
  901. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  902. .irq = IRQ_PF6,
  903. .bus_num = 0,
  904. .chip_select = 0, /* GPIO controlled SSEL */
  905. .controller_data = &enc28j60_spi_chip_info,
  906. .mode = SPI_MODE_0,
  907. },
  908. #endif
  909. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  910. {
  911. .modalias = "adxl34x",
  912. .platform_data = &adxl34x_info,
  913. .irq = IRQ_PF6,
  914. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  915. .bus_num = 0,
  916. .chip_select = 2,
  917. .controller_data = &spi_adxl34x_chip_info,
  918. .mode = SPI_MODE_3,
  919. },
  920. #endif
  921. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  922. {
  923. .modalias = "adf702x",
  924. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  925. .bus_num = 0,
  926. .chip_select = 0, /* GPIO controlled SSEL */
  927. .controller_data = &adf7021_spi_chip_info,
  928. .platform_data = &adf7021_platform_data,
  929. .mode = SPI_MODE_0,
  930. },
  931. #endif
  932. };
  933. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  934. /* SPI controller data */
  935. static struct bfin5xx_spi_master bfin_spi0_info = {
  936. .num_chipselect = 8,
  937. .enable_dma = 1, /* master has the ability to do dma transfer */
  938. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  939. };
  940. /* SPI (0) */
  941. static struct resource bfin_spi0_resource[] = {
  942. [0] = {
  943. .start = SPI0_REGBASE,
  944. .end = SPI0_REGBASE + 0xFF,
  945. .flags = IORESOURCE_MEM,
  946. },
  947. [1] = {
  948. .start = CH_SPI,
  949. .end = CH_SPI,
  950. .flags = IORESOURCE_DMA,
  951. },
  952. [2] = {
  953. .start = IRQ_SPI,
  954. .end = IRQ_SPI,
  955. .flags = IORESOURCE_IRQ,
  956. },
  957. };
  958. static struct platform_device bfin_spi0_device = {
  959. .name = "bfin-spi",
  960. .id = 0, /* Bus number */
  961. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  962. .resource = bfin_spi0_resource,
  963. .dev = {
  964. .platform_data = &bfin_spi0_info, /* Passed to driver */
  965. },
  966. };
  967. #endif /* spi master and devices */
  968. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  969. /* SPORT SPI controller data */
  970. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  971. .num_chipselect = 1, /* master only supports one device */
  972. .enable_dma = 0, /* master don't support DMA */
  973. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  974. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  975. };
  976. static struct resource bfin_sport_spi0_resource[] = {
  977. [0] = {
  978. .start = SPORT0_TCR1,
  979. .end = SPORT0_TCR1 + 0xFF,
  980. .flags = IORESOURCE_MEM,
  981. },
  982. [1] = {
  983. .start = IRQ_SPORT0_ERROR,
  984. .end = IRQ_SPORT0_ERROR,
  985. .flags = IORESOURCE_IRQ,
  986. },
  987. };
  988. static struct platform_device bfin_sport_spi0_device = {
  989. .name = "bfin-sport-spi",
  990. .id = 1, /* Bus number */
  991. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  992. .resource = bfin_sport_spi0_resource,
  993. .dev = {
  994. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  995. },
  996. };
  997. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  998. .num_chipselect = 1, /* master only supports one device */
  999. .enable_dma = 0, /* master don't support DMA */
  1000. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1001. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1002. };
  1003. static struct resource bfin_sport_spi1_resource[] = {
  1004. [0] = {
  1005. .start = SPORT1_TCR1,
  1006. .end = SPORT1_TCR1 + 0xFF,
  1007. .flags = IORESOURCE_MEM,
  1008. },
  1009. [1] = {
  1010. .start = IRQ_SPORT1_ERROR,
  1011. .end = IRQ_SPORT1_ERROR,
  1012. .flags = IORESOURCE_IRQ,
  1013. },
  1014. };
  1015. static struct platform_device bfin_sport_spi1_device = {
  1016. .name = "bfin-sport-spi",
  1017. .id = 2, /* Bus number */
  1018. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1019. .resource = bfin_sport_spi1_resource,
  1020. .dev = {
  1021. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1022. },
  1023. };
  1024. #endif /* sport spi master and devices */
  1025. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1026. static struct platform_device bfin_fb_device = {
  1027. .name = "bf537-lq035",
  1028. };
  1029. #endif
  1030. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1031. #include <asm/bfin-lq035q1.h>
  1032. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1033. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1034. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1035. .use_bl = 0, /* let something else control the LCD Blacklight */
  1036. .gpio_bl = GPIO_PF7,
  1037. };
  1038. static struct resource bfin_lq035q1_resources[] = {
  1039. {
  1040. .start = IRQ_PPI_ERROR,
  1041. .end = IRQ_PPI_ERROR,
  1042. .flags = IORESOURCE_IRQ,
  1043. },
  1044. };
  1045. static struct platform_device bfin_lq035q1_device = {
  1046. .name = "bfin-lq035q1",
  1047. .id = -1,
  1048. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1049. .resource = bfin_lq035q1_resources,
  1050. .dev = {
  1051. .platform_data = &bfin_lq035q1_data,
  1052. },
  1053. };
  1054. #endif
  1055. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1056. #ifdef CONFIG_SERIAL_BFIN_UART0
  1057. static struct resource bfin_uart0_resources[] = {
  1058. {
  1059. .start = UART0_THR,
  1060. .end = UART0_GCTL+2,
  1061. .flags = IORESOURCE_MEM,
  1062. },
  1063. {
  1064. .start = IRQ_UART0_RX,
  1065. .end = IRQ_UART0_RX+1,
  1066. .flags = IORESOURCE_IRQ,
  1067. },
  1068. {
  1069. .start = IRQ_UART0_ERROR,
  1070. .end = IRQ_UART0_ERROR,
  1071. .flags = IORESOURCE_IRQ,
  1072. },
  1073. {
  1074. .start = CH_UART0_TX,
  1075. .end = CH_UART0_TX,
  1076. .flags = IORESOURCE_DMA,
  1077. },
  1078. {
  1079. .start = CH_UART0_RX,
  1080. .end = CH_UART0_RX,
  1081. .flags = IORESOURCE_DMA,
  1082. },
  1083. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1084. { /* CTS pin */
  1085. .start = GPIO_PG7,
  1086. .end = GPIO_PG7,
  1087. .flags = IORESOURCE_IO,
  1088. },
  1089. { /* RTS pin */
  1090. .start = GPIO_PG6,
  1091. .end = GPIO_PG6,
  1092. .flags = IORESOURCE_IO,
  1093. },
  1094. #endif
  1095. };
  1096. unsigned short bfin_uart0_peripherals[] = {
  1097. P_UART0_TX, P_UART0_RX, 0
  1098. };
  1099. static struct platform_device bfin_uart0_device = {
  1100. .name = "bfin-uart",
  1101. .id = 0,
  1102. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1103. .resource = bfin_uart0_resources,
  1104. .dev = {
  1105. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1106. },
  1107. };
  1108. #endif
  1109. #ifdef CONFIG_SERIAL_BFIN_UART1
  1110. static struct resource bfin_uart1_resources[] = {
  1111. {
  1112. .start = UART1_THR,
  1113. .end = UART1_GCTL+2,
  1114. .flags = IORESOURCE_MEM,
  1115. },
  1116. {
  1117. .start = IRQ_UART1_RX,
  1118. .end = IRQ_UART1_RX+1,
  1119. .flags = IORESOURCE_IRQ,
  1120. },
  1121. {
  1122. .start = IRQ_UART1_ERROR,
  1123. .end = IRQ_UART1_ERROR,
  1124. .flags = IORESOURCE_IRQ,
  1125. },
  1126. {
  1127. .start = CH_UART1_TX,
  1128. .end = CH_UART1_TX,
  1129. .flags = IORESOURCE_DMA,
  1130. },
  1131. {
  1132. .start = CH_UART1_RX,
  1133. .end = CH_UART1_RX,
  1134. .flags = IORESOURCE_DMA,
  1135. },
  1136. };
  1137. unsigned short bfin_uart1_peripherals[] = {
  1138. P_UART1_TX, P_UART1_RX, 0
  1139. };
  1140. static struct platform_device bfin_uart1_device = {
  1141. .name = "bfin-uart",
  1142. .id = 1,
  1143. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1144. .resource = bfin_uart1_resources,
  1145. .dev = {
  1146. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1147. },
  1148. };
  1149. #endif
  1150. #endif
  1151. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1152. #ifdef CONFIG_BFIN_SIR0
  1153. static struct resource bfin_sir0_resources[] = {
  1154. {
  1155. .start = 0xFFC00400,
  1156. .end = 0xFFC004FF,
  1157. .flags = IORESOURCE_MEM,
  1158. },
  1159. {
  1160. .start = IRQ_UART0_RX,
  1161. .end = IRQ_UART0_RX+1,
  1162. .flags = IORESOURCE_IRQ,
  1163. },
  1164. {
  1165. .start = CH_UART0_RX,
  1166. .end = CH_UART0_RX+1,
  1167. .flags = IORESOURCE_DMA,
  1168. },
  1169. };
  1170. static struct platform_device bfin_sir0_device = {
  1171. .name = "bfin_sir",
  1172. .id = 0,
  1173. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1174. .resource = bfin_sir0_resources,
  1175. };
  1176. #endif
  1177. #ifdef CONFIG_BFIN_SIR1
  1178. static struct resource bfin_sir1_resources[] = {
  1179. {
  1180. .start = 0xFFC02000,
  1181. .end = 0xFFC020FF,
  1182. .flags = IORESOURCE_MEM,
  1183. },
  1184. {
  1185. .start = IRQ_UART1_RX,
  1186. .end = IRQ_UART1_RX+1,
  1187. .flags = IORESOURCE_IRQ,
  1188. },
  1189. {
  1190. .start = CH_UART1_RX,
  1191. .end = CH_UART1_RX+1,
  1192. .flags = IORESOURCE_DMA,
  1193. },
  1194. };
  1195. static struct platform_device bfin_sir1_device = {
  1196. .name = "bfin_sir",
  1197. .id = 1,
  1198. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1199. .resource = bfin_sir1_resources,
  1200. };
  1201. #endif
  1202. #endif
  1203. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1204. static struct resource bfin_twi0_resource[] = {
  1205. [0] = {
  1206. .start = TWI0_REGBASE,
  1207. .end = TWI0_REGBASE,
  1208. .flags = IORESOURCE_MEM,
  1209. },
  1210. [1] = {
  1211. .start = IRQ_TWI,
  1212. .end = IRQ_TWI,
  1213. .flags = IORESOURCE_IRQ,
  1214. },
  1215. };
  1216. static struct platform_device i2c_bfin_twi_device = {
  1217. .name = "i2c-bfin-twi",
  1218. .id = 0,
  1219. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1220. .resource = bfin_twi0_resource,
  1221. };
  1222. #endif
  1223. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1224. #include <linux/i2c/adp5588.h>
  1225. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1226. [0] = KEY_GRAVE,
  1227. [1] = KEY_1,
  1228. [2] = KEY_2,
  1229. [3] = KEY_3,
  1230. [4] = KEY_4,
  1231. [5] = KEY_5,
  1232. [6] = KEY_6,
  1233. [7] = KEY_7,
  1234. [8] = KEY_8,
  1235. [9] = KEY_9,
  1236. [10] = KEY_0,
  1237. [11] = KEY_MINUS,
  1238. [12] = KEY_EQUAL,
  1239. [13] = KEY_BACKSLASH,
  1240. [15] = KEY_KP0,
  1241. [16] = KEY_Q,
  1242. [17] = KEY_W,
  1243. [18] = KEY_E,
  1244. [19] = KEY_R,
  1245. [20] = KEY_T,
  1246. [21] = KEY_Y,
  1247. [22] = KEY_U,
  1248. [23] = KEY_I,
  1249. [24] = KEY_O,
  1250. [25] = KEY_P,
  1251. [26] = KEY_LEFTBRACE,
  1252. [27] = KEY_RIGHTBRACE,
  1253. [29] = KEY_KP1,
  1254. [30] = KEY_KP2,
  1255. [31] = KEY_KP3,
  1256. [32] = KEY_A,
  1257. [33] = KEY_S,
  1258. [34] = KEY_D,
  1259. [35] = KEY_F,
  1260. [36] = KEY_G,
  1261. [37] = KEY_H,
  1262. [38] = KEY_J,
  1263. [39] = KEY_K,
  1264. [40] = KEY_L,
  1265. [41] = KEY_SEMICOLON,
  1266. [42] = KEY_APOSTROPHE,
  1267. [43] = KEY_BACKSLASH,
  1268. [45] = KEY_KP4,
  1269. [46] = KEY_KP5,
  1270. [47] = KEY_KP6,
  1271. [48] = KEY_102ND,
  1272. [49] = KEY_Z,
  1273. [50] = KEY_X,
  1274. [51] = KEY_C,
  1275. [52] = KEY_V,
  1276. [53] = KEY_B,
  1277. [54] = KEY_N,
  1278. [55] = KEY_M,
  1279. [56] = KEY_COMMA,
  1280. [57] = KEY_DOT,
  1281. [58] = KEY_SLASH,
  1282. [60] = KEY_KPDOT,
  1283. [61] = KEY_KP7,
  1284. [62] = KEY_KP8,
  1285. [63] = KEY_KP9,
  1286. [64] = KEY_SPACE,
  1287. [65] = KEY_BACKSPACE,
  1288. [66] = KEY_TAB,
  1289. [67] = KEY_KPENTER,
  1290. [68] = KEY_ENTER,
  1291. [69] = KEY_ESC,
  1292. [70] = KEY_DELETE,
  1293. [74] = KEY_KPMINUS,
  1294. [76] = KEY_UP,
  1295. [77] = KEY_DOWN,
  1296. [78] = KEY_RIGHT,
  1297. [79] = KEY_LEFT,
  1298. };
  1299. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1300. .rows = 8,
  1301. .cols = 10,
  1302. .keymap = adp5588_keymap,
  1303. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1304. .repeat = 0,
  1305. };
  1306. #endif
  1307. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1308. #include <linux/mfd/adp5520.h>
  1309. /*
  1310. * ADP5520/5501 Backlight Data
  1311. */
  1312. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1313. .fade_in = ADP5520_FADE_T_1200ms,
  1314. .fade_out = ADP5520_FADE_T_1200ms,
  1315. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1316. .en_ambl_sens = 1,
  1317. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1318. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1319. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1320. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1321. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1322. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1323. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1324. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1325. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1326. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1327. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1328. };
  1329. /*
  1330. * ADP5520/5501 LEDs Data
  1331. */
  1332. static struct led_info adp5520_leds[] = {
  1333. {
  1334. .name = "adp5520-led1",
  1335. .default_trigger = "none",
  1336. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1337. },
  1338. #ifdef ADP5520_EN_ALL_LEDS
  1339. {
  1340. .name = "adp5520-led2",
  1341. .default_trigger = "none",
  1342. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1343. },
  1344. {
  1345. .name = "adp5520-led3",
  1346. .default_trigger = "none",
  1347. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1348. },
  1349. #endif
  1350. };
  1351. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1352. .num_leds = ARRAY_SIZE(adp5520_leds),
  1353. .leds = adp5520_leds,
  1354. .fade_in = ADP5520_FADE_T_600ms,
  1355. .fade_out = ADP5520_FADE_T_600ms,
  1356. .led_on_time = ADP5520_LED_ONT_600ms,
  1357. };
  1358. /*
  1359. * ADP5520 GPIO Data
  1360. */
  1361. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1362. .gpio_start = 50,
  1363. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1364. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1365. };
  1366. /*
  1367. * ADP5520 Keypad Data
  1368. */
  1369. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1370. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1371. [ADP5520_KEY(0, 1)] = KEY_1,
  1372. [ADP5520_KEY(0, 2)] = KEY_2,
  1373. [ADP5520_KEY(0, 3)] = KEY_3,
  1374. [ADP5520_KEY(1, 0)] = KEY_4,
  1375. [ADP5520_KEY(1, 1)] = KEY_5,
  1376. [ADP5520_KEY(1, 2)] = KEY_6,
  1377. [ADP5520_KEY(1, 3)] = KEY_7,
  1378. [ADP5520_KEY(2, 0)] = KEY_8,
  1379. [ADP5520_KEY(2, 1)] = KEY_9,
  1380. [ADP5520_KEY(2, 2)] = KEY_0,
  1381. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1382. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1383. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1384. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1385. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1386. };
  1387. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1388. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1389. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1390. .keymap = adp5520_keymap,
  1391. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1392. .repeat = 0,
  1393. };
  1394. /*
  1395. * ADP5520/5501 Multifuction Device Init Data
  1396. */
  1397. static struct adp5520_platform_data adp5520_pdev_data = {
  1398. .backlight = &adp5520_backlight_data,
  1399. .leds = &adp5520_leds_data,
  1400. .gpio = &adp5520_gpio_data,
  1401. .keys = &adp5520_keys_data,
  1402. };
  1403. #endif
  1404. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1405. #include <linux/i2c/adp5588.h>
  1406. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1407. .gpio_start = 50,
  1408. .pullup_dis_mask = 0,
  1409. };
  1410. #endif
  1411. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1412. #include <linux/i2c/adp8870.h>
  1413. static struct led_info adp8870_leds[] = {
  1414. {
  1415. .name = "adp8870-led7",
  1416. .default_trigger = "none",
  1417. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1418. },
  1419. };
  1420. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1421. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1422. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1423. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1424. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1425. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1426. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1427. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1428. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1429. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1430. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1431. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1432. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1433. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1434. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1435. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1436. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1437. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1438. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1439. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1440. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1441. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1442. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1443. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1444. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1445. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1446. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1447. .leds = adp8870_leds,
  1448. .num_leds = ARRAY_SIZE(adp8870_leds),
  1449. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1450. .led_fade_in = ADP8870_FADE_T_600ms,
  1451. .led_fade_out = ADP8870_FADE_T_600ms,
  1452. .led_on_time = ADP8870_LED_ONT_200ms,
  1453. };
  1454. #endif
  1455. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  1456. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  1457. {
  1458. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  1459. .irq = IRQ_PG5,
  1460. .platform_data = (void *)&ad7142_i2c_platform_data,
  1461. },
  1462. #endif
  1463. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1464. {
  1465. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1466. },
  1467. #endif
  1468. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1469. {
  1470. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  1471. .irq = IRQ_PG6,
  1472. },
  1473. #endif
  1474. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  1475. {
  1476. I2C_BOARD_INFO("ad7879", 0x2F),
  1477. .irq = IRQ_PG5,
  1478. .platform_data = (void *)&bfin_ad7879_ts_info,
  1479. },
  1480. #endif
  1481. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1482. {
  1483. I2C_BOARD_INFO("adp5588-keys", 0x34),
  1484. .irq = IRQ_PG0,
  1485. .platform_data = (void *)&adp5588_kpad_data,
  1486. },
  1487. #endif
  1488. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1489. {
  1490. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  1491. .irq = IRQ_PG0,
  1492. .platform_data = (void *)&adp5520_pdev_data,
  1493. },
  1494. #endif
  1495. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1496. {
  1497. I2C_BOARD_INFO("adxl34x", 0x53),
  1498. .irq = IRQ_PG3,
  1499. .platform_data = (void *)&adxl34x_info,
  1500. },
  1501. #endif
  1502. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1503. {
  1504. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  1505. .platform_data = (void *)&adp5588_gpio_data,
  1506. },
  1507. #endif
  1508. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  1509. {
  1510. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  1511. },
  1512. #endif
  1513. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1514. {
  1515. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
  1516. },
  1517. #endif
  1518. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1519. {
  1520. I2C_BOARD_INFO("adp8870", 0x2B),
  1521. .platform_data = (void *)&adp8870_pdata,
  1522. },
  1523. #endif
  1524. #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
  1525. {
  1526. I2C_BOARD_INFO("adau1371", 0x1A),
  1527. },
  1528. #endif
  1529. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  1530. {
  1531. I2C_BOARD_INFO("adau1761", 0x38),
  1532. },
  1533. #endif
  1534. #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
  1535. {
  1536. I2C_BOARD_INFO("ad5258", 0x18),
  1537. },
  1538. #endif
  1539. };
  1540. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1541. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1542. static struct resource bfin_sport0_uart_resources[] = {
  1543. {
  1544. .start = SPORT0_TCR1,
  1545. .end = SPORT0_MRCS3+4,
  1546. .flags = IORESOURCE_MEM,
  1547. },
  1548. {
  1549. .start = IRQ_SPORT0_RX,
  1550. .end = IRQ_SPORT0_RX+1,
  1551. .flags = IORESOURCE_IRQ,
  1552. },
  1553. {
  1554. .start = IRQ_SPORT0_ERROR,
  1555. .end = IRQ_SPORT0_ERROR,
  1556. .flags = IORESOURCE_IRQ,
  1557. },
  1558. };
  1559. unsigned short bfin_sport0_peripherals[] = {
  1560. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  1561. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  1562. };
  1563. static struct platform_device bfin_sport0_uart_device = {
  1564. .name = "bfin-sport-uart",
  1565. .id = 0,
  1566. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  1567. .resource = bfin_sport0_uart_resources,
  1568. .dev = {
  1569. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  1570. },
  1571. };
  1572. #endif
  1573. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1574. static struct resource bfin_sport1_uart_resources[] = {
  1575. {
  1576. .start = SPORT1_TCR1,
  1577. .end = SPORT1_MRCS3+4,
  1578. .flags = IORESOURCE_MEM,
  1579. },
  1580. {
  1581. .start = IRQ_SPORT1_RX,
  1582. .end = IRQ_SPORT1_RX+1,
  1583. .flags = IORESOURCE_IRQ,
  1584. },
  1585. {
  1586. .start = IRQ_SPORT1_ERROR,
  1587. .end = IRQ_SPORT1_ERROR,
  1588. .flags = IORESOURCE_IRQ,
  1589. },
  1590. };
  1591. unsigned short bfin_sport1_peripherals[] = {
  1592. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  1593. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  1594. };
  1595. static struct platform_device bfin_sport1_uart_device = {
  1596. .name = "bfin-sport-uart",
  1597. .id = 1,
  1598. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  1599. .resource = bfin_sport1_uart_resources,
  1600. .dev = {
  1601. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  1602. },
  1603. };
  1604. #endif
  1605. #endif
  1606. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1607. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  1608. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  1609. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  1610. #define PATA_INT IRQ_PF5
  1611. static struct pata_platform_info bfin_pata_platform_data = {
  1612. .ioport_shift = 1,
  1613. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  1614. };
  1615. static struct resource bfin_pata_resources[] = {
  1616. {
  1617. .start = 0x20314020,
  1618. .end = 0x2031403F,
  1619. .flags = IORESOURCE_MEM,
  1620. },
  1621. {
  1622. .start = 0x2031401C,
  1623. .end = 0x2031401F,
  1624. .flags = IORESOURCE_MEM,
  1625. },
  1626. {
  1627. .start = PATA_INT,
  1628. .end = PATA_INT,
  1629. .flags = IORESOURCE_IRQ,
  1630. },
  1631. };
  1632. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  1633. static struct pata_platform_info bfin_pata_platform_data = {
  1634. .ioport_shift = 0,
  1635. };
  1636. /* CompactFlash Storage Card Memory Mapped Adressing
  1637. * /REG = A11 = 1
  1638. */
  1639. static struct resource bfin_pata_resources[] = {
  1640. {
  1641. .start = 0x20211800,
  1642. .end = 0x20211807,
  1643. .flags = IORESOURCE_MEM,
  1644. },
  1645. {
  1646. .start = 0x2021180E, /* Device Ctl */
  1647. .end = 0x2021180E,
  1648. .flags = IORESOURCE_MEM,
  1649. },
  1650. };
  1651. #endif
  1652. static struct platform_device bfin_pata_device = {
  1653. .name = "pata_platform",
  1654. .id = -1,
  1655. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  1656. .resource = bfin_pata_resources,
  1657. .dev = {
  1658. .platform_data = &bfin_pata_platform_data,
  1659. }
  1660. };
  1661. #endif
  1662. static const unsigned int cclk_vlev_datasheet[] =
  1663. {
  1664. VRPAIR(VLEV_085, 250000000),
  1665. VRPAIR(VLEV_090, 376000000),
  1666. VRPAIR(VLEV_095, 426000000),
  1667. VRPAIR(VLEV_100, 426000000),
  1668. VRPAIR(VLEV_105, 476000000),
  1669. VRPAIR(VLEV_110, 476000000),
  1670. VRPAIR(VLEV_115, 476000000),
  1671. VRPAIR(VLEV_120, 500000000),
  1672. VRPAIR(VLEV_125, 533000000),
  1673. VRPAIR(VLEV_130, 600000000),
  1674. };
  1675. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1676. .tuple_tab = cclk_vlev_datasheet,
  1677. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1678. .vr_settling_time = 25 /* us */,
  1679. };
  1680. static struct platform_device bfin_dpmc = {
  1681. .name = "bfin dpmc",
  1682. .dev = {
  1683. .platform_data = &bfin_dmpc_vreg_data,
  1684. },
  1685. };
  1686. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1687. static struct platform_device bfin_tdm = {
  1688. .name = "bfin-tdm",
  1689. /* TODO: add platform data here */
  1690. };
  1691. #endif
  1692. static struct platform_device *stamp_devices[] __initdata = {
  1693. &bfin_dpmc,
  1694. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  1695. &bfin_pcmcia_cf_device,
  1696. #endif
  1697. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1698. &rtc_device,
  1699. #endif
  1700. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  1701. &sl811_hcd_device,
  1702. #endif
  1703. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  1704. &isp1362_hcd_device,
  1705. #endif
  1706. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1707. &bfin_isp1760_device,
  1708. #endif
  1709. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  1710. &smc91x_device,
  1711. #endif
  1712. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  1713. &dm9000_device,
  1714. #endif
  1715. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1716. &bfin_can_device,
  1717. #endif
  1718. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  1719. &bfin_mii_bus,
  1720. &bfin_mac_device,
  1721. #endif
  1722. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  1723. &net2272_bfin_device,
  1724. #endif
  1725. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1726. &bfin_spi0_device,
  1727. #endif
  1728. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1729. &bfin_sport_spi0_device,
  1730. &bfin_sport_spi1_device,
  1731. #endif
  1732. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1733. &bfin_fb_device,
  1734. #endif
  1735. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1736. &bfin_lq035q1_device,
  1737. #endif
  1738. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1739. #ifdef CONFIG_SERIAL_BFIN_UART0
  1740. &bfin_uart0_device,
  1741. #endif
  1742. #ifdef CONFIG_SERIAL_BFIN_UART1
  1743. &bfin_uart1_device,
  1744. #endif
  1745. #endif
  1746. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1747. #ifdef CONFIG_BFIN_SIR0
  1748. &bfin_sir0_device,
  1749. #endif
  1750. #ifdef CONFIG_BFIN_SIR1
  1751. &bfin_sir1_device,
  1752. #endif
  1753. #endif
  1754. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1755. &i2c_bfin_twi_device,
  1756. #endif
  1757. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1758. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1759. &bfin_sport0_uart_device,
  1760. #endif
  1761. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1762. &bfin_sport1_uart_device,
  1763. #endif
  1764. #endif
  1765. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  1766. &bfin_pata_device,
  1767. #endif
  1768. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1769. &bfin_device_gpiokeys,
  1770. #endif
  1771. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  1772. &bfin_async_nand_device,
  1773. #endif
  1774. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  1775. &stamp_flash_device,
  1776. #endif
  1777. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  1778. &bfin_tdm,
  1779. #endif
  1780. };
  1781. static int __init stamp_init(void)
  1782. {
  1783. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1784. bfin_plat_nand_init();
  1785. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1786. i2c_register_board_info(0, bfin_i2c_board_info,
  1787. ARRAY_SIZE(bfin_i2c_board_info));
  1788. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1789. return 0;
  1790. }
  1791. arch_initcall(stamp_init);
  1792. static struct platform_device *stamp_early_devices[] __initdata = {
  1793. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1794. #ifdef CONFIG_SERIAL_BFIN_UART0
  1795. &bfin_uart0_device,
  1796. #endif
  1797. #ifdef CONFIG_SERIAL_BFIN_UART1
  1798. &bfin_uart1_device,
  1799. #endif
  1800. #endif
  1801. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1802. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1803. &bfin_sport0_uart_device,
  1804. #endif
  1805. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1806. &bfin_sport1_uart_device,
  1807. #endif
  1808. #endif
  1809. };
  1810. void __init native_machine_early_platform_add_devices(void)
  1811. {
  1812. printk(KERN_INFO "register early platform devices\n");
  1813. early_platform_add_devices(stamp_early_devices,
  1814. ARRAY_SIZE(stamp_early_devices));
  1815. }
  1816. void native_machine_restart(char *cmd)
  1817. {
  1818. /* workaround reboot hang when booting from SPI */
  1819. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1820. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1821. }
  1822. /*
  1823. * Currently the MAC address is saved in Flash by U-Boot
  1824. */
  1825. #define FLASH_MAC 0x203f0000
  1826. void bfin_get_ether_addr(char *addr)
  1827. {
  1828. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  1829. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  1830. }
  1831. EXPORT_SYMBOL(bfin_get_ether_addr);