vmwgfx_kms.c 55 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. struct vmw_clip_rect {
  31. int x1, x2, y1, y2;
  32. };
  33. /**
  34. * Clip @num_rects number of @rects against @clip storing the
  35. * results in @out_rects and the number of passed rects in @out_num.
  36. */
  37. void vmw_clip_cliprects(struct drm_clip_rect *rects,
  38. int num_rects,
  39. struct vmw_clip_rect clip,
  40. SVGASignedRect *out_rects,
  41. int *out_num)
  42. {
  43. int i, k;
  44. for (i = 0, k = 0; i < num_rects; i++) {
  45. int x1 = max_t(int, clip.x1, rects[i].x1);
  46. int y1 = max_t(int, clip.y1, rects[i].y1);
  47. int x2 = min_t(int, clip.x2, rects[i].x2);
  48. int y2 = min_t(int, clip.y2, rects[i].y2);
  49. if (x1 >= x2)
  50. continue;
  51. if (y1 >= y2)
  52. continue;
  53. out_rects[k].left = x1;
  54. out_rects[k].top = y1;
  55. out_rects[k].right = x2;
  56. out_rects[k].bottom = y2;
  57. k++;
  58. }
  59. *out_num = k;
  60. }
  61. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  62. {
  63. if (du->cursor_surface)
  64. vmw_surface_unreference(&du->cursor_surface);
  65. if (du->cursor_dmabuf)
  66. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  67. drm_crtc_cleanup(&du->crtc);
  68. drm_encoder_cleanup(&du->encoder);
  69. drm_connector_cleanup(&du->connector);
  70. }
  71. /*
  72. * Display Unit Cursor functions
  73. */
  74. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  75. u32 *image, u32 width, u32 height,
  76. u32 hotspotX, u32 hotspotY)
  77. {
  78. struct {
  79. u32 cmd;
  80. SVGAFifoCmdDefineAlphaCursor cursor;
  81. } *cmd;
  82. u32 image_size = width * height * 4;
  83. u32 cmd_size = sizeof(*cmd) + image_size;
  84. if (!image)
  85. return -EINVAL;
  86. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  87. if (unlikely(cmd == NULL)) {
  88. DRM_ERROR("Fifo reserve failed.\n");
  89. return -ENOMEM;
  90. }
  91. memset(cmd, 0, sizeof(*cmd));
  92. memcpy(&cmd[1], image, image_size);
  93. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  94. cmd->cursor.id = cpu_to_le32(0);
  95. cmd->cursor.width = cpu_to_le32(width);
  96. cmd->cursor.height = cpu_to_le32(height);
  97. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  98. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  99. vmw_fifo_commit(dev_priv, cmd_size);
  100. return 0;
  101. }
  102. int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
  103. struct vmw_dma_buffer *dmabuf,
  104. u32 width, u32 height,
  105. u32 hotspotX, u32 hotspotY)
  106. {
  107. struct ttm_bo_kmap_obj map;
  108. unsigned long kmap_offset;
  109. unsigned long kmap_num;
  110. void *virtual;
  111. bool dummy;
  112. int ret;
  113. kmap_offset = 0;
  114. kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
  115. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  116. if (unlikely(ret != 0)) {
  117. DRM_ERROR("reserve failed\n");
  118. return -EINVAL;
  119. }
  120. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  121. if (unlikely(ret != 0))
  122. goto err_unreserve;
  123. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  124. ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
  125. hotspotX, hotspotY);
  126. ttm_bo_kunmap(&map);
  127. err_unreserve:
  128. ttm_bo_unreserve(&dmabuf->base);
  129. return ret;
  130. }
  131. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  132. bool show, int x, int y)
  133. {
  134. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  135. uint32_t count;
  136. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  137. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  138. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  139. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  140. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  141. }
  142. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  143. uint32_t handle, uint32_t width, uint32_t height)
  144. {
  145. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  146. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  147. struct vmw_surface *surface = NULL;
  148. struct vmw_dma_buffer *dmabuf = NULL;
  149. int ret;
  150. /*
  151. * FIXME: Unclear whether there's any global state touched by the
  152. * cursor_set function, especially vmw_cursor_update_position looks
  153. * suspicious. For now take the easy route and reacquire all locks. We
  154. * can do this since the caller in the drm core doesn't check anything
  155. * which is protected by any looks.
  156. */
  157. mutex_unlock(&crtc->mutex);
  158. drm_modeset_lock_all(dev_priv->dev);
  159. /* A lot of the code assumes this */
  160. if (handle && (width != 64 || height != 64)) {
  161. ret = -EINVAL;
  162. goto out;
  163. }
  164. if (handle) {
  165. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  166. ret = vmw_user_lookup_handle(dev_priv, tfile,
  167. handle, &surface, &dmabuf);
  168. if (ret) {
  169. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  170. ret = -EINVAL;
  171. goto out;
  172. }
  173. }
  174. /* need to do this before taking down old image */
  175. if (surface && !surface->snooper.image) {
  176. DRM_ERROR("surface not suitable for cursor\n");
  177. vmw_surface_unreference(&surface);
  178. ret = -EINVAL;
  179. goto out;
  180. }
  181. /* takedown old cursor */
  182. if (du->cursor_surface) {
  183. du->cursor_surface->snooper.crtc = NULL;
  184. vmw_surface_unreference(&du->cursor_surface);
  185. }
  186. if (du->cursor_dmabuf)
  187. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  188. /* setup new image */
  189. if (surface) {
  190. /* vmw_user_surface_lookup takes one reference */
  191. du->cursor_surface = surface;
  192. du->cursor_surface->snooper.crtc = crtc;
  193. du->cursor_age = du->cursor_surface->snooper.age;
  194. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  195. 64, 64, du->hotspot_x, du->hotspot_y);
  196. } else if (dmabuf) {
  197. /* vmw_user_surface_lookup takes one reference */
  198. du->cursor_dmabuf = dmabuf;
  199. ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
  200. du->hotspot_x, du->hotspot_y);
  201. } else {
  202. vmw_cursor_update_position(dev_priv, false, 0, 0);
  203. ret = 0;
  204. goto out;
  205. }
  206. vmw_cursor_update_position(dev_priv, true,
  207. du->cursor_x + du->hotspot_x,
  208. du->cursor_y + du->hotspot_y);
  209. ret = 0;
  210. out:
  211. drm_modeset_unlock_all(dev_priv->dev);
  212. mutex_lock(&crtc->mutex);
  213. return ret;
  214. }
  215. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  216. {
  217. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  218. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  219. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  220. du->cursor_x = x + crtc->x;
  221. du->cursor_y = y + crtc->y;
  222. /*
  223. * FIXME: Unclear whether there's any global state touched by the
  224. * cursor_set function, especially vmw_cursor_update_position looks
  225. * suspicious. For now take the easy route and reacquire all locks. We
  226. * can do this since the caller in the drm core doesn't check anything
  227. * which is protected by any looks.
  228. */
  229. mutex_unlock(&crtc->mutex);
  230. drm_modeset_lock_all(dev_priv->dev);
  231. vmw_cursor_update_position(dev_priv, shown,
  232. du->cursor_x + du->hotspot_x,
  233. du->cursor_y + du->hotspot_y);
  234. drm_modeset_unlock_all(dev_priv->dev);
  235. mutex_lock(&crtc->mutex);
  236. return 0;
  237. }
  238. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  239. struct ttm_object_file *tfile,
  240. struct ttm_buffer_object *bo,
  241. SVGA3dCmdHeader *header)
  242. {
  243. struct ttm_bo_kmap_obj map;
  244. unsigned long kmap_offset;
  245. unsigned long kmap_num;
  246. SVGA3dCopyBox *box;
  247. unsigned box_count;
  248. void *virtual;
  249. bool dummy;
  250. struct vmw_dma_cmd {
  251. SVGA3dCmdHeader header;
  252. SVGA3dCmdSurfaceDMA dma;
  253. } *cmd;
  254. int i, ret;
  255. cmd = container_of(header, struct vmw_dma_cmd, header);
  256. /* No snooper installed */
  257. if (!srf->snooper.image)
  258. return;
  259. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  260. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  261. return;
  262. }
  263. if (cmd->header.size < 64) {
  264. DRM_ERROR("at least one full copy box must be given\n");
  265. return;
  266. }
  267. box = (SVGA3dCopyBox *)&cmd[1];
  268. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  269. sizeof(SVGA3dCopyBox);
  270. if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  271. box->x != 0 || box->y != 0 || box->z != 0 ||
  272. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  273. box->d != 1 || box_count != 1) {
  274. /* TODO handle none page aligned offsets */
  275. /* TODO handle more dst & src != 0 */
  276. /* TODO handle more then one copy */
  277. DRM_ERROR("Cant snoop dma request for cursor!\n");
  278. DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
  279. box->srcx, box->srcy, box->srcz,
  280. box->x, box->y, box->z,
  281. box->w, box->h, box->d, box_count,
  282. cmd->dma.guest.ptr.offset);
  283. return;
  284. }
  285. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  286. kmap_num = (64*64*4) >> PAGE_SHIFT;
  287. ret = ttm_bo_reserve(bo, true, false, false, 0);
  288. if (unlikely(ret != 0)) {
  289. DRM_ERROR("reserve failed\n");
  290. return;
  291. }
  292. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  293. if (unlikely(ret != 0))
  294. goto err_unreserve;
  295. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  296. if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
  297. memcpy(srf->snooper.image, virtual, 64*64*4);
  298. } else {
  299. /* Image is unsigned pointer. */
  300. for (i = 0; i < box->h; i++)
  301. memcpy(srf->snooper.image + i * 64,
  302. virtual + i * cmd->dma.guest.pitch,
  303. box->w * 4);
  304. }
  305. srf->snooper.age++;
  306. /* we can't call this function from this function since execbuf has
  307. * reserved fifo space.
  308. *
  309. * if (srf->snooper.crtc)
  310. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  311. * srf->snooper.image, 64, 64,
  312. * du->hotspot_x, du->hotspot_y);
  313. */
  314. ttm_bo_kunmap(&map);
  315. err_unreserve:
  316. ttm_bo_unreserve(bo);
  317. }
  318. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  319. {
  320. struct drm_device *dev = dev_priv->dev;
  321. struct vmw_display_unit *du;
  322. struct drm_crtc *crtc;
  323. mutex_lock(&dev->mode_config.mutex);
  324. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  325. du = vmw_crtc_to_du(crtc);
  326. if (!du->cursor_surface ||
  327. du->cursor_age == du->cursor_surface->snooper.age)
  328. continue;
  329. du->cursor_age = du->cursor_surface->snooper.age;
  330. vmw_cursor_update_image(dev_priv,
  331. du->cursor_surface->snooper.image,
  332. 64, 64, du->hotspot_x, du->hotspot_y);
  333. }
  334. mutex_unlock(&dev->mode_config.mutex);
  335. }
  336. /*
  337. * Generic framebuffer code
  338. */
  339. /*
  340. * Surface framebuffer code
  341. */
  342. #define vmw_framebuffer_to_vfbs(x) \
  343. container_of(x, struct vmw_framebuffer_surface, base.base)
  344. struct vmw_framebuffer_surface {
  345. struct vmw_framebuffer base;
  346. struct vmw_surface *surface;
  347. struct vmw_dma_buffer *buffer;
  348. struct list_head head;
  349. struct drm_master *master;
  350. };
  351. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  352. {
  353. struct vmw_framebuffer_surface *vfbs =
  354. vmw_framebuffer_to_vfbs(framebuffer);
  355. struct vmw_master *vmaster = vmw_master(vfbs->master);
  356. mutex_lock(&vmaster->fb_surf_mutex);
  357. list_del(&vfbs->head);
  358. mutex_unlock(&vmaster->fb_surf_mutex);
  359. drm_master_put(&vfbs->master);
  360. drm_framebuffer_cleanup(framebuffer);
  361. vmw_surface_unreference(&vfbs->surface);
  362. ttm_base_object_unref(&vfbs->base.user_obj);
  363. kfree(vfbs);
  364. }
  365. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  366. struct drm_file *file_priv,
  367. struct vmw_framebuffer *framebuffer,
  368. unsigned flags, unsigned color,
  369. struct drm_clip_rect *clips,
  370. unsigned num_clips, int inc,
  371. struct vmw_fence_obj **out_fence)
  372. {
  373. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  374. struct drm_clip_rect *clips_ptr;
  375. struct drm_clip_rect *tmp;
  376. struct drm_crtc *crtc;
  377. size_t fifo_size;
  378. int i, num_units;
  379. int ret = 0; /* silence warning */
  380. int left, right, top, bottom;
  381. struct {
  382. SVGA3dCmdHeader header;
  383. SVGA3dCmdBlitSurfaceToScreen body;
  384. } *cmd;
  385. SVGASignedRect *blits;
  386. num_units = 0;
  387. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  388. head) {
  389. if (crtc->fb != &framebuffer->base)
  390. continue;
  391. units[num_units++] = vmw_crtc_to_du(crtc);
  392. }
  393. BUG_ON(!clips || !num_clips);
  394. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  395. if (unlikely(tmp == NULL)) {
  396. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  397. return -ENOMEM;
  398. }
  399. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  400. cmd = kzalloc(fifo_size, GFP_KERNEL);
  401. if (unlikely(cmd == NULL)) {
  402. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  403. ret = -ENOMEM;
  404. goto out_free_tmp;
  405. }
  406. /* setup blits pointer */
  407. blits = (SVGASignedRect *)&cmd[1];
  408. /* initial clip region */
  409. left = clips->x1;
  410. right = clips->x2;
  411. top = clips->y1;
  412. bottom = clips->y2;
  413. /* skip the first clip rect */
  414. for (i = 1, clips_ptr = clips + inc;
  415. i < num_clips; i++, clips_ptr += inc) {
  416. left = min_t(int, left, (int)clips_ptr->x1);
  417. right = max_t(int, right, (int)clips_ptr->x2);
  418. top = min_t(int, top, (int)clips_ptr->y1);
  419. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  420. }
  421. /* only need to do this once */
  422. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  423. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  424. cmd->body.srcRect.left = left;
  425. cmd->body.srcRect.right = right;
  426. cmd->body.srcRect.top = top;
  427. cmd->body.srcRect.bottom = bottom;
  428. clips_ptr = clips;
  429. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  430. tmp[i].x1 = clips_ptr->x1 - left;
  431. tmp[i].x2 = clips_ptr->x2 - left;
  432. tmp[i].y1 = clips_ptr->y1 - top;
  433. tmp[i].y2 = clips_ptr->y2 - top;
  434. }
  435. /* do per unit writing, reuse fifo for each */
  436. for (i = 0; i < num_units; i++) {
  437. struct vmw_display_unit *unit = units[i];
  438. struct vmw_clip_rect clip;
  439. int num;
  440. clip.x1 = left - unit->crtc.x;
  441. clip.y1 = top - unit->crtc.y;
  442. clip.x2 = right - unit->crtc.x;
  443. clip.y2 = bottom - unit->crtc.y;
  444. /* skip any crtcs that misses the clip region */
  445. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  446. clip.y1 >= unit->crtc.mode.vdisplay ||
  447. clip.x2 <= 0 || clip.y2 <= 0)
  448. continue;
  449. /*
  450. * In order for the clip rects to be correctly scaled
  451. * the src and dest rects needs to be the same size.
  452. */
  453. cmd->body.destRect.left = clip.x1;
  454. cmd->body.destRect.right = clip.x2;
  455. cmd->body.destRect.top = clip.y1;
  456. cmd->body.destRect.bottom = clip.y2;
  457. /* create a clip rect of the crtc in dest coords */
  458. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  459. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  460. clip.x1 = 0 - clip.x1;
  461. clip.y1 = 0 - clip.y1;
  462. /* need to reset sid as it is changed by execbuf */
  463. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  464. cmd->body.destScreenId = unit->unit;
  465. /* clip and write blits to cmd stream */
  466. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  467. /* if no cliprects hit skip this */
  468. if (num == 0)
  469. continue;
  470. /* only return the last fence */
  471. if (out_fence && *out_fence)
  472. vmw_fence_obj_unreference(out_fence);
  473. /* recalculate package length */
  474. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  475. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  476. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  477. fifo_size, 0, NULL, out_fence);
  478. if (unlikely(ret != 0))
  479. break;
  480. }
  481. kfree(cmd);
  482. out_free_tmp:
  483. kfree(tmp);
  484. return ret;
  485. }
  486. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  487. struct drm_file *file_priv,
  488. unsigned flags, unsigned color,
  489. struct drm_clip_rect *clips,
  490. unsigned num_clips)
  491. {
  492. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  493. struct vmw_master *vmaster = vmw_master(file_priv->master);
  494. struct vmw_framebuffer_surface *vfbs =
  495. vmw_framebuffer_to_vfbs(framebuffer);
  496. struct drm_clip_rect norect;
  497. int ret, inc = 1;
  498. if (unlikely(vfbs->master != file_priv->master))
  499. return -EINVAL;
  500. /* Require ScreenObject support for 3D */
  501. if (!dev_priv->sou_priv)
  502. return -EINVAL;
  503. ret = ttm_read_lock(&vmaster->lock, true);
  504. if (unlikely(ret != 0))
  505. return ret;
  506. if (!num_clips) {
  507. num_clips = 1;
  508. clips = &norect;
  509. norect.x1 = norect.y1 = 0;
  510. norect.x2 = framebuffer->width;
  511. norect.y2 = framebuffer->height;
  512. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  513. num_clips /= 2;
  514. inc = 2; /* skip source rects */
  515. }
  516. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  517. flags, color,
  518. clips, num_clips, inc, NULL);
  519. ttm_read_unlock(&vmaster->lock);
  520. return 0;
  521. }
  522. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  523. .destroy = vmw_framebuffer_surface_destroy,
  524. .dirty = vmw_framebuffer_surface_dirty,
  525. };
  526. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  527. struct drm_file *file_priv,
  528. struct vmw_surface *surface,
  529. struct vmw_framebuffer **out,
  530. const struct drm_mode_fb_cmd
  531. *mode_cmd)
  532. {
  533. struct drm_device *dev = dev_priv->dev;
  534. struct vmw_framebuffer_surface *vfbs;
  535. enum SVGA3dSurfaceFormat format;
  536. struct vmw_master *vmaster = vmw_master(file_priv->master);
  537. int ret;
  538. /* 3D is only supported on HWv8 hosts which supports screen objects */
  539. if (!dev_priv->sou_priv)
  540. return -ENOSYS;
  541. /*
  542. * Sanity checks.
  543. */
  544. /* Surface must be marked as a scanout. */
  545. if (unlikely(!surface->scanout))
  546. return -EINVAL;
  547. if (unlikely(surface->mip_levels[0] != 1 ||
  548. surface->num_sizes != 1 ||
  549. surface->sizes[0].width < mode_cmd->width ||
  550. surface->sizes[0].height < mode_cmd->height ||
  551. surface->sizes[0].depth != 1)) {
  552. DRM_ERROR("Incompatible surface dimensions "
  553. "for requested mode.\n");
  554. return -EINVAL;
  555. }
  556. switch (mode_cmd->depth) {
  557. case 32:
  558. format = SVGA3D_A8R8G8B8;
  559. break;
  560. case 24:
  561. format = SVGA3D_X8R8G8B8;
  562. break;
  563. case 16:
  564. format = SVGA3D_R5G6B5;
  565. break;
  566. case 15:
  567. format = SVGA3D_A1R5G5B5;
  568. break;
  569. case 8:
  570. format = SVGA3D_LUMINANCE8;
  571. break;
  572. default:
  573. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  574. return -EINVAL;
  575. }
  576. if (unlikely(format != surface->format)) {
  577. DRM_ERROR("Invalid surface format for requested mode.\n");
  578. return -EINVAL;
  579. }
  580. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  581. if (!vfbs) {
  582. ret = -ENOMEM;
  583. goto out_err1;
  584. }
  585. if (!vmw_surface_reference(surface)) {
  586. DRM_ERROR("failed to reference surface %p\n", surface);
  587. ret = -EINVAL;
  588. goto out_err2;
  589. }
  590. /* XXX get the first 3 from the surface info */
  591. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  592. vfbs->base.base.pitches[0] = mode_cmd->pitch;
  593. vfbs->base.base.depth = mode_cmd->depth;
  594. vfbs->base.base.width = mode_cmd->width;
  595. vfbs->base.base.height = mode_cmd->height;
  596. vfbs->surface = surface;
  597. vfbs->base.user_handle = mode_cmd->handle;
  598. vfbs->master = drm_master_get(file_priv->master);
  599. mutex_lock(&vmaster->fb_surf_mutex);
  600. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  601. mutex_unlock(&vmaster->fb_surf_mutex);
  602. *out = &vfbs->base;
  603. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  604. &vmw_framebuffer_surface_funcs);
  605. if (ret)
  606. goto out_err3;
  607. return 0;
  608. out_err3:
  609. vmw_surface_unreference(&surface);
  610. out_err2:
  611. kfree(vfbs);
  612. out_err1:
  613. return ret;
  614. }
  615. /*
  616. * Dmabuf framebuffer code
  617. */
  618. #define vmw_framebuffer_to_vfbd(x) \
  619. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  620. struct vmw_framebuffer_dmabuf {
  621. struct vmw_framebuffer base;
  622. struct vmw_dma_buffer *buffer;
  623. };
  624. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  625. {
  626. struct vmw_framebuffer_dmabuf *vfbd =
  627. vmw_framebuffer_to_vfbd(framebuffer);
  628. drm_framebuffer_cleanup(framebuffer);
  629. vmw_dmabuf_unreference(&vfbd->buffer);
  630. ttm_base_object_unref(&vfbd->base.user_obj);
  631. kfree(vfbd);
  632. }
  633. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  634. struct vmw_framebuffer *framebuffer,
  635. unsigned flags, unsigned color,
  636. struct drm_clip_rect *clips,
  637. unsigned num_clips, int increment)
  638. {
  639. size_t fifo_size;
  640. int i;
  641. struct {
  642. uint32_t header;
  643. SVGAFifoCmdUpdate body;
  644. } *cmd;
  645. fifo_size = sizeof(*cmd) * num_clips;
  646. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  647. if (unlikely(cmd == NULL)) {
  648. DRM_ERROR("Fifo reserve failed.\n");
  649. return -ENOMEM;
  650. }
  651. memset(cmd, 0, fifo_size);
  652. for (i = 0; i < num_clips; i++, clips += increment) {
  653. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  654. cmd[i].body.x = cpu_to_le32(clips->x1);
  655. cmd[i].body.y = cpu_to_le32(clips->y1);
  656. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  657. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  658. }
  659. vmw_fifo_commit(dev_priv, fifo_size);
  660. return 0;
  661. }
  662. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  663. struct vmw_private *dev_priv,
  664. struct vmw_framebuffer *framebuffer)
  665. {
  666. int depth = framebuffer->base.depth;
  667. size_t fifo_size;
  668. int ret;
  669. struct {
  670. uint32_t header;
  671. SVGAFifoCmdDefineGMRFB body;
  672. } *cmd;
  673. /* Emulate RGBA support, contrary to svga_reg.h this is not
  674. * supported by hosts. This is only a problem if we are reading
  675. * this value later and expecting what we uploaded back.
  676. */
  677. if (depth == 32)
  678. depth = 24;
  679. fifo_size = sizeof(*cmd);
  680. cmd = kmalloc(fifo_size, GFP_KERNEL);
  681. if (unlikely(cmd == NULL)) {
  682. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  683. return -ENOMEM;
  684. }
  685. memset(cmd, 0, fifo_size);
  686. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  687. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  688. cmd->body.format.colorDepth = depth;
  689. cmd->body.format.reserved = 0;
  690. cmd->body.bytesPerLine = framebuffer->base.pitches[0];
  691. cmd->body.ptr.gmrId = framebuffer->user_handle;
  692. cmd->body.ptr.offset = 0;
  693. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  694. fifo_size, 0, NULL, NULL);
  695. kfree(cmd);
  696. return ret;
  697. }
  698. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  699. struct vmw_private *dev_priv,
  700. struct vmw_framebuffer *framebuffer,
  701. unsigned flags, unsigned color,
  702. struct drm_clip_rect *clips,
  703. unsigned num_clips, int increment,
  704. struct vmw_fence_obj **out_fence)
  705. {
  706. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  707. struct drm_clip_rect *clips_ptr;
  708. int i, k, num_units, ret;
  709. struct drm_crtc *crtc;
  710. size_t fifo_size;
  711. struct {
  712. uint32_t header;
  713. SVGAFifoCmdBlitGMRFBToScreen body;
  714. } *blits;
  715. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  716. if (unlikely(ret != 0))
  717. return ret; /* define_gmrfb prints warnings */
  718. fifo_size = sizeof(*blits) * num_clips;
  719. blits = kmalloc(fifo_size, GFP_KERNEL);
  720. if (unlikely(blits == NULL)) {
  721. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  722. return -ENOMEM;
  723. }
  724. num_units = 0;
  725. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  726. if (crtc->fb != &framebuffer->base)
  727. continue;
  728. units[num_units++] = vmw_crtc_to_du(crtc);
  729. }
  730. for (k = 0; k < num_units; k++) {
  731. struct vmw_display_unit *unit = units[k];
  732. int hit_num = 0;
  733. clips_ptr = clips;
  734. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  735. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  736. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  737. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  738. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  739. int move_x, move_y;
  740. /* skip any crtcs that misses the clip region */
  741. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  742. clip_y1 >= unit->crtc.mode.vdisplay ||
  743. clip_x2 <= 0 || clip_y2 <= 0)
  744. continue;
  745. /* clip size to crtc size */
  746. clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
  747. clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
  748. /* translate both src and dest to bring clip into screen */
  749. move_x = min_t(int, clip_x1, 0);
  750. move_y = min_t(int, clip_y1, 0);
  751. /* actual translate done here */
  752. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  753. blits[hit_num].body.destScreenId = unit->unit;
  754. blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
  755. blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
  756. blits[hit_num].body.destRect.left = clip_x1 - move_x;
  757. blits[hit_num].body.destRect.top = clip_y1 - move_y;
  758. blits[hit_num].body.destRect.right = clip_x2;
  759. blits[hit_num].body.destRect.bottom = clip_y2;
  760. hit_num++;
  761. }
  762. /* no clips hit the crtc */
  763. if (hit_num == 0)
  764. continue;
  765. /* only return the last fence */
  766. if (out_fence && *out_fence)
  767. vmw_fence_obj_unreference(out_fence);
  768. fifo_size = sizeof(*blits) * hit_num;
  769. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  770. fifo_size, 0, NULL, out_fence);
  771. if (unlikely(ret != 0))
  772. break;
  773. }
  774. kfree(blits);
  775. return ret;
  776. }
  777. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  778. struct drm_file *file_priv,
  779. unsigned flags, unsigned color,
  780. struct drm_clip_rect *clips,
  781. unsigned num_clips)
  782. {
  783. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  784. struct vmw_master *vmaster = vmw_master(file_priv->master);
  785. struct vmw_framebuffer_dmabuf *vfbd =
  786. vmw_framebuffer_to_vfbd(framebuffer);
  787. struct drm_clip_rect norect;
  788. int ret, increment = 1;
  789. ret = ttm_read_lock(&vmaster->lock, true);
  790. if (unlikely(ret != 0))
  791. return ret;
  792. if (!num_clips) {
  793. num_clips = 1;
  794. clips = &norect;
  795. norect.x1 = norect.y1 = 0;
  796. norect.x2 = framebuffer->width;
  797. norect.y2 = framebuffer->height;
  798. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  799. num_clips /= 2;
  800. increment = 2;
  801. }
  802. if (dev_priv->ldu_priv) {
  803. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  804. flags, color,
  805. clips, num_clips, increment);
  806. } else {
  807. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  808. flags, color,
  809. clips, num_clips, increment, NULL);
  810. }
  811. ttm_read_unlock(&vmaster->lock);
  812. return ret;
  813. }
  814. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  815. .destroy = vmw_framebuffer_dmabuf_destroy,
  816. .dirty = vmw_framebuffer_dmabuf_dirty,
  817. };
  818. /**
  819. * Pin the dmabuffer to the start of vram.
  820. */
  821. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  822. {
  823. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  824. struct vmw_framebuffer_dmabuf *vfbd =
  825. vmw_framebuffer_to_vfbd(&vfb->base);
  826. int ret;
  827. /* This code should not be used with screen objects */
  828. BUG_ON(dev_priv->sou_priv);
  829. vmw_overlay_pause_all(dev_priv);
  830. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  831. vmw_overlay_resume_all(dev_priv);
  832. WARN_ON(ret != 0);
  833. return 0;
  834. }
  835. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  836. {
  837. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  838. struct vmw_framebuffer_dmabuf *vfbd =
  839. vmw_framebuffer_to_vfbd(&vfb->base);
  840. if (!vfbd->buffer) {
  841. WARN_ON(!vfbd->buffer);
  842. return 0;
  843. }
  844. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  845. }
  846. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  847. struct vmw_dma_buffer *dmabuf,
  848. struct vmw_framebuffer **out,
  849. const struct drm_mode_fb_cmd
  850. *mode_cmd)
  851. {
  852. struct drm_device *dev = dev_priv->dev;
  853. struct vmw_framebuffer_dmabuf *vfbd;
  854. unsigned int requested_size;
  855. int ret;
  856. requested_size = mode_cmd->height * mode_cmd->pitch;
  857. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  858. DRM_ERROR("Screen buffer object size is too small "
  859. "for requested mode.\n");
  860. return -EINVAL;
  861. }
  862. /* Limited framebuffer color depth support for screen objects */
  863. if (dev_priv->sou_priv) {
  864. switch (mode_cmd->depth) {
  865. case 32:
  866. case 24:
  867. /* Only support 32 bpp for 32 and 24 depth fbs */
  868. if (mode_cmd->bpp == 32)
  869. break;
  870. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  871. mode_cmd->depth, mode_cmd->bpp);
  872. return -EINVAL;
  873. case 16:
  874. case 15:
  875. /* Only support 16 bpp for 16 and 15 depth fbs */
  876. if (mode_cmd->bpp == 16)
  877. break;
  878. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  879. mode_cmd->depth, mode_cmd->bpp);
  880. return -EINVAL;
  881. default:
  882. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  883. return -EINVAL;
  884. }
  885. }
  886. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  887. if (!vfbd) {
  888. ret = -ENOMEM;
  889. goto out_err1;
  890. }
  891. if (!vmw_dmabuf_reference(dmabuf)) {
  892. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  893. ret = -EINVAL;
  894. goto out_err2;
  895. }
  896. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  897. vfbd->base.base.pitches[0] = mode_cmd->pitch;
  898. vfbd->base.base.depth = mode_cmd->depth;
  899. vfbd->base.base.width = mode_cmd->width;
  900. vfbd->base.base.height = mode_cmd->height;
  901. if (!dev_priv->sou_priv) {
  902. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  903. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  904. }
  905. vfbd->base.dmabuf = true;
  906. vfbd->buffer = dmabuf;
  907. vfbd->base.user_handle = mode_cmd->handle;
  908. *out = &vfbd->base;
  909. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  910. &vmw_framebuffer_dmabuf_funcs);
  911. if (ret)
  912. goto out_err3;
  913. return 0;
  914. out_err3:
  915. vmw_dmabuf_unreference(&dmabuf);
  916. out_err2:
  917. kfree(vfbd);
  918. out_err1:
  919. return ret;
  920. }
  921. /*
  922. * Generic Kernel modesetting functions
  923. */
  924. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  925. struct drm_file *file_priv,
  926. struct drm_mode_fb_cmd2 *mode_cmd2)
  927. {
  928. struct vmw_private *dev_priv = vmw_priv(dev);
  929. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  930. struct vmw_framebuffer *vfb = NULL;
  931. struct vmw_surface *surface = NULL;
  932. struct vmw_dma_buffer *bo = NULL;
  933. struct ttm_base_object *user_obj;
  934. struct drm_mode_fb_cmd mode_cmd;
  935. int ret;
  936. mode_cmd.width = mode_cmd2->width;
  937. mode_cmd.height = mode_cmd2->height;
  938. mode_cmd.pitch = mode_cmd2->pitches[0];
  939. mode_cmd.handle = mode_cmd2->handles[0];
  940. drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
  941. &mode_cmd.bpp);
  942. /**
  943. * This code should be conditioned on Screen Objects not being used.
  944. * If screen objects are used, we can allocate a GMR to hold the
  945. * requested framebuffer.
  946. */
  947. if (!vmw_kms_validate_mode_vram(dev_priv,
  948. mode_cmd.pitch,
  949. mode_cmd.height)) {
  950. DRM_ERROR("VRAM size is too small for requested mode.\n");
  951. return ERR_PTR(-ENOMEM);
  952. }
  953. /*
  954. * Take a reference on the user object of the resource
  955. * backing the kms fb. This ensures that user-space handle
  956. * lookups on that resource will always work as long as
  957. * it's registered with a kms framebuffer. This is important,
  958. * since vmw_execbuf_process identifies resources in the
  959. * command stream using user-space handles.
  960. */
  961. user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
  962. if (unlikely(user_obj == NULL)) {
  963. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  964. return ERR_PTR(-ENOENT);
  965. }
  966. /**
  967. * End conditioned code.
  968. */
  969. /* returns either a dmabuf or surface */
  970. ret = vmw_user_lookup_handle(dev_priv, tfile,
  971. mode_cmd.handle,
  972. &surface, &bo);
  973. if (ret)
  974. goto err_out;
  975. /* Create the new framebuffer depending one what we got back */
  976. if (bo)
  977. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  978. &mode_cmd);
  979. else if (surface)
  980. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
  981. surface, &vfb, &mode_cmd);
  982. else
  983. BUG();
  984. err_out:
  985. /* vmw_user_lookup_handle takes one ref so does new_fb */
  986. if (bo)
  987. vmw_dmabuf_unreference(&bo);
  988. if (surface)
  989. vmw_surface_unreference(&surface);
  990. if (ret) {
  991. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  992. ttm_base_object_unref(&user_obj);
  993. return ERR_PTR(ret);
  994. } else
  995. vfb->user_obj = user_obj;
  996. return &vfb->base;
  997. }
  998. static const struct drm_mode_config_funcs vmw_kms_funcs = {
  999. .fb_create = vmw_kms_fb_create,
  1000. };
  1001. int vmw_kms_present(struct vmw_private *dev_priv,
  1002. struct drm_file *file_priv,
  1003. struct vmw_framebuffer *vfb,
  1004. struct vmw_surface *surface,
  1005. uint32_t sid,
  1006. int32_t destX, int32_t destY,
  1007. struct drm_vmw_rect *clips,
  1008. uint32_t num_clips)
  1009. {
  1010. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1011. struct drm_clip_rect *tmp;
  1012. struct drm_crtc *crtc;
  1013. size_t fifo_size;
  1014. int i, k, num_units;
  1015. int ret = 0; /* silence warning */
  1016. int left, right, top, bottom;
  1017. struct {
  1018. SVGA3dCmdHeader header;
  1019. SVGA3dCmdBlitSurfaceToScreen body;
  1020. } *cmd;
  1021. SVGASignedRect *blits;
  1022. num_units = 0;
  1023. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1024. if (crtc->fb != &vfb->base)
  1025. continue;
  1026. units[num_units++] = vmw_crtc_to_du(crtc);
  1027. }
  1028. BUG_ON(surface == NULL);
  1029. BUG_ON(!clips || !num_clips);
  1030. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  1031. if (unlikely(tmp == NULL)) {
  1032. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  1033. return -ENOMEM;
  1034. }
  1035. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  1036. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1037. if (unlikely(cmd == NULL)) {
  1038. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1039. ret = -ENOMEM;
  1040. goto out_free_tmp;
  1041. }
  1042. left = clips->x;
  1043. right = clips->x + clips->w;
  1044. top = clips->y;
  1045. bottom = clips->y + clips->h;
  1046. for (i = 1; i < num_clips; i++) {
  1047. left = min_t(int, left, (int)clips[i].x);
  1048. right = max_t(int, right, (int)clips[i].x + clips[i].w);
  1049. top = min_t(int, top, (int)clips[i].y);
  1050. bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
  1051. }
  1052. /* only need to do this once */
  1053. memset(cmd, 0, fifo_size);
  1054. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  1055. blits = (SVGASignedRect *)&cmd[1];
  1056. cmd->body.srcRect.left = left;
  1057. cmd->body.srcRect.right = right;
  1058. cmd->body.srcRect.top = top;
  1059. cmd->body.srcRect.bottom = bottom;
  1060. for (i = 0; i < num_clips; i++) {
  1061. tmp[i].x1 = clips[i].x - left;
  1062. tmp[i].x2 = clips[i].x + clips[i].w - left;
  1063. tmp[i].y1 = clips[i].y - top;
  1064. tmp[i].y2 = clips[i].y + clips[i].h - top;
  1065. }
  1066. for (k = 0; k < num_units; k++) {
  1067. struct vmw_display_unit *unit = units[k];
  1068. struct vmw_clip_rect clip;
  1069. int num;
  1070. clip.x1 = left + destX - unit->crtc.x;
  1071. clip.y1 = top + destY - unit->crtc.y;
  1072. clip.x2 = right + destX - unit->crtc.x;
  1073. clip.y2 = bottom + destY - unit->crtc.y;
  1074. /* skip any crtcs that misses the clip region */
  1075. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  1076. clip.y1 >= unit->crtc.mode.vdisplay ||
  1077. clip.x2 <= 0 || clip.y2 <= 0)
  1078. continue;
  1079. /*
  1080. * In order for the clip rects to be correctly scaled
  1081. * the src and dest rects needs to be the same size.
  1082. */
  1083. cmd->body.destRect.left = clip.x1;
  1084. cmd->body.destRect.right = clip.x2;
  1085. cmd->body.destRect.top = clip.y1;
  1086. cmd->body.destRect.bottom = clip.y2;
  1087. /* create a clip rect of the crtc in dest coords */
  1088. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  1089. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  1090. clip.x1 = 0 - clip.x1;
  1091. clip.y1 = 0 - clip.y1;
  1092. /* need to reset sid as it is changed by execbuf */
  1093. cmd->body.srcImage.sid = sid;
  1094. cmd->body.destScreenId = unit->unit;
  1095. /* clip and write blits to cmd stream */
  1096. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  1097. /* if no cliprects hit skip this */
  1098. if (num == 0)
  1099. continue;
  1100. /* recalculate package length */
  1101. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  1102. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  1103. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  1104. fifo_size, 0, NULL, NULL);
  1105. if (unlikely(ret != 0))
  1106. break;
  1107. }
  1108. kfree(cmd);
  1109. out_free_tmp:
  1110. kfree(tmp);
  1111. return ret;
  1112. }
  1113. int vmw_kms_readback(struct vmw_private *dev_priv,
  1114. struct drm_file *file_priv,
  1115. struct vmw_framebuffer *vfb,
  1116. struct drm_vmw_fence_rep __user *user_fence_rep,
  1117. struct drm_vmw_rect *clips,
  1118. uint32_t num_clips)
  1119. {
  1120. struct vmw_framebuffer_dmabuf *vfbd =
  1121. vmw_framebuffer_to_vfbd(&vfb->base);
  1122. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  1123. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1124. struct drm_crtc *crtc;
  1125. size_t fifo_size;
  1126. int i, k, ret, num_units, blits_pos;
  1127. struct {
  1128. uint32_t header;
  1129. SVGAFifoCmdDefineGMRFB body;
  1130. } *cmd;
  1131. struct {
  1132. uint32_t header;
  1133. SVGAFifoCmdBlitScreenToGMRFB body;
  1134. } *blits;
  1135. num_units = 0;
  1136. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1137. if (crtc->fb != &vfb->base)
  1138. continue;
  1139. units[num_units++] = vmw_crtc_to_du(crtc);
  1140. }
  1141. BUG_ON(dmabuf == NULL);
  1142. BUG_ON(!clips || !num_clips);
  1143. /* take a safe guess at fifo size */
  1144. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1145. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1146. if (unlikely(cmd == NULL)) {
  1147. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1148. return -ENOMEM;
  1149. }
  1150. memset(cmd, 0, fifo_size);
  1151. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1152. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1153. cmd->body.format.colorDepth = vfb->base.depth;
  1154. cmd->body.format.reserved = 0;
  1155. cmd->body.bytesPerLine = vfb->base.pitches[0];
  1156. cmd->body.ptr.gmrId = vfb->user_handle;
  1157. cmd->body.ptr.offset = 0;
  1158. blits = (void *)&cmd[1];
  1159. blits_pos = 0;
  1160. for (i = 0; i < num_units; i++) {
  1161. struct drm_vmw_rect *c = clips;
  1162. for (k = 0; k < num_clips; k++, c++) {
  1163. /* transform clip coords to crtc origin based coords */
  1164. int clip_x1 = c->x - units[i]->crtc.x;
  1165. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1166. int clip_y1 = c->y - units[i]->crtc.y;
  1167. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1168. int dest_x = c->x;
  1169. int dest_y = c->y;
  1170. /* compensate for clipping, we negate
  1171. * a negative number and add that.
  1172. */
  1173. if (clip_x1 < 0)
  1174. dest_x += -clip_x1;
  1175. if (clip_y1 < 0)
  1176. dest_y += -clip_y1;
  1177. /* clip */
  1178. clip_x1 = max(clip_x1, 0);
  1179. clip_y1 = max(clip_y1, 0);
  1180. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1181. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1182. /* and cull any rects that misses the crtc */
  1183. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1184. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1185. clip_x2 <= 0 || clip_y2 <= 0)
  1186. continue;
  1187. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1188. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1189. blits[blits_pos].body.destOrigin.x = dest_x;
  1190. blits[blits_pos].body.destOrigin.y = dest_y;
  1191. blits[blits_pos].body.srcRect.left = clip_x1;
  1192. blits[blits_pos].body.srcRect.top = clip_y1;
  1193. blits[blits_pos].body.srcRect.right = clip_x2;
  1194. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1195. blits_pos++;
  1196. }
  1197. }
  1198. /* reset size here and use calculated exact size from loops */
  1199. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1200. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1201. 0, user_fence_rep, NULL);
  1202. kfree(cmd);
  1203. return ret;
  1204. }
  1205. int vmw_kms_init(struct vmw_private *dev_priv)
  1206. {
  1207. struct drm_device *dev = dev_priv->dev;
  1208. int ret;
  1209. drm_mode_config_init(dev);
  1210. dev->mode_config.funcs = &vmw_kms_funcs;
  1211. dev->mode_config.min_width = 1;
  1212. dev->mode_config.min_height = 1;
  1213. /* assumed largest fb size */
  1214. dev->mode_config.max_width = 8192;
  1215. dev->mode_config.max_height = 8192;
  1216. ret = vmw_kms_init_screen_object_display(dev_priv);
  1217. if (ret) /* Fallback */
  1218. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1219. return 0;
  1220. }
  1221. int vmw_kms_close(struct vmw_private *dev_priv)
  1222. {
  1223. /*
  1224. * Docs says we should take the lock before calling this function
  1225. * but since it destroys encoders and our destructor calls
  1226. * drm_encoder_cleanup which takes the lock we deadlock.
  1227. */
  1228. drm_mode_config_cleanup(dev_priv->dev);
  1229. if (dev_priv->sou_priv)
  1230. vmw_kms_close_screen_object_display(dev_priv);
  1231. else
  1232. vmw_kms_close_legacy_display_system(dev_priv);
  1233. return 0;
  1234. }
  1235. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1236. struct drm_file *file_priv)
  1237. {
  1238. struct drm_vmw_cursor_bypass_arg *arg = data;
  1239. struct vmw_display_unit *du;
  1240. struct drm_mode_object *obj;
  1241. struct drm_crtc *crtc;
  1242. int ret = 0;
  1243. mutex_lock(&dev->mode_config.mutex);
  1244. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1245. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1246. du = vmw_crtc_to_du(crtc);
  1247. du->hotspot_x = arg->xhot;
  1248. du->hotspot_y = arg->yhot;
  1249. }
  1250. mutex_unlock(&dev->mode_config.mutex);
  1251. return 0;
  1252. }
  1253. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1254. if (!obj) {
  1255. ret = -EINVAL;
  1256. goto out;
  1257. }
  1258. crtc = obj_to_crtc(obj);
  1259. du = vmw_crtc_to_du(crtc);
  1260. du->hotspot_x = arg->xhot;
  1261. du->hotspot_y = arg->yhot;
  1262. out:
  1263. mutex_unlock(&dev->mode_config.mutex);
  1264. return ret;
  1265. }
  1266. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1267. unsigned width, unsigned height, unsigned pitch,
  1268. unsigned bpp, unsigned depth)
  1269. {
  1270. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1271. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1272. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1273. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1274. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1275. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1276. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1277. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1278. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1279. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1280. return -EINVAL;
  1281. }
  1282. return 0;
  1283. }
  1284. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1285. {
  1286. struct vmw_vga_topology_state *save;
  1287. uint32_t i;
  1288. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1289. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1290. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1291. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1292. vmw_priv->vga_pitchlock =
  1293. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1294. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1295. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1296. SVGA_FIFO_PITCHLOCK);
  1297. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1298. return 0;
  1299. vmw_priv->num_displays = vmw_read(vmw_priv,
  1300. SVGA_REG_NUM_GUEST_DISPLAYS);
  1301. if (vmw_priv->num_displays == 0)
  1302. vmw_priv->num_displays = 1;
  1303. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1304. save = &vmw_priv->vga_save[i];
  1305. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1306. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1307. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1308. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1309. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1310. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1311. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1312. if (i == 0 && vmw_priv->num_displays == 1 &&
  1313. save->width == 0 && save->height == 0) {
  1314. /*
  1315. * It should be fairly safe to assume that these
  1316. * values are uninitialized.
  1317. */
  1318. save->width = vmw_priv->vga_width - save->pos_x;
  1319. save->height = vmw_priv->vga_height - save->pos_y;
  1320. }
  1321. }
  1322. return 0;
  1323. }
  1324. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1325. {
  1326. struct vmw_vga_topology_state *save;
  1327. uint32_t i;
  1328. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1329. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1330. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1331. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1332. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1333. vmw_priv->vga_pitchlock);
  1334. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1335. iowrite32(vmw_priv->vga_pitchlock,
  1336. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1337. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1338. return 0;
  1339. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1340. save = &vmw_priv->vga_save[i];
  1341. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1342. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1343. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1344. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1345. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1346. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1347. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1348. }
  1349. return 0;
  1350. }
  1351. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1352. uint32_t pitch,
  1353. uint32_t height)
  1354. {
  1355. return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
  1356. }
  1357. /**
  1358. * Function called by DRM code called with vbl_lock held.
  1359. */
  1360. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1361. {
  1362. return 0;
  1363. }
  1364. /**
  1365. * Function called by DRM code called with vbl_lock held.
  1366. */
  1367. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1368. {
  1369. return -ENOSYS;
  1370. }
  1371. /**
  1372. * Function called by DRM code called with vbl_lock held.
  1373. */
  1374. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1375. {
  1376. }
  1377. /*
  1378. * Small shared kms functions.
  1379. */
  1380. int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1381. struct drm_vmw_rect *rects)
  1382. {
  1383. struct drm_device *dev = dev_priv->dev;
  1384. struct vmw_display_unit *du;
  1385. struct drm_connector *con;
  1386. mutex_lock(&dev->mode_config.mutex);
  1387. #if 0
  1388. {
  1389. unsigned int i;
  1390. DRM_INFO("%s: new layout ", __func__);
  1391. for (i = 0; i < num; i++)
  1392. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1393. rects[i].w, rects[i].h);
  1394. DRM_INFO("\n");
  1395. }
  1396. #endif
  1397. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1398. du = vmw_connector_to_du(con);
  1399. if (num > du->unit) {
  1400. du->pref_width = rects[du->unit].w;
  1401. du->pref_height = rects[du->unit].h;
  1402. du->pref_active = true;
  1403. du->gui_x = rects[du->unit].x;
  1404. du->gui_y = rects[du->unit].y;
  1405. } else {
  1406. du->pref_width = 800;
  1407. du->pref_height = 600;
  1408. du->pref_active = false;
  1409. }
  1410. con->status = vmw_du_connector_detect(con, true);
  1411. }
  1412. mutex_unlock(&dev->mode_config.mutex);
  1413. return 0;
  1414. }
  1415. int vmw_du_page_flip(struct drm_crtc *crtc,
  1416. struct drm_framebuffer *fb,
  1417. struct drm_pending_vblank_event *event,
  1418. uint32_t page_flip_flags)
  1419. {
  1420. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1421. struct drm_framebuffer *old_fb = crtc->fb;
  1422. struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
  1423. struct drm_file *file_priv ;
  1424. struct vmw_fence_obj *fence = NULL;
  1425. struct drm_clip_rect clips;
  1426. int ret;
  1427. if (event == NULL)
  1428. return -EINVAL;
  1429. /* require ScreenObject support for page flipping */
  1430. if (!dev_priv->sou_priv)
  1431. return -ENOSYS;
  1432. file_priv = event->base.file_priv;
  1433. if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
  1434. return -EINVAL;
  1435. crtc->fb = fb;
  1436. /* do a full screen dirty update */
  1437. clips.x1 = clips.y1 = 0;
  1438. clips.x2 = fb->width;
  1439. clips.y2 = fb->height;
  1440. if (vfb->dmabuf)
  1441. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
  1442. 0, 0, &clips, 1, 1, &fence);
  1443. else
  1444. ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
  1445. 0, 0, &clips, 1, 1, &fence);
  1446. if (ret != 0)
  1447. goto out_no_fence;
  1448. if (!fence) {
  1449. ret = -EINVAL;
  1450. goto out_no_fence;
  1451. }
  1452. ret = vmw_event_fence_action_queue(file_priv, fence,
  1453. &event->base,
  1454. &event->event.tv_sec,
  1455. &event->event.tv_usec,
  1456. true);
  1457. /*
  1458. * No need to hold on to this now. The only cleanup
  1459. * we need to do if we fail is unref the fence.
  1460. */
  1461. vmw_fence_obj_unreference(&fence);
  1462. if (vmw_crtc_to_du(crtc)->is_implicit)
  1463. vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
  1464. return ret;
  1465. out_no_fence:
  1466. crtc->fb = old_fb;
  1467. return ret;
  1468. }
  1469. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1470. {
  1471. }
  1472. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1473. {
  1474. }
  1475. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1476. u16 *r, u16 *g, u16 *b,
  1477. uint32_t start, uint32_t size)
  1478. {
  1479. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1480. int i;
  1481. for (i = 0; i < size; i++) {
  1482. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1483. r[i], g[i], b[i]);
  1484. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1485. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1486. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1487. }
  1488. }
  1489. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1490. {
  1491. }
  1492. void vmw_du_connector_save(struct drm_connector *connector)
  1493. {
  1494. }
  1495. void vmw_du_connector_restore(struct drm_connector *connector)
  1496. {
  1497. }
  1498. enum drm_connector_status
  1499. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1500. {
  1501. uint32_t num_displays;
  1502. struct drm_device *dev = connector->dev;
  1503. struct vmw_private *dev_priv = vmw_priv(dev);
  1504. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1505. mutex_lock(&dev_priv->hw_mutex);
  1506. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1507. mutex_unlock(&dev_priv->hw_mutex);
  1508. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1509. du->pref_active) ?
  1510. connector_status_connected : connector_status_disconnected);
  1511. }
  1512. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1513. /* 640x480@60Hz */
  1514. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1515. 752, 800, 0, 480, 489, 492, 525, 0,
  1516. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1517. /* 800x600@60Hz */
  1518. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1519. 968, 1056, 0, 600, 601, 605, 628, 0,
  1520. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1521. /* 1024x768@60Hz */
  1522. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1523. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1524. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1525. /* 1152x864@75Hz */
  1526. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1527. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1528. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1529. /* 1280x768@60Hz */
  1530. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1531. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1532. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1533. /* 1280x800@60Hz */
  1534. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1535. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1536. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1537. /* 1280x960@60Hz */
  1538. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1539. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1540. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1541. /* 1280x1024@60Hz */
  1542. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1543. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1544. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1545. /* 1360x768@60Hz */
  1546. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1547. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1548. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1549. /* 1440x1050@60Hz */
  1550. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1551. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1552. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1553. /* 1440x900@60Hz */
  1554. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1555. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1556. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1557. /* 1600x1200@60Hz */
  1558. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1559. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1560. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1561. /* 1680x1050@60Hz */
  1562. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1563. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1564. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1565. /* 1792x1344@60Hz */
  1566. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1567. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1568. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1569. /* 1853x1392@60Hz */
  1570. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1571. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1572. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1573. /* 1920x1200@60Hz */
  1574. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1575. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1576. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1577. /* 1920x1440@60Hz */
  1578. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1579. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1580. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1581. /* 2560x1600@60Hz */
  1582. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1583. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1584. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1585. /* Terminate */
  1586. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1587. };
  1588. /**
  1589. * vmw_guess_mode_timing - Provide fake timings for a
  1590. * 60Hz vrefresh mode.
  1591. *
  1592. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1593. * members filled in.
  1594. */
  1595. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1596. {
  1597. mode->hsync_start = mode->hdisplay + 50;
  1598. mode->hsync_end = mode->hsync_start + 50;
  1599. mode->htotal = mode->hsync_end + 50;
  1600. mode->vsync_start = mode->vdisplay + 50;
  1601. mode->vsync_end = mode->vsync_start + 50;
  1602. mode->vtotal = mode->vsync_end + 50;
  1603. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1604. mode->vrefresh = drm_mode_vrefresh(mode);
  1605. }
  1606. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1607. uint32_t max_width, uint32_t max_height)
  1608. {
  1609. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1610. struct drm_device *dev = connector->dev;
  1611. struct vmw_private *dev_priv = vmw_priv(dev);
  1612. struct drm_display_mode *mode = NULL;
  1613. struct drm_display_mode *bmode;
  1614. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1615. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1616. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1617. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1618. };
  1619. int i;
  1620. /* Add preferred mode */
  1621. {
  1622. mode = drm_mode_duplicate(dev, &prefmode);
  1623. if (!mode)
  1624. return 0;
  1625. mode->hdisplay = du->pref_width;
  1626. mode->vdisplay = du->pref_height;
  1627. vmw_guess_mode_timing(mode);
  1628. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1629. mode->vdisplay)) {
  1630. drm_mode_probed_add(connector, mode);
  1631. } else {
  1632. drm_mode_destroy(dev, mode);
  1633. mode = NULL;
  1634. }
  1635. if (du->pref_mode) {
  1636. list_del_init(&du->pref_mode->head);
  1637. drm_mode_destroy(dev, du->pref_mode);
  1638. }
  1639. /* mode might be null here, this is intended */
  1640. du->pref_mode = mode;
  1641. }
  1642. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1643. bmode = &vmw_kms_connector_builtin[i];
  1644. if (bmode->hdisplay > max_width ||
  1645. bmode->vdisplay > max_height)
  1646. continue;
  1647. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1648. bmode->vdisplay))
  1649. continue;
  1650. mode = drm_mode_duplicate(dev, bmode);
  1651. if (!mode)
  1652. return 0;
  1653. mode->vrefresh = drm_mode_vrefresh(mode);
  1654. drm_mode_probed_add(connector, mode);
  1655. }
  1656. /* Move the prefered mode first, help apps pick the right mode. */
  1657. if (du->pref_mode)
  1658. list_move(&du->pref_mode->head, &connector->probed_modes);
  1659. drm_mode_connector_list_update(connector);
  1660. return 1;
  1661. }
  1662. int vmw_du_connector_set_property(struct drm_connector *connector,
  1663. struct drm_property *property,
  1664. uint64_t val)
  1665. {
  1666. return 0;
  1667. }
  1668. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1669. struct drm_file *file_priv)
  1670. {
  1671. struct vmw_private *dev_priv = vmw_priv(dev);
  1672. struct drm_vmw_update_layout_arg *arg =
  1673. (struct drm_vmw_update_layout_arg *)data;
  1674. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1675. void __user *user_rects;
  1676. struct drm_vmw_rect *rects;
  1677. unsigned rects_size;
  1678. int ret;
  1679. int i;
  1680. struct drm_mode_config *mode_config = &dev->mode_config;
  1681. ret = ttm_read_lock(&vmaster->lock, true);
  1682. if (unlikely(ret != 0))
  1683. return ret;
  1684. if (!arg->num_outputs) {
  1685. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1686. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1687. goto out_unlock;
  1688. }
  1689. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1690. rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
  1691. GFP_KERNEL);
  1692. if (unlikely(!rects)) {
  1693. ret = -ENOMEM;
  1694. goto out_unlock;
  1695. }
  1696. user_rects = (void __user *)(unsigned long)arg->rects;
  1697. ret = copy_from_user(rects, user_rects, rects_size);
  1698. if (unlikely(ret != 0)) {
  1699. DRM_ERROR("Failed to get rects.\n");
  1700. ret = -EFAULT;
  1701. goto out_free;
  1702. }
  1703. for (i = 0; i < arg->num_outputs; ++i) {
  1704. if (rects[i].x < 0 ||
  1705. rects[i].y < 0 ||
  1706. rects[i].x + rects[i].w > mode_config->max_width ||
  1707. rects[i].y + rects[i].h > mode_config->max_height) {
  1708. DRM_ERROR("Invalid GUI layout.\n");
  1709. ret = -EINVAL;
  1710. goto out_free;
  1711. }
  1712. }
  1713. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1714. out_free:
  1715. kfree(rects);
  1716. out_unlock:
  1717. ttm_read_unlock(&vmaster->lock);
  1718. return ret;
  1719. }