radeon_irq_kms.c 13 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/radeon_drm.h>
  31. #include "radeon_reg.h"
  32. #include "radeon.h"
  33. #include "atom.h"
  34. #define RADEON_WAIT_IDLE_TIMEOUT 200
  35. /**
  36. * radeon_driver_irq_handler_kms - irq handler for KMS
  37. *
  38. * @DRM_IRQ_ARGS: args
  39. *
  40. * This is the irq handler for the radeon KMS driver (all asics).
  41. * radeon_irq_process is a macro that points to the per-asic
  42. * irq handler callback.
  43. */
  44. irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  45. {
  46. struct drm_device *dev = (struct drm_device *) arg;
  47. struct radeon_device *rdev = dev->dev_private;
  48. return radeon_irq_process(rdev);
  49. }
  50. /*
  51. * Handle hotplug events outside the interrupt handler proper.
  52. */
  53. /**
  54. * radeon_hotplug_work_func - display hotplug work handler
  55. *
  56. * @work: work struct
  57. *
  58. * This is the hot plug event work handler (all asics).
  59. * The work gets scheduled from the irq handler if there
  60. * was a hot plug interrupt. It walks the connector table
  61. * and calls the hotplug handler for each one, then sends
  62. * a drm hotplug event to alert userspace.
  63. */
  64. static void radeon_hotplug_work_func(struct work_struct *work)
  65. {
  66. struct radeon_device *rdev = container_of(work, struct radeon_device,
  67. hotplug_work);
  68. struct drm_device *dev = rdev->ddev;
  69. struct drm_mode_config *mode_config = &dev->mode_config;
  70. struct drm_connector *connector;
  71. if (mode_config->num_connector) {
  72. list_for_each_entry(connector, &mode_config->connector_list, head)
  73. radeon_connector_hotplug(connector);
  74. }
  75. /* Just fire off a uevent and let userspace tell us what to do */
  76. drm_helper_hpd_irq_event(dev);
  77. }
  78. /**
  79. * radeon_irq_reset_work_func - execute gpu reset
  80. *
  81. * @work: work struct
  82. *
  83. * Execute scheduled gpu reset (cayman+).
  84. * This function is called when the irq handler
  85. * thinks we need a gpu reset.
  86. */
  87. static void radeon_irq_reset_work_func(struct work_struct *work)
  88. {
  89. struct radeon_device *rdev = container_of(work, struct radeon_device,
  90. reset_work);
  91. radeon_gpu_reset(rdev);
  92. }
  93. /**
  94. * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
  95. *
  96. * @dev: drm dev pointer
  97. *
  98. * Gets the hw ready to enable irqs (all asics).
  99. * This function disables all interrupt sources on the GPU.
  100. */
  101. void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  102. {
  103. struct radeon_device *rdev = dev->dev_private;
  104. unsigned long irqflags;
  105. unsigned i;
  106. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  107. /* Disable *all* interrupts */
  108. for (i = 0; i < RADEON_NUM_RINGS; i++)
  109. atomic_set(&rdev->irq.ring_int[i], 0);
  110. rdev->irq.dpm_thermal = false;
  111. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  112. rdev->irq.hpd[i] = false;
  113. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  114. rdev->irq.crtc_vblank_int[i] = false;
  115. atomic_set(&rdev->irq.pflip[i], 0);
  116. rdev->irq.afmt[i] = false;
  117. }
  118. radeon_irq_set(rdev);
  119. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  120. /* Clear bits */
  121. radeon_irq_process(rdev);
  122. }
  123. /**
  124. * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
  125. *
  126. * @dev: drm dev pointer
  127. *
  128. * Handles stuff to be done after enabling irqs (all asics).
  129. * Returns 0 on success.
  130. */
  131. int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  132. {
  133. dev->max_vblank_count = 0x001fffff;
  134. return 0;
  135. }
  136. /**
  137. * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
  138. *
  139. * @dev: drm dev pointer
  140. *
  141. * This function disables all interrupt sources on the GPU (all asics).
  142. */
  143. void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  144. {
  145. struct radeon_device *rdev = dev->dev_private;
  146. unsigned long irqflags;
  147. unsigned i;
  148. if (rdev == NULL) {
  149. return;
  150. }
  151. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  152. /* Disable *all* interrupts */
  153. for (i = 0; i < RADEON_NUM_RINGS; i++)
  154. atomic_set(&rdev->irq.ring_int[i], 0);
  155. rdev->irq.dpm_thermal = false;
  156. for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  157. rdev->irq.hpd[i] = false;
  158. for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  159. rdev->irq.crtc_vblank_int[i] = false;
  160. atomic_set(&rdev->irq.pflip[i], 0);
  161. rdev->irq.afmt[i] = false;
  162. }
  163. radeon_irq_set(rdev);
  164. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  165. }
  166. /**
  167. * radeon_msi_ok - asic specific msi checks
  168. *
  169. * @rdev: radeon device pointer
  170. *
  171. * Handles asic specific MSI checks to determine if
  172. * MSIs should be enabled on a particular chip (all asics).
  173. * Returns true if MSIs should be enabled, false if MSIs
  174. * should not be enabled.
  175. */
  176. static bool radeon_msi_ok(struct radeon_device *rdev)
  177. {
  178. /* RV370/RV380 was first asic with MSI support */
  179. if (rdev->family < CHIP_RV380)
  180. return false;
  181. /* MSIs don't work on AGP */
  182. if (rdev->flags & RADEON_IS_AGP)
  183. return false;
  184. /* force MSI on */
  185. if (radeon_msi == 1)
  186. return true;
  187. else if (radeon_msi == 0)
  188. return false;
  189. /* Quirks */
  190. /* HP RS690 only seems to work with MSIs. */
  191. if ((rdev->pdev->device == 0x791f) &&
  192. (rdev->pdev->subsystem_vendor == 0x103c) &&
  193. (rdev->pdev->subsystem_device == 0x30c2))
  194. return true;
  195. /* Dell RS690 only seems to work with MSIs. */
  196. if ((rdev->pdev->device == 0x791f) &&
  197. (rdev->pdev->subsystem_vendor == 0x1028) &&
  198. (rdev->pdev->subsystem_device == 0x01fc))
  199. return true;
  200. /* Dell RS690 only seems to work with MSIs. */
  201. if ((rdev->pdev->device == 0x791f) &&
  202. (rdev->pdev->subsystem_vendor == 0x1028) &&
  203. (rdev->pdev->subsystem_device == 0x01fd))
  204. return true;
  205. /* Gateway RS690 only seems to work with MSIs. */
  206. if ((rdev->pdev->device == 0x791f) &&
  207. (rdev->pdev->subsystem_vendor == 0x107b) &&
  208. (rdev->pdev->subsystem_device == 0x0185))
  209. return true;
  210. /* try and enable MSIs by default on all RS690s */
  211. if (rdev->family == CHIP_RS690)
  212. return true;
  213. /* RV515 seems to have MSI issues where it loses
  214. * MSI rearms occasionally. This leads to lockups and freezes.
  215. * disable it by default.
  216. */
  217. if (rdev->family == CHIP_RV515)
  218. return false;
  219. if (rdev->flags & RADEON_IS_IGP) {
  220. /* APUs work fine with MSIs */
  221. if (rdev->family >= CHIP_PALM)
  222. return true;
  223. /* lots of IGPs have problems with MSIs */
  224. return false;
  225. }
  226. return true;
  227. }
  228. /**
  229. * radeon_irq_kms_init - init driver interrupt info
  230. *
  231. * @rdev: radeon device pointer
  232. *
  233. * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
  234. * Returns 0 for success, error for failure.
  235. */
  236. int radeon_irq_kms_init(struct radeon_device *rdev)
  237. {
  238. int r = 0;
  239. spin_lock_init(&rdev->irq.lock);
  240. r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
  241. if (r) {
  242. return r;
  243. }
  244. /* enable msi */
  245. rdev->msi_enabled = 0;
  246. if (radeon_msi_ok(rdev)) {
  247. int ret = pci_enable_msi(rdev->pdev);
  248. if (!ret) {
  249. rdev->msi_enabled = 1;
  250. dev_info(rdev->dev, "radeon: using MSI.\n");
  251. }
  252. }
  253. INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
  254. INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
  255. INIT_WORK(&rdev->reset_work, radeon_irq_reset_work_func);
  256. rdev->irq.installed = true;
  257. r = drm_irq_install(rdev->ddev);
  258. if (r) {
  259. rdev->irq.installed = false;
  260. flush_work(&rdev->hotplug_work);
  261. return r;
  262. }
  263. DRM_INFO("radeon: irq initialized.\n");
  264. return 0;
  265. }
  266. /**
  267. * radeon_irq_kms_fini - tear down driver interrupt info
  268. *
  269. * @rdev: radeon device pointer
  270. *
  271. * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
  272. */
  273. void radeon_irq_kms_fini(struct radeon_device *rdev)
  274. {
  275. drm_vblank_cleanup(rdev->ddev);
  276. if (rdev->irq.installed) {
  277. drm_irq_uninstall(rdev->ddev);
  278. rdev->irq.installed = false;
  279. if (rdev->msi_enabled)
  280. pci_disable_msi(rdev->pdev);
  281. flush_work(&rdev->hotplug_work);
  282. }
  283. }
  284. /**
  285. * radeon_irq_kms_sw_irq_get - enable software interrupt
  286. *
  287. * @rdev: radeon device pointer
  288. * @ring: ring whose interrupt you want to enable
  289. *
  290. * Enables the software interrupt for a specific ring (all asics).
  291. * The software interrupt is generally used to signal a fence on
  292. * a particular ring.
  293. */
  294. void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
  295. {
  296. unsigned long irqflags;
  297. if (!rdev->ddev->irq_enabled)
  298. return;
  299. if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
  300. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  301. radeon_irq_set(rdev);
  302. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  303. }
  304. }
  305. /**
  306. * radeon_irq_kms_sw_irq_put - disable software interrupt
  307. *
  308. * @rdev: radeon device pointer
  309. * @ring: ring whose interrupt you want to disable
  310. *
  311. * Disables the software interrupt for a specific ring (all asics).
  312. * The software interrupt is generally used to signal a fence on
  313. * a particular ring.
  314. */
  315. void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
  316. {
  317. unsigned long irqflags;
  318. if (!rdev->ddev->irq_enabled)
  319. return;
  320. if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
  321. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  322. radeon_irq_set(rdev);
  323. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  324. }
  325. }
  326. /**
  327. * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
  328. *
  329. * @rdev: radeon device pointer
  330. * @crtc: crtc whose interrupt you want to enable
  331. *
  332. * Enables the pageflip interrupt for a specific crtc (all asics).
  333. * For pageflips we use the vblank interrupt source.
  334. */
  335. void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
  336. {
  337. unsigned long irqflags;
  338. if (crtc < 0 || crtc >= rdev->num_crtc)
  339. return;
  340. if (!rdev->ddev->irq_enabled)
  341. return;
  342. if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
  343. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  344. radeon_irq_set(rdev);
  345. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  346. }
  347. }
  348. /**
  349. * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
  350. *
  351. * @rdev: radeon device pointer
  352. * @crtc: crtc whose interrupt you want to disable
  353. *
  354. * Disables the pageflip interrupt for a specific crtc (all asics).
  355. * For pageflips we use the vblank interrupt source.
  356. */
  357. void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
  358. {
  359. unsigned long irqflags;
  360. if (crtc < 0 || crtc >= rdev->num_crtc)
  361. return;
  362. if (!rdev->ddev->irq_enabled)
  363. return;
  364. if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
  365. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  366. radeon_irq_set(rdev);
  367. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  368. }
  369. }
  370. /**
  371. * radeon_irq_kms_enable_afmt - enable audio format change interrupt
  372. *
  373. * @rdev: radeon device pointer
  374. * @block: afmt block whose interrupt you want to enable
  375. *
  376. * Enables the afmt change interrupt for a specific afmt block (all asics).
  377. */
  378. void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
  379. {
  380. unsigned long irqflags;
  381. if (!rdev->ddev->irq_enabled)
  382. return;
  383. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  384. rdev->irq.afmt[block] = true;
  385. radeon_irq_set(rdev);
  386. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  387. }
  388. /**
  389. * radeon_irq_kms_disable_afmt - disable audio format change interrupt
  390. *
  391. * @rdev: radeon device pointer
  392. * @block: afmt block whose interrupt you want to disable
  393. *
  394. * Disables the afmt change interrupt for a specific afmt block (all asics).
  395. */
  396. void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
  397. {
  398. unsigned long irqflags;
  399. if (!rdev->ddev->irq_enabled)
  400. return;
  401. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  402. rdev->irq.afmt[block] = false;
  403. radeon_irq_set(rdev);
  404. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  405. }
  406. /**
  407. * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
  408. *
  409. * @rdev: radeon device pointer
  410. * @hpd_mask: mask of hpd pins you want to enable.
  411. *
  412. * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
  413. */
  414. void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
  415. {
  416. unsigned long irqflags;
  417. int i;
  418. if (!rdev->ddev->irq_enabled)
  419. return;
  420. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  421. for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
  422. rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
  423. radeon_irq_set(rdev);
  424. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  425. }
  426. /**
  427. * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
  428. *
  429. * @rdev: radeon device pointer
  430. * @hpd_mask: mask of hpd pins you want to disable.
  431. *
  432. * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
  433. */
  434. void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
  435. {
  436. unsigned long irqflags;
  437. int i;
  438. if (!rdev->ddev->irq_enabled)
  439. return;
  440. spin_lock_irqsave(&rdev->irq.lock, irqflags);
  441. for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
  442. rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
  443. radeon_irq_set(rdev);
  444. spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
  445. }