radeon_gem.c 16 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include <drm/drmP.h>
  29. #include <drm/radeon_drm.h>
  30. #include "radeon.h"
  31. void radeon_gem_object_free(struct drm_gem_object *gobj)
  32. {
  33. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  34. if (robj) {
  35. if (robj->gem_base.import_attach)
  36. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  37. radeon_bo_unref(&robj);
  38. }
  39. }
  40. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  41. int alignment, int initial_domain,
  42. bool discardable, bool kernel,
  43. struct drm_gem_object **obj)
  44. {
  45. struct radeon_bo *robj;
  46. unsigned long max_size;
  47. int r;
  48. *obj = NULL;
  49. /* At least align on page size */
  50. if (alignment < PAGE_SIZE) {
  51. alignment = PAGE_SIZE;
  52. }
  53. /* maximun bo size is the minimun btw visible vram and gtt size */
  54. max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
  55. if (size > max_size) {
  56. printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
  57. __func__, __LINE__, size >> 20, max_size >> 20);
  58. return -ENOMEM;
  59. }
  60. retry:
  61. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  62. if (r) {
  63. if (r != -ERESTARTSYS) {
  64. if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
  65. initial_domain |= RADEON_GEM_DOMAIN_GTT;
  66. goto retry;
  67. }
  68. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  69. size, initial_domain, alignment, r);
  70. }
  71. return r;
  72. }
  73. *obj = &robj->gem_base;
  74. robj->pid = task_pid_nr(current);
  75. mutex_lock(&rdev->gem.mutex);
  76. list_add_tail(&robj->list, &rdev->gem.objects);
  77. mutex_unlock(&rdev->gem.mutex);
  78. return 0;
  79. }
  80. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  81. uint32_t rdomain, uint32_t wdomain)
  82. {
  83. struct radeon_bo *robj;
  84. uint32_t domain;
  85. int r;
  86. /* FIXME: reeimplement */
  87. robj = gem_to_radeon_bo(gobj);
  88. /* work out where to validate the buffer to */
  89. domain = wdomain;
  90. if (!domain) {
  91. domain = rdomain;
  92. }
  93. if (!domain) {
  94. /* Do nothings */
  95. printk(KERN_WARNING "Set domain without domain !\n");
  96. return 0;
  97. }
  98. if (domain == RADEON_GEM_DOMAIN_CPU) {
  99. /* Asking for cpu access wait for object idle */
  100. r = radeon_bo_wait(robj, NULL, false);
  101. if (r) {
  102. printk(KERN_ERR "Failed to wait for object !\n");
  103. return r;
  104. }
  105. }
  106. return 0;
  107. }
  108. int radeon_gem_init(struct radeon_device *rdev)
  109. {
  110. INIT_LIST_HEAD(&rdev->gem.objects);
  111. return 0;
  112. }
  113. void radeon_gem_fini(struct radeon_device *rdev)
  114. {
  115. radeon_bo_force_delete(rdev);
  116. }
  117. /*
  118. * Call from drm_gem_handle_create which appear in both new and open ioctl
  119. * case.
  120. */
  121. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  122. {
  123. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  124. struct radeon_device *rdev = rbo->rdev;
  125. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  126. struct radeon_vm *vm = &fpriv->vm;
  127. struct radeon_bo_va *bo_va;
  128. int r;
  129. if (rdev->family < CHIP_CAYMAN) {
  130. return 0;
  131. }
  132. r = radeon_bo_reserve(rbo, false);
  133. if (r) {
  134. return r;
  135. }
  136. bo_va = radeon_vm_bo_find(vm, rbo);
  137. if (!bo_va) {
  138. bo_va = radeon_vm_bo_add(rdev, vm, rbo);
  139. } else {
  140. ++bo_va->ref_count;
  141. }
  142. radeon_bo_unreserve(rbo);
  143. return 0;
  144. }
  145. void radeon_gem_object_close(struct drm_gem_object *obj,
  146. struct drm_file *file_priv)
  147. {
  148. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  149. struct radeon_device *rdev = rbo->rdev;
  150. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  151. struct radeon_vm *vm = &fpriv->vm;
  152. struct radeon_bo_va *bo_va;
  153. int r;
  154. if (rdev->family < CHIP_CAYMAN) {
  155. return;
  156. }
  157. r = radeon_bo_reserve(rbo, true);
  158. if (r) {
  159. dev_err(rdev->dev, "leaking bo va because "
  160. "we fail to reserve bo (%d)\n", r);
  161. return;
  162. }
  163. bo_va = radeon_vm_bo_find(vm, rbo);
  164. if (bo_va) {
  165. if (--bo_va->ref_count == 0) {
  166. radeon_vm_bo_rmv(rdev, bo_va);
  167. }
  168. }
  169. radeon_bo_unreserve(rbo);
  170. }
  171. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  172. {
  173. if (r == -EDEADLK) {
  174. r = radeon_gpu_reset(rdev);
  175. if (!r)
  176. r = -EAGAIN;
  177. }
  178. return r;
  179. }
  180. /*
  181. * GEM ioctls.
  182. */
  183. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  184. struct drm_file *filp)
  185. {
  186. struct radeon_device *rdev = dev->dev_private;
  187. struct drm_radeon_gem_info *args = data;
  188. struct ttm_mem_type_manager *man;
  189. unsigned i;
  190. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  191. args->vram_size = rdev->mc.real_vram_size;
  192. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  193. if (rdev->stollen_vga_memory)
  194. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  195. args->vram_visible -= radeon_fbdev_total_size(rdev);
  196. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  197. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  198. args->gart_size -= rdev->ring[i].ring_size;
  199. return 0;
  200. }
  201. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  202. struct drm_file *filp)
  203. {
  204. /* TODO: implement */
  205. DRM_ERROR("unimplemented %s\n", __func__);
  206. return -ENOSYS;
  207. }
  208. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  209. struct drm_file *filp)
  210. {
  211. /* TODO: implement */
  212. DRM_ERROR("unimplemented %s\n", __func__);
  213. return -ENOSYS;
  214. }
  215. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  216. struct drm_file *filp)
  217. {
  218. struct radeon_device *rdev = dev->dev_private;
  219. struct drm_radeon_gem_create *args = data;
  220. struct drm_gem_object *gobj;
  221. uint32_t handle;
  222. int r;
  223. down_read(&rdev->exclusive_lock);
  224. /* create a gem object to contain this object in */
  225. args->size = roundup(args->size, PAGE_SIZE);
  226. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  227. args->initial_domain, false,
  228. false, &gobj);
  229. if (r) {
  230. up_read(&rdev->exclusive_lock);
  231. r = radeon_gem_handle_lockup(rdev, r);
  232. return r;
  233. }
  234. r = drm_gem_handle_create(filp, gobj, &handle);
  235. /* drop reference from allocate - handle holds it now */
  236. drm_gem_object_unreference_unlocked(gobj);
  237. if (r) {
  238. up_read(&rdev->exclusive_lock);
  239. r = radeon_gem_handle_lockup(rdev, r);
  240. return r;
  241. }
  242. args->handle = handle;
  243. up_read(&rdev->exclusive_lock);
  244. return 0;
  245. }
  246. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  247. struct drm_file *filp)
  248. {
  249. /* transition the BO to a domain -
  250. * just validate the BO into a certain domain */
  251. struct radeon_device *rdev = dev->dev_private;
  252. struct drm_radeon_gem_set_domain *args = data;
  253. struct drm_gem_object *gobj;
  254. struct radeon_bo *robj;
  255. int r;
  256. /* for now if someone requests domain CPU -
  257. * just make sure the buffer is finished with */
  258. down_read(&rdev->exclusive_lock);
  259. /* just do a BO wait for now */
  260. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  261. if (gobj == NULL) {
  262. up_read(&rdev->exclusive_lock);
  263. return -ENOENT;
  264. }
  265. robj = gem_to_radeon_bo(gobj);
  266. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  267. drm_gem_object_unreference_unlocked(gobj);
  268. up_read(&rdev->exclusive_lock);
  269. r = radeon_gem_handle_lockup(robj->rdev, r);
  270. return r;
  271. }
  272. int radeon_mode_dumb_mmap(struct drm_file *filp,
  273. struct drm_device *dev,
  274. uint32_t handle, uint64_t *offset_p)
  275. {
  276. struct drm_gem_object *gobj;
  277. struct radeon_bo *robj;
  278. gobj = drm_gem_object_lookup(dev, filp, handle);
  279. if (gobj == NULL) {
  280. return -ENOENT;
  281. }
  282. robj = gem_to_radeon_bo(gobj);
  283. *offset_p = radeon_bo_mmap_offset(robj);
  284. drm_gem_object_unreference_unlocked(gobj);
  285. return 0;
  286. }
  287. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  288. struct drm_file *filp)
  289. {
  290. struct drm_radeon_gem_mmap *args = data;
  291. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  292. }
  293. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  294. struct drm_file *filp)
  295. {
  296. struct radeon_device *rdev = dev->dev_private;
  297. struct drm_radeon_gem_busy *args = data;
  298. struct drm_gem_object *gobj;
  299. struct radeon_bo *robj;
  300. int r;
  301. uint32_t cur_placement = 0;
  302. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  303. if (gobj == NULL) {
  304. return -ENOENT;
  305. }
  306. robj = gem_to_radeon_bo(gobj);
  307. r = radeon_bo_wait(robj, &cur_placement, true);
  308. switch (cur_placement) {
  309. case TTM_PL_VRAM:
  310. args->domain = RADEON_GEM_DOMAIN_VRAM;
  311. break;
  312. case TTM_PL_TT:
  313. args->domain = RADEON_GEM_DOMAIN_GTT;
  314. break;
  315. case TTM_PL_SYSTEM:
  316. args->domain = RADEON_GEM_DOMAIN_CPU;
  317. default:
  318. break;
  319. }
  320. drm_gem_object_unreference_unlocked(gobj);
  321. r = radeon_gem_handle_lockup(rdev, r);
  322. return r;
  323. }
  324. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  325. struct drm_file *filp)
  326. {
  327. struct radeon_device *rdev = dev->dev_private;
  328. struct drm_radeon_gem_wait_idle *args = data;
  329. struct drm_gem_object *gobj;
  330. struct radeon_bo *robj;
  331. int r;
  332. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  333. if (gobj == NULL) {
  334. return -ENOENT;
  335. }
  336. robj = gem_to_radeon_bo(gobj);
  337. r = radeon_bo_wait(robj, NULL, false);
  338. /* callback hw specific functions if any */
  339. if (rdev->asic->ioctl_wait_idle)
  340. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  341. drm_gem_object_unreference_unlocked(gobj);
  342. r = radeon_gem_handle_lockup(rdev, r);
  343. return r;
  344. }
  345. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  346. struct drm_file *filp)
  347. {
  348. struct drm_radeon_gem_set_tiling *args = data;
  349. struct drm_gem_object *gobj;
  350. struct radeon_bo *robj;
  351. int r = 0;
  352. DRM_DEBUG("%d \n", args->handle);
  353. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  354. if (gobj == NULL)
  355. return -ENOENT;
  356. robj = gem_to_radeon_bo(gobj);
  357. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  358. drm_gem_object_unreference_unlocked(gobj);
  359. return r;
  360. }
  361. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  362. struct drm_file *filp)
  363. {
  364. struct drm_radeon_gem_get_tiling *args = data;
  365. struct drm_gem_object *gobj;
  366. struct radeon_bo *rbo;
  367. int r = 0;
  368. DRM_DEBUG("\n");
  369. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  370. if (gobj == NULL)
  371. return -ENOENT;
  372. rbo = gem_to_radeon_bo(gobj);
  373. r = radeon_bo_reserve(rbo, false);
  374. if (unlikely(r != 0))
  375. goto out;
  376. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  377. radeon_bo_unreserve(rbo);
  378. out:
  379. drm_gem_object_unreference_unlocked(gobj);
  380. return r;
  381. }
  382. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  383. struct drm_file *filp)
  384. {
  385. struct drm_radeon_gem_va *args = data;
  386. struct drm_gem_object *gobj;
  387. struct radeon_device *rdev = dev->dev_private;
  388. struct radeon_fpriv *fpriv = filp->driver_priv;
  389. struct radeon_bo *rbo;
  390. struct radeon_bo_va *bo_va;
  391. u32 invalid_flags;
  392. int r = 0;
  393. if (!rdev->vm_manager.enabled) {
  394. args->operation = RADEON_VA_RESULT_ERROR;
  395. return -ENOTTY;
  396. }
  397. /* !! DONT REMOVE !!
  398. * We don't support vm_id yet, to be sure we don't have have broken
  399. * userspace, reject anyone trying to use non 0 value thus moving
  400. * forward we can use those fields without breaking existant userspace
  401. */
  402. if (args->vm_id) {
  403. args->operation = RADEON_VA_RESULT_ERROR;
  404. return -EINVAL;
  405. }
  406. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  407. dev_err(&dev->pdev->dev,
  408. "offset 0x%lX is in reserved area 0x%X\n",
  409. (unsigned long)args->offset,
  410. RADEON_VA_RESERVED_SIZE);
  411. args->operation = RADEON_VA_RESULT_ERROR;
  412. return -EINVAL;
  413. }
  414. /* don't remove, we need to enforce userspace to set the snooped flag
  415. * otherwise we will endup with broken userspace and we won't be able
  416. * to enable this feature without adding new interface
  417. */
  418. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  419. if ((args->flags & invalid_flags)) {
  420. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  421. args->flags, invalid_flags);
  422. args->operation = RADEON_VA_RESULT_ERROR;
  423. return -EINVAL;
  424. }
  425. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  426. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  427. args->operation = RADEON_VA_RESULT_ERROR;
  428. return -EINVAL;
  429. }
  430. switch (args->operation) {
  431. case RADEON_VA_MAP:
  432. case RADEON_VA_UNMAP:
  433. break;
  434. default:
  435. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  436. args->operation);
  437. args->operation = RADEON_VA_RESULT_ERROR;
  438. return -EINVAL;
  439. }
  440. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  441. if (gobj == NULL) {
  442. args->operation = RADEON_VA_RESULT_ERROR;
  443. return -ENOENT;
  444. }
  445. rbo = gem_to_radeon_bo(gobj);
  446. r = radeon_bo_reserve(rbo, false);
  447. if (r) {
  448. args->operation = RADEON_VA_RESULT_ERROR;
  449. drm_gem_object_unreference_unlocked(gobj);
  450. return r;
  451. }
  452. bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
  453. if (!bo_va) {
  454. args->operation = RADEON_VA_RESULT_ERROR;
  455. drm_gem_object_unreference_unlocked(gobj);
  456. return -ENOENT;
  457. }
  458. switch (args->operation) {
  459. case RADEON_VA_MAP:
  460. if (bo_va->soffset) {
  461. args->operation = RADEON_VA_RESULT_VA_EXIST;
  462. args->offset = bo_va->soffset;
  463. goto out;
  464. }
  465. r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
  466. break;
  467. case RADEON_VA_UNMAP:
  468. r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
  469. break;
  470. default:
  471. break;
  472. }
  473. args->operation = RADEON_VA_RESULT_OK;
  474. if (r) {
  475. args->operation = RADEON_VA_RESULT_ERROR;
  476. }
  477. out:
  478. radeon_bo_unreserve(rbo);
  479. drm_gem_object_unreference_unlocked(gobj);
  480. return r;
  481. }
  482. int radeon_mode_dumb_create(struct drm_file *file_priv,
  483. struct drm_device *dev,
  484. struct drm_mode_create_dumb *args)
  485. {
  486. struct radeon_device *rdev = dev->dev_private;
  487. struct drm_gem_object *gobj;
  488. uint32_t handle;
  489. int r;
  490. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  491. args->size = args->pitch * args->height;
  492. args->size = ALIGN(args->size, PAGE_SIZE);
  493. r = radeon_gem_object_create(rdev, args->size, 0,
  494. RADEON_GEM_DOMAIN_VRAM,
  495. false, ttm_bo_type_device,
  496. &gobj);
  497. if (r)
  498. return -ENOMEM;
  499. r = drm_gem_handle_create(file_priv, gobj, &handle);
  500. /* drop reference from allocate - handle holds it now */
  501. drm_gem_object_unreference_unlocked(gobj);
  502. if (r) {
  503. return r;
  504. }
  505. args->handle = handle;
  506. return 0;
  507. }
  508. #if defined(CONFIG_DEBUG_FS)
  509. static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
  510. {
  511. struct drm_info_node *node = (struct drm_info_node *)m->private;
  512. struct drm_device *dev = node->minor->dev;
  513. struct radeon_device *rdev = dev->dev_private;
  514. struct radeon_bo *rbo;
  515. unsigned i = 0;
  516. mutex_lock(&rdev->gem.mutex);
  517. list_for_each_entry(rbo, &rdev->gem.objects, list) {
  518. unsigned domain;
  519. const char *placement;
  520. domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
  521. switch (domain) {
  522. case RADEON_GEM_DOMAIN_VRAM:
  523. placement = "VRAM";
  524. break;
  525. case RADEON_GEM_DOMAIN_GTT:
  526. placement = " GTT";
  527. break;
  528. case RADEON_GEM_DOMAIN_CPU:
  529. default:
  530. placement = " CPU";
  531. break;
  532. }
  533. seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
  534. i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
  535. placement, (unsigned long)rbo->pid);
  536. i++;
  537. }
  538. mutex_unlock(&rdev->gem.mutex);
  539. return 0;
  540. }
  541. static struct drm_info_list radeon_debugfs_gem_list[] = {
  542. {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
  543. };
  544. #endif
  545. int radeon_gem_debugfs_init(struct radeon_device *rdev)
  546. {
  547. #if defined(CONFIG_DEBUG_FS)
  548. return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);
  549. #endif
  550. return 0;
  551. }