atombios_i2c.c 4.1 KB

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  1. /*
  2. * Copyright 2011 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Alex Deucher
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include <drm/radeon_drm.h>
  27. #include "radeon.h"
  28. #include "atom.h"
  29. extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
  30. #define TARGET_HW_I2C_CLOCK 50
  31. /* these are a limitation of ProcessI2cChannelTransaction not the hw */
  32. #define ATOM_MAX_HW_I2C_WRITE 3
  33. #define ATOM_MAX_HW_I2C_READ 255
  34. static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
  35. u8 slave_addr, u8 flags,
  36. u8 *buf, u8 num)
  37. {
  38. struct drm_device *dev = chan->dev;
  39. struct radeon_device *rdev = dev->dev_private;
  40. PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
  41. int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
  42. unsigned char *base;
  43. u16 out;
  44. memset(&args, 0, sizeof(args));
  45. base = (unsigned char *)rdev->mode_info.atom_context->scratch;
  46. if (flags & HW_I2C_WRITE) {
  47. if (num > ATOM_MAX_HW_I2C_WRITE) {
  48. DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
  49. return -EINVAL;
  50. }
  51. args.ucRegIndex = buf[0];
  52. if (num > 1)
  53. memcpy(&out, &buf[1], num - 1);
  54. args.lpI2CDataOut = cpu_to_le16(out);
  55. } else {
  56. if (num > ATOM_MAX_HW_I2C_READ) {
  57. DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num);
  58. return -EINVAL;
  59. }
  60. args.ucRegIndex = 0;
  61. args.lpI2CDataOut = 0;
  62. }
  63. args.ucFlag = flags;
  64. args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
  65. args.ucTransBytes = num;
  66. args.ucSlaveAddr = slave_addr << 1;
  67. args.ucLineNumber = chan->rec.i2c_id;
  68. atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
  69. /* error */
  70. if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
  71. DRM_DEBUG_KMS("hw_i2c error\n");
  72. return -EIO;
  73. }
  74. if (!(flags & HW_I2C_WRITE))
  75. radeon_atom_copy_swap(buf, base, num, false);
  76. return 0;
  77. }
  78. int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
  79. struct i2c_msg *msgs, int num)
  80. {
  81. struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
  82. struct i2c_msg *p;
  83. int i, remaining, current_count, buffer_offset, max_bytes, ret;
  84. u8 buf = 0, flags;
  85. /* check for bus probe */
  86. p = &msgs[0];
  87. if ((num == 1) && (p->len == 0)) {
  88. ret = radeon_process_i2c_ch(i2c,
  89. p->addr, HW_I2C_WRITE,
  90. &buf, 1);
  91. if (ret)
  92. return ret;
  93. else
  94. return num;
  95. }
  96. for (i = 0; i < num; i++) {
  97. p = &msgs[i];
  98. remaining = p->len;
  99. buffer_offset = 0;
  100. /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
  101. if (p->flags & I2C_M_RD) {
  102. max_bytes = ATOM_MAX_HW_I2C_READ;
  103. flags = HW_I2C_READ;
  104. } else {
  105. max_bytes = ATOM_MAX_HW_I2C_WRITE;
  106. flags = HW_I2C_WRITE;
  107. }
  108. while (remaining) {
  109. if (remaining > max_bytes)
  110. current_count = max_bytes;
  111. else
  112. current_count = remaining;
  113. ret = radeon_process_i2c_ch(i2c,
  114. p->addr, flags,
  115. &p->buf[buffer_offset], current_count);
  116. if (ret)
  117. return ret;
  118. remaining -= current_count;
  119. buffer_offset += current_count;
  120. }
  121. }
  122. return num;
  123. }
  124. u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
  125. {
  126. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  127. }