intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. static void intel_lvds_get_config(struct intel_encoder *encoder,
  76. struct intel_crtc_config *pipe_config)
  77. {
  78. struct drm_device *dev = encoder->base.dev;
  79. struct drm_i915_private *dev_priv = dev->dev_private;
  80. u32 lvds_reg, tmp, flags = 0;
  81. int dotclock;
  82. if (HAS_PCH_SPLIT(dev))
  83. lvds_reg = PCH_LVDS;
  84. else
  85. lvds_reg = LVDS;
  86. tmp = I915_READ(lvds_reg);
  87. if (tmp & LVDS_HSYNC_POLARITY)
  88. flags |= DRM_MODE_FLAG_NHSYNC;
  89. else
  90. flags |= DRM_MODE_FLAG_PHSYNC;
  91. if (tmp & LVDS_VSYNC_POLARITY)
  92. flags |= DRM_MODE_FLAG_NVSYNC;
  93. else
  94. flags |= DRM_MODE_FLAG_PVSYNC;
  95. pipe_config->adjusted_mode.flags |= flags;
  96. /* gen2/3 store dither state in pfit control, needs to match */
  97. if (INTEL_INFO(dev)->gen < 4) {
  98. tmp = I915_READ(PFIT_CONTROL);
  99. pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  100. }
  101. dotclock = pipe_config->port_clock;
  102. if (HAS_PCH_SPLIT(dev_priv->dev))
  103. ironlake_check_encoder_dotclock(pipe_config, dotclock);
  104. pipe_config->adjusted_mode.crtc_clock = dotclock;
  105. }
  106. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  107. * This is an exception to the general rule that mode_set doesn't turn
  108. * things on.
  109. */
  110. static void intel_pre_enable_lvds(struct intel_encoder *encoder)
  111. {
  112. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  113. struct drm_device *dev = encoder->base.dev;
  114. struct drm_i915_private *dev_priv = dev->dev_private;
  115. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  116. const struct drm_display_mode *adjusted_mode =
  117. &crtc->config.adjusted_mode;
  118. int pipe = crtc->pipe;
  119. u32 temp;
  120. if (HAS_PCH_SPLIT(dev)) {
  121. assert_fdi_rx_pll_disabled(dev_priv, pipe);
  122. assert_shared_dpll_disabled(dev_priv,
  123. intel_crtc_to_shared_dpll(crtc));
  124. } else {
  125. assert_pll_disabled(dev_priv, pipe);
  126. }
  127. temp = I915_READ(lvds_encoder->reg);
  128. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  129. if (HAS_PCH_CPT(dev)) {
  130. temp &= ~PORT_TRANS_SEL_MASK;
  131. temp |= PORT_TRANS_SEL_CPT(pipe);
  132. } else {
  133. if (pipe == 1) {
  134. temp |= LVDS_PIPEB_SELECT;
  135. } else {
  136. temp &= ~LVDS_PIPEB_SELECT;
  137. }
  138. }
  139. /* set the corresponsding LVDS_BORDER bit */
  140. temp &= ~LVDS_BORDER_ENABLE;
  141. temp |= crtc->config.gmch_pfit.lvds_border_bits;
  142. /* Set the B0-B3 data pairs corresponding to whether we're going to
  143. * set the DPLLs for dual-channel mode or not.
  144. */
  145. if (lvds_encoder->is_dual_link)
  146. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  147. else
  148. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  149. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  150. * appropriately here, but we need to look more thoroughly into how
  151. * panels behave in the two modes.
  152. */
  153. /* Set the dithering flag on LVDS as needed, note that there is no
  154. * special lvds dither control bit on pch-split platforms, dithering is
  155. * only controlled through the PIPECONF reg. */
  156. if (INTEL_INFO(dev)->gen == 4) {
  157. /* Bspec wording suggests that LVDS port dithering only exists
  158. * for 18bpp panels. */
  159. if (crtc->config.dither && crtc->config.pipe_bpp == 18)
  160. temp |= LVDS_ENABLE_DITHER;
  161. else
  162. temp &= ~LVDS_ENABLE_DITHER;
  163. }
  164. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  165. if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
  166. temp |= LVDS_HSYNC_POLARITY;
  167. if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
  168. temp |= LVDS_VSYNC_POLARITY;
  169. I915_WRITE(lvds_encoder->reg, temp);
  170. }
  171. /**
  172. * Sets the power state for the panel.
  173. */
  174. static void intel_enable_lvds(struct intel_encoder *encoder)
  175. {
  176. struct drm_device *dev = encoder->base.dev;
  177. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  178. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  179. struct drm_i915_private *dev_priv = dev->dev_private;
  180. u32 ctl_reg, stat_reg;
  181. if (HAS_PCH_SPLIT(dev)) {
  182. ctl_reg = PCH_PP_CONTROL;
  183. stat_reg = PCH_PP_STATUS;
  184. } else {
  185. ctl_reg = PP_CONTROL;
  186. stat_reg = PP_STATUS;
  187. }
  188. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  189. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  190. POSTING_READ(lvds_encoder->reg);
  191. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  192. DRM_ERROR("timed out waiting for panel to power on\n");
  193. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  194. }
  195. static void intel_disable_lvds(struct intel_encoder *encoder)
  196. {
  197. struct drm_device *dev = encoder->base.dev;
  198. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  199. struct drm_i915_private *dev_priv = dev->dev_private;
  200. u32 ctl_reg, stat_reg;
  201. if (HAS_PCH_SPLIT(dev)) {
  202. ctl_reg = PCH_PP_CONTROL;
  203. stat_reg = PCH_PP_STATUS;
  204. } else {
  205. ctl_reg = PP_CONTROL;
  206. stat_reg = PP_STATUS;
  207. }
  208. intel_panel_disable_backlight(dev);
  209. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  210. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  211. DRM_ERROR("timed out waiting for panel to power off\n");
  212. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  213. POSTING_READ(lvds_encoder->reg);
  214. }
  215. static int intel_lvds_mode_valid(struct drm_connector *connector,
  216. struct drm_display_mode *mode)
  217. {
  218. struct intel_connector *intel_connector = to_intel_connector(connector);
  219. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  220. if (mode->hdisplay > fixed_mode->hdisplay)
  221. return MODE_PANEL;
  222. if (mode->vdisplay > fixed_mode->vdisplay)
  223. return MODE_PANEL;
  224. return MODE_OK;
  225. }
  226. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  227. struct intel_crtc_config *pipe_config)
  228. {
  229. struct drm_device *dev = intel_encoder->base.dev;
  230. struct drm_i915_private *dev_priv = dev->dev_private;
  231. struct intel_lvds_encoder *lvds_encoder =
  232. to_lvds_encoder(&intel_encoder->base);
  233. struct intel_connector *intel_connector =
  234. &lvds_encoder->attached_connector->base;
  235. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  236. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  237. unsigned int lvds_bpp;
  238. /* Should never happen!! */
  239. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  240. DRM_ERROR("Can't support LVDS on pipe A\n");
  241. return false;
  242. }
  243. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  244. LVDS_A3_POWER_UP)
  245. lvds_bpp = 8*3;
  246. else
  247. lvds_bpp = 6*3;
  248. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  249. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  250. pipe_config->pipe_bpp, lvds_bpp);
  251. pipe_config->pipe_bpp = lvds_bpp;
  252. }
  253. /*
  254. * We have timings from the BIOS for the panel, put them in
  255. * to the adjusted mode. The CRTC will be set up for this mode,
  256. * with the panel scaling set up to source from the H/VDisplay
  257. * of the original mode.
  258. */
  259. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  260. adjusted_mode);
  261. if (HAS_PCH_SPLIT(dev)) {
  262. pipe_config->has_pch_encoder = true;
  263. intel_pch_panel_fitting(intel_crtc, pipe_config,
  264. intel_connector->panel.fitting_mode);
  265. } else {
  266. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  267. intel_connector->panel.fitting_mode);
  268. }
  269. /*
  270. * XXX: It would be nice to support lower refresh rates on the
  271. * panels to reduce power consumption, and perhaps match the
  272. * user's requested refresh rate.
  273. */
  274. return true;
  275. }
  276. static void intel_lvds_mode_set(struct intel_encoder *encoder)
  277. {
  278. /*
  279. * We don't do anything here, the LVDS port is fully set up in the pre
  280. * enable hook - the ordering constraints for enabling the lvds port vs.
  281. * enabling the display pll are too strict.
  282. */
  283. }
  284. /**
  285. * Detect the LVDS connection.
  286. *
  287. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  288. * connected and closed means disconnected. We also send hotplug events as
  289. * needed, using lid status notification from the input layer.
  290. */
  291. static enum drm_connector_status
  292. intel_lvds_detect(struct drm_connector *connector, bool force)
  293. {
  294. struct drm_device *dev = connector->dev;
  295. enum drm_connector_status status;
  296. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  297. connector->base.id, drm_get_connector_name(connector));
  298. status = intel_panel_detect(dev);
  299. if (status != connector_status_unknown)
  300. return status;
  301. return connector_status_connected;
  302. }
  303. /**
  304. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  305. */
  306. static int intel_lvds_get_modes(struct drm_connector *connector)
  307. {
  308. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  309. struct drm_device *dev = connector->dev;
  310. struct drm_display_mode *mode;
  311. /* use cached edid if we have one */
  312. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  313. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  314. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  315. if (mode == NULL)
  316. return 0;
  317. drm_mode_probed_add(connector, mode);
  318. return 1;
  319. }
  320. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  321. {
  322. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  323. return 1;
  324. }
  325. /* The GPU hangs up on these systems if modeset is performed on LID open */
  326. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  327. {
  328. .callback = intel_no_modeset_on_lid_dmi_callback,
  329. .ident = "Toshiba Tecra A11",
  330. .matches = {
  331. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  332. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  333. },
  334. },
  335. { } /* terminating entry */
  336. };
  337. /*
  338. * Lid events. Note the use of 'modeset':
  339. * - we set it to MODESET_ON_LID_OPEN on lid close,
  340. * and set it to MODESET_DONE on open
  341. * - we use it as a "only once" bit (ie we ignore
  342. * duplicate events where it was already properly set)
  343. * - the suspend/resume paths will set it to
  344. * MODESET_SUSPENDED and ignore the lid open event,
  345. * because they restore the mode ("lid open").
  346. */
  347. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  348. void *unused)
  349. {
  350. struct intel_lvds_connector *lvds_connector =
  351. container_of(nb, struct intel_lvds_connector, lid_notifier);
  352. struct drm_connector *connector = &lvds_connector->base.base;
  353. struct drm_device *dev = connector->dev;
  354. struct drm_i915_private *dev_priv = dev->dev_private;
  355. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  356. return NOTIFY_OK;
  357. mutex_lock(&dev_priv->modeset_restore_lock);
  358. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  359. goto exit;
  360. /*
  361. * check and update the status of LVDS connector after receiving
  362. * the LID nofication event.
  363. */
  364. connector->status = connector->funcs->detect(connector, false);
  365. /* Don't force modeset on machines where it causes a GPU lockup */
  366. if (dmi_check_system(intel_no_modeset_on_lid))
  367. goto exit;
  368. if (!acpi_lid_open()) {
  369. /* do modeset on next lid open event */
  370. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  371. goto exit;
  372. }
  373. if (dev_priv->modeset_restore == MODESET_DONE)
  374. goto exit;
  375. drm_modeset_lock_all(dev);
  376. intel_modeset_setup_hw_state(dev, true);
  377. drm_modeset_unlock_all(dev);
  378. dev_priv->modeset_restore = MODESET_DONE;
  379. exit:
  380. mutex_unlock(&dev_priv->modeset_restore_lock);
  381. return NOTIFY_OK;
  382. }
  383. /**
  384. * intel_lvds_destroy - unregister and free LVDS structures
  385. * @connector: connector to free
  386. *
  387. * Unregister the DDC bus for this connector then free the driver private
  388. * structure.
  389. */
  390. static void intel_lvds_destroy(struct drm_connector *connector)
  391. {
  392. struct intel_lvds_connector *lvds_connector =
  393. to_lvds_connector(connector);
  394. if (lvds_connector->lid_notifier.notifier_call)
  395. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  396. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  397. kfree(lvds_connector->base.edid);
  398. intel_panel_fini(&lvds_connector->base.panel);
  399. drm_connector_cleanup(connector);
  400. kfree(connector);
  401. }
  402. static int intel_lvds_set_property(struct drm_connector *connector,
  403. struct drm_property *property,
  404. uint64_t value)
  405. {
  406. struct intel_connector *intel_connector = to_intel_connector(connector);
  407. struct drm_device *dev = connector->dev;
  408. if (property == dev->mode_config.scaling_mode_property) {
  409. struct drm_crtc *crtc;
  410. if (value == DRM_MODE_SCALE_NONE) {
  411. DRM_DEBUG_KMS("no scaling not supported\n");
  412. return -EINVAL;
  413. }
  414. if (intel_connector->panel.fitting_mode == value) {
  415. /* the LVDS scaling property is not changed */
  416. return 0;
  417. }
  418. intel_connector->panel.fitting_mode = value;
  419. crtc = intel_attached_encoder(connector)->base.crtc;
  420. if (crtc && crtc->enabled) {
  421. /*
  422. * If the CRTC is enabled, the display will be changed
  423. * according to the new panel fitting mode.
  424. */
  425. intel_crtc_restore_mode(crtc);
  426. }
  427. }
  428. return 0;
  429. }
  430. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  431. .get_modes = intel_lvds_get_modes,
  432. .mode_valid = intel_lvds_mode_valid,
  433. .best_encoder = intel_best_encoder,
  434. };
  435. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  436. .dpms = intel_connector_dpms,
  437. .detect = intel_lvds_detect,
  438. .fill_modes = drm_helper_probe_single_connector_modes,
  439. .set_property = intel_lvds_set_property,
  440. .destroy = intel_lvds_destroy,
  441. };
  442. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  443. .destroy = intel_encoder_destroy,
  444. };
  445. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  446. {
  447. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  448. return 1;
  449. }
  450. /* These systems claim to have LVDS, but really don't */
  451. static const struct dmi_system_id intel_no_lvds[] = {
  452. {
  453. .callback = intel_no_lvds_dmi_callback,
  454. .ident = "Apple Mac Mini (Core series)",
  455. .matches = {
  456. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  457. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  458. },
  459. },
  460. {
  461. .callback = intel_no_lvds_dmi_callback,
  462. .ident = "Apple Mac Mini (Core 2 series)",
  463. .matches = {
  464. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  465. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  466. },
  467. },
  468. {
  469. .callback = intel_no_lvds_dmi_callback,
  470. .ident = "MSI IM-945GSE-A",
  471. .matches = {
  472. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  473. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  474. },
  475. },
  476. {
  477. .callback = intel_no_lvds_dmi_callback,
  478. .ident = "Dell Studio Hybrid",
  479. .matches = {
  480. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  481. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  482. },
  483. },
  484. {
  485. .callback = intel_no_lvds_dmi_callback,
  486. .ident = "Dell OptiPlex FX170",
  487. .matches = {
  488. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  489. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  490. },
  491. },
  492. {
  493. .callback = intel_no_lvds_dmi_callback,
  494. .ident = "AOpen Mini PC",
  495. .matches = {
  496. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  497. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  498. },
  499. },
  500. {
  501. .callback = intel_no_lvds_dmi_callback,
  502. .ident = "AOpen Mini PC MP915",
  503. .matches = {
  504. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  505. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  506. },
  507. },
  508. {
  509. .callback = intel_no_lvds_dmi_callback,
  510. .ident = "AOpen i915GMm-HFS",
  511. .matches = {
  512. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  513. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  514. },
  515. },
  516. {
  517. .callback = intel_no_lvds_dmi_callback,
  518. .ident = "AOpen i45GMx-I",
  519. .matches = {
  520. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  521. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  522. },
  523. },
  524. {
  525. .callback = intel_no_lvds_dmi_callback,
  526. .ident = "Aopen i945GTt-VFA",
  527. .matches = {
  528. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  529. },
  530. },
  531. {
  532. .callback = intel_no_lvds_dmi_callback,
  533. .ident = "Clientron U800",
  534. .matches = {
  535. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  536. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  537. },
  538. },
  539. {
  540. .callback = intel_no_lvds_dmi_callback,
  541. .ident = "Clientron E830",
  542. .matches = {
  543. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  544. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  545. },
  546. },
  547. {
  548. .callback = intel_no_lvds_dmi_callback,
  549. .ident = "Asus EeeBox PC EB1007",
  550. .matches = {
  551. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  552. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  553. },
  554. },
  555. {
  556. .callback = intel_no_lvds_dmi_callback,
  557. .ident = "Asus AT5NM10T-I",
  558. .matches = {
  559. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  560. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  561. },
  562. },
  563. {
  564. .callback = intel_no_lvds_dmi_callback,
  565. .ident = "Hewlett-Packard HP t5740",
  566. .matches = {
  567. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  568. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  569. },
  570. },
  571. {
  572. .callback = intel_no_lvds_dmi_callback,
  573. .ident = "Hewlett-Packard t5745",
  574. .matches = {
  575. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  576. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  577. },
  578. },
  579. {
  580. .callback = intel_no_lvds_dmi_callback,
  581. .ident = "Hewlett-Packard st5747",
  582. .matches = {
  583. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  584. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  585. },
  586. },
  587. {
  588. .callback = intel_no_lvds_dmi_callback,
  589. .ident = "MSI Wind Box DC500",
  590. .matches = {
  591. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  592. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  593. },
  594. },
  595. {
  596. .callback = intel_no_lvds_dmi_callback,
  597. .ident = "Gigabyte GA-D525TUD",
  598. .matches = {
  599. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  600. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  601. },
  602. },
  603. {
  604. .callback = intel_no_lvds_dmi_callback,
  605. .ident = "Supermicro X7SPA-H",
  606. .matches = {
  607. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  608. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  609. },
  610. },
  611. {
  612. .callback = intel_no_lvds_dmi_callback,
  613. .ident = "Fujitsu Esprimo Q900",
  614. .matches = {
  615. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  616. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  617. },
  618. },
  619. {
  620. .callback = intel_no_lvds_dmi_callback,
  621. .ident = "Intel D510MO",
  622. .matches = {
  623. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  624. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
  625. },
  626. },
  627. {
  628. .callback = intel_no_lvds_dmi_callback,
  629. .ident = "Intel D525MW",
  630. .matches = {
  631. DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
  632. DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
  633. },
  634. },
  635. { } /* terminating entry */
  636. };
  637. /**
  638. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  639. * @dev: drm device
  640. * @connector: LVDS connector
  641. *
  642. * Find the reduced downclock for LVDS in EDID.
  643. */
  644. static void intel_find_lvds_downclock(struct drm_device *dev,
  645. struct drm_display_mode *fixed_mode,
  646. struct drm_connector *connector)
  647. {
  648. struct drm_i915_private *dev_priv = dev->dev_private;
  649. struct drm_display_mode *scan;
  650. int temp_downclock;
  651. temp_downclock = fixed_mode->clock;
  652. list_for_each_entry(scan, &connector->probed_modes, head) {
  653. /*
  654. * If one mode has the same resolution with the fixed_panel
  655. * mode while they have the different refresh rate, it means
  656. * that the reduced downclock is found for the LVDS. In such
  657. * case we can set the different FPx0/1 to dynamically select
  658. * between low and high frequency.
  659. */
  660. if (scan->hdisplay == fixed_mode->hdisplay &&
  661. scan->hsync_start == fixed_mode->hsync_start &&
  662. scan->hsync_end == fixed_mode->hsync_end &&
  663. scan->htotal == fixed_mode->htotal &&
  664. scan->vdisplay == fixed_mode->vdisplay &&
  665. scan->vsync_start == fixed_mode->vsync_start &&
  666. scan->vsync_end == fixed_mode->vsync_end &&
  667. scan->vtotal == fixed_mode->vtotal) {
  668. if (scan->clock < temp_downclock) {
  669. /*
  670. * The downclock is already found. But we
  671. * expect to find the lower downclock.
  672. */
  673. temp_downclock = scan->clock;
  674. }
  675. }
  676. }
  677. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  678. /* We found the downclock for LVDS. */
  679. dev_priv->lvds_downclock_avail = 1;
  680. dev_priv->lvds_downclock = temp_downclock;
  681. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  682. "Normal clock %dKhz, downclock %dKhz\n",
  683. fixed_mode->clock, temp_downclock);
  684. }
  685. }
  686. /*
  687. * Enumerate the child dev array parsed from VBT to check whether
  688. * the LVDS is present.
  689. * If it is present, return 1.
  690. * If it is not present, return false.
  691. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  692. */
  693. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  694. u8 *i2c_pin)
  695. {
  696. struct drm_i915_private *dev_priv = dev->dev_private;
  697. int i;
  698. if (!dev_priv->vbt.child_dev_num)
  699. return true;
  700. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  701. union child_device_config *uchild = dev_priv->vbt.child_dev + i;
  702. struct old_child_dev_config *child = &uchild->old;
  703. /* If the device type is not LFP, continue.
  704. * We have to check both the new identifiers as well as the
  705. * old for compatibility with some BIOSes.
  706. */
  707. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  708. child->device_type != DEVICE_TYPE_LFP)
  709. continue;
  710. if (intel_gmbus_is_port_valid(child->i2c_pin))
  711. *i2c_pin = child->i2c_pin;
  712. /* However, we cannot trust the BIOS writers to populate
  713. * the VBT correctly. Since LVDS requires additional
  714. * information from AIM blocks, a non-zero addin offset is
  715. * a good indicator that the LVDS is actually present.
  716. */
  717. if (child->addin_offset)
  718. return true;
  719. /* But even then some BIOS writers perform some black magic
  720. * and instantiate the device without reference to any
  721. * additional data. Trust that if the VBT was written into
  722. * the OpRegion then they have validated the LVDS's existence.
  723. */
  724. if (dev_priv->opregion.vbt)
  725. return true;
  726. }
  727. return false;
  728. }
  729. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  730. {
  731. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  732. return 1;
  733. }
  734. static const struct dmi_system_id intel_dual_link_lvds[] = {
  735. {
  736. .callback = intel_dual_link_lvds_callback,
  737. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  738. .matches = {
  739. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  740. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  741. },
  742. },
  743. { } /* terminating entry */
  744. };
  745. bool intel_is_dual_link_lvds(struct drm_device *dev)
  746. {
  747. struct intel_encoder *encoder;
  748. struct intel_lvds_encoder *lvds_encoder;
  749. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  750. base.head) {
  751. if (encoder->type == INTEL_OUTPUT_LVDS) {
  752. lvds_encoder = to_lvds_encoder(&encoder->base);
  753. return lvds_encoder->is_dual_link;
  754. }
  755. }
  756. return false;
  757. }
  758. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  759. {
  760. struct drm_device *dev = lvds_encoder->base.base.dev;
  761. unsigned int val;
  762. struct drm_i915_private *dev_priv = dev->dev_private;
  763. /* use the module option value if specified */
  764. if (i915_lvds_channel_mode > 0)
  765. return i915_lvds_channel_mode == 2;
  766. if (dmi_check_system(intel_dual_link_lvds))
  767. return true;
  768. /* BIOS should set the proper LVDS register value at boot, but
  769. * in reality, it doesn't set the value when the lid is closed;
  770. * we need to check "the value to be set" in VBT when LVDS
  771. * register is uninitialized.
  772. */
  773. val = I915_READ(lvds_encoder->reg);
  774. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  775. val = dev_priv->vbt.bios_lvds_val;
  776. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  777. }
  778. static bool intel_lvds_supported(struct drm_device *dev)
  779. {
  780. /* With the introduction of the PCH we gained a dedicated
  781. * LVDS presence pin, use it. */
  782. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  783. return true;
  784. /* Otherwise LVDS was only attached to mobile products,
  785. * except for the inglorious 830gm */
  786. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  787. return true;
  788. return false;
  789. }
  790. /**
  791. * intel_lvds_init - setup LVDS connectors on this device
  792. * @dev: drm device
  793. *
  794. * Create the connector, register the LVDS DDC bus, and try to figure out what
  795. * modes we can display on the LVDS panel (if present).
  796. */
  797. void intel_lvds_init(struct drm_device *dev)
  798. {
  799. struct drm_i915_private *dev_priv = dev->dev_private;
  800. struct intel_lvds_encoder *lvds_encoder;
  801. struct intel_encoder *intel_encoder;
  802. struct intel_lvds_connector *lvds_connector;
  803. struct intel_connector *intel_connector;
  804. struct drm_connector *connector;
  805. struct drm_encoder *encoder;
  806. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  807. struct drm_display_mode *fixed_mode = NULL;
  808. struct edid *edid;
  809. struct drm_crtc *crtc;
  810. u32 lvds;
  811. int pipe;
  812. u8 pin;
  813. if (!intel_lvds_supported(dev))
  814. return;
  815. /* Skip init on machines we know falsely report LVDS */
  816. if (dmi_check_system(intel_no_lvds))
  817. return;
  818. pin = GMBUS_PORT_PANEL;
  819. if (!lvds_is_present_in_vbt(dev, &pin)) {
  820. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  821. return;
  822. }
  823. if (HAS_PCH_SPLIT(dev)) {
  824. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  825. return;
  826. if (dev_priv->vbt.edp_support) {
  827. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  828. return;
  829. }
  830. }
  831. lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
  832. if (!lvds_encoder)
  833. return;
  834. lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
  835. if (!lvds_connector) {
  836. kfree(lvds_encoder);
  837. return;
  838. }
  839. lvds_encoder->attached_connector = lvds_connector;
  840. intel_encoder = &lvds_encoder->base;
  841. encoder = &intel_encoder->base;
  842. intel_connector = &lvds_connector->base;
  843. connector = &intel_connector->base;
  844. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  845. DRM_MODE_CONNECTOR_LVDS);
  846. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  847. DRM_MODE_ENCODER_LVDS);
  848. intel_encoder->enable = intel_enable_lvds;
  849. intel_encoder->pre_enable = intel_pre_enable_lvds;
  850. intel_encoder->compute_config = intel_lvds_compute_config;
  851. intel_encoder->mode_set = intel_lvds_mode_set;
  852. intel_encoder->disable = intel_disable_lvds;
  853. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  854. intel_encoder->get_config = intel_lvds_get_config;
  855. intel_connector->get_hw_state = intel_connector_get_hw_state;
  856. intel_connector_attach_encoder(intel_connector, intel_encoder);
  857. intel_encoder->type = INTEL_OUTPUT_LVDS;
  858. intel_encoder->cloneable = false;
  859. if (HAS_PCH_SPLIT(dev))
  860. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  861. else if (IS_GEN4(dev))
  862. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  863. else
  864. intel_encoder->crtc_mask = (1 << 1);
  865. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  866. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  867. connector->interlace_allowed = false;
  868. connector->doublescan_allowed = false;
  869. if (HAS_PCH_SPLIT(dev)) {
  870. lvds_encoder->reg = PCH_LVDS;
  871. } else {
  872. lvds_encoder->reg = LVDS;
  873. }
  874. /* create the scaling mode property */
  875. drm_mode_create_scaling_mode_property(dev);
  876. drm_object_attach_property(&connector->base,
  877. dev->mode_config.scaling_mode_property,
  878. DRM_MODE_SCALE_ASPECT);
  879. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  880. /*
  881. * LVDS discovery:
  882. * 1) check for EDID on DDC
  883. * 2) check for VBT data
  884. * 3) check to see if LVDS is already on
  885. * if none of the above, no panel
  886. * 4) make sure lid is open
  887. * if closed, act like it's not there for now
  888. */
  889. /*
  890. * Attempt to get the fixed panel mode from DDC. Assume that the
  891. * preferred mode is the right one.
  892. */
  893. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  894. if (edid) {
  895. if (drm_add_edid_modes(connector, edid)) {
  896. drm_mode_connector_update_edid_property(connector,
  897. edid);
  898. } else {
  899. kfree(edid);
  900. edid = ERR_PTR(-EINVAL);
  901. }
  902. } else {
  903. edid = ERR_PTR(-ENOENT);
  904. }
  905. lvds_connector->base.edid = edid;
  906. if (IS_ERR_OR_NULL(edid)) {
  907. /* Didn't get an EDID, so
  908. * Set wide sync ranges so we get all modes
  909. * handed to valid_mode for checking
  910. */
  911. connector->display_info.min_vfreq = 0;
  912. connector->display_info.max_vfreq = 200;
  913. connector->display_info.min_hfreq = 0;
  914. connector->display_info.max_hfreq = 200;
  915. }
  916. list_for_each_entry(scan, &connector->probed_modes, head) {
  917. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  918. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  919. drm_mode_debug_printmodeline(scan);
  920. fixed_mode = drm_mode_duplicate(dev, scan);
  921. if (fixed_mode) {
  922. intel_find_lvds_downclock(dev, fixed_mode,
  923. connector);
  924. goto out;
  925. }
  926. }
  927. }
  928. /* Failed to get EDID, what about VBT? */
  929. if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  930. DRM_DEBUG_KMS("using mode from VBT: ");
  931. drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  932. fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  933. if (fixed_mode) {
  934. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  935. goto out;
  936. }
  937. }
  938. /*
  939. * If we didn't get EDID, try checking if the panel is already turned
  940. * on. If so, assume that whatever is currently programmed is the
  941. * correct mode.
  942. */
  943. /* Ironlake: FIXME if still fail, not try pipe mode now */
  944. if (HAS_PCH_SPLIT(dev))
  945. goto failed;
  946. lvds = I915_READ(LVDS);
  947. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  948. crtc = intel_get_crtc_for_pipe(dev, pipe);
  949. if (crtc && (lvds & LVDS_PORT_EN)) {
  950. fixed_mode = intel_crtc_mode_get(dev, crtc);
  951. if (fixed_mode) {
  952. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  953. drm_mode_debug_printmodeline(fixed_mode);
  954. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  955. goto out;
  956. }
  957. }
  958. /* If we still don't have a mode after all that, give up. */
  959. if (!fixed_mode)
  960. goto failed;
  961. out:
  962. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  963. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  964. lvds_encoder->is_dual_link ? "dual" : "single");
  965. /*
  966. * Unlock registers and just
  967. * leave them unlocked
  968. */
  969. if (HAS_PCH_SPLIT(dev)) {
  970. I915_WRITE(PCH_PP_CONTROL,
  971. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  972. } else {
  973. I915_WRITE(PP_CONTROL,
  974. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  975. }
  976. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  977. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  978. DRM_DEBUG_KMS("lid notifier registration failed\n");
  979. lvds_connector->lid_notifier.notifier_call = NULL;
  980. }
  981. drm_sysfs_connector_add(connector);
  982. intel_panel_init(&intel_connector->panel, fixed_mode);
  983. intel_panel_setup_backlight(connector);
  984. return;
  985. failed:
  986. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  987. drm_connector_cleanup(connector);
  988. drm_encoder_cleanup(encoder);
  989. if (fixed_mode)
  990. drm_mode_destroy(dev, fixed_mode);
  991. kfree(lvds_encoder);
  992. kfree(lvds_connector);
  993. return;
  994. }