intel_dvo.c 15 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. */
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_crtc.h>
  31. #include "intel_drv.h"
  32. #include <drm/i915_drm.h>
  33. #include "i915_drv.h"
  34. #include "dvo.h"
  35. #define SIL164_ADDR 0x38
  36. #define CH7xxx_ADDR 0x76
  37. #define TFP410_ADDR 0x38
  38. #define NS2501_ADDR 0x38
  39. static const struct intel_dvo_device intel_dvo_devices[] = {
  40. {
  41. .type = INTEL_DVO_CHIP_TMDS,
  42. .name = "sil164",
  43. .dvo_reg = DVOC,
  44. .slave_addr = SIL164_ADDR,
  45. .dev_ops = &sil164_ops,
  46. },
  47. {
  48. .type = INTEL_DVO_CHIP_TMDS,
  49. .name = "ch7xxx",
  50. .dvo_reg = DVOC,
  51. .slave_addr = CH7xxx_ADDR,
  52. .dev_ops = &ch7xxx_ops,
  53. },
  54. {
  55. .type = INTEL_DVO_CHIP_TMDS,
  56. .name = "ch7xxx",
  57. .dvo_reg = DVOC,
  58. .slave_addr = 0x75, /* For some ch7010 */
  59. .dev_ops = &ch7xxx_ops,
  60. },
  61. {
  62. .type = INTEL_DVO_CHIP_LVDS,
  63. .name = "ivch",
  64. .dvo_reg = DVOA,
  65. .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  66. .dev_ops = &ivch_ops,
  67. },
  68. {
  69. .type = INTEL_DVO_CHIP_TMDS,
  70. .name = "tfp410",
  71. .dvo_reg = DVOC,
  72. .slave_addr = TFP410_ADDR,
  73. .dev_ops = &tfp410_ops,
  74. },
  75. {
  76. .type = INTEL_DVO_CHIP_LVDS,
  77. .name = "ch7017",
  78. .dvo_reg = DVOC,
  79. .slave_addr = 0x75,
  80. .gpio = GMBUS_PORT_DPB,
  81. .dev_ops = &ch7017_ops,
  82. },
  83. {
  84. .type = INTEL_DVO_CHIP_TMDS,
  85. .name = "ns2501",
  86. .dvo_reg = DVOC,
  87. .slave_addr = NS2501_ADDR,
  88. .dev_ops = &ns2501_ops,
  89. }
  90. };
  91. struct intel_dvo {
  92. struct intel_encoder base;
  93. struct intel_dvo_device dev;
  94. struct drm_display_mode *panel_fixed_mode;
  95. bool panel_wants_dither;
  96. };
  97. static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
  98. {
  99. return container_of(encoder, struct intel_dvo, base);
  100. }
  101. static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
  102. {
  103. return enc_to_dvo(intel_attached_encoder(connector));
  104. }
  105. static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
  106. {
  107. struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
  108. return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
  109. }
  110. static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
  111. enum pipe *pipe)
  112. {
  113. struct drm_device *dev = encoder->base.dev;
  114. struct drm_i915_private *dev_priv = dev->dev_private;
  115. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  116. u32 tmp;
  117. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  118. if (!(tmp & DVO_ENABLE))
  119. return false;
  120. *pipe = PORT_TO_PIPE(tmp);
  121. return true;
  122. }
  123. static void intel_dvo_get_config(struct intel_encoder *encoder,
  124. struct intel_crtc_config *pipe_config)
  125. {
  126. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  127. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  128. u32 tmp, flags = 0;
  129. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  130. if (tmp & DVO_HSYNC_ACTIVE_HIGH)
  131. flags |= DRM_MODE_FLAG_PHSYNC;
  132. else
  133. flags |= DRM_MODE_FLAG_NHSYNC;
  134. if (tmp & DVO_VSYNC_ACTIVE_HIGH)
  135. flags |= DRM_MODE_FLAG_PVSYNC;
  136. else
  137. flags |= DRM_MODE_FLAG_NVSYNC;
  138. pipe_config->adjusted_mode.flags |= flags;
  139. pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
  140. }
  141. static void intel_disable_dvo(struct intel_encoder *encoder)
  142. {
  143. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  144. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  145. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  146. u32 temp = I915_READ(dvo_reg);
  147. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  148. I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
  149. I915_READ(dvo_reg);
  150. }
  151. static void intel_enable_dvo(struct intel_encoder *encoder)
  152. {
  153. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  154. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  155. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  156. u32 temp = I915_READ(dvo_reg);
  157. I915_WRITE(dvo_reg, temp | DVO_ENABLE);
  158. I915_READ(dvo_reg);
  159. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  160. }
  161. /* Special dpms function to support cloning between dvo/sdvo/crt. */
  162. static void intel_dvo_dpms(struct drm_connector *connector, int mode)
  163. {
  164. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  165. struct drm_crtc *crtc;
  166. /* dvo supports only 2 dpms states. */
  167. if (mode != DRM_MODE_DPMS_ON)
  168. mode = DRM_MODE_DPMS_OFF;
  169. if (mode == connector->dpms)
  170. return;
  171. connector->dpms = mode;
  172. /* Only need to change hw state when actually enabled */
  173. crtc = intel_dvo->base.base.crtc;
  174. if (!crtc) {
  175. intel_dvo->base.connectors_active = false;
  176. return;
  177. }
  178. /* We call connector dpms manually below in case pipe dpms doesn't
  179. * change due to cloning. */
  180. if (mode == DRM_MODE_DPMS_ON) {
  181. intel_dvo->base.connectors_active = true;
  182. intel_crtc_update_dpms(crtc);
  183. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  184. } else {
  185. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  186. intel_dvo->base.connectors_active = false;
  187. intel_crtc_update_dpms(crtc);
  188. }
  189. intel_modeset_check_state(connector->dev);
  190. }
  191. static int intel_dvo_mode_valid(struct drm_connector *connector,
  192. struct drm_display_mode *mode)
  193. {
  194. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  195. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  196. return MODE_NO_DBLESCAN;
  197. /* XXX: Validate clock range */
  198. if (intel_dvo->panel_fixed_mode) {
  199. if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
  200. return MODE_PANEL;
  201. if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
  202. return MODE_PANEL;
  203. }
  204. return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
  205. }
  206. static bool intel_dvo_compute_config(struct intel_encoder *encoder,
  207. struct intel_crtc_config *pipe_config)
  208. {
  209. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  210. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  211. /* If we have timings from the BIOS for the panel, put them in
  212. * to the adjusted mode. The CRTC will be set up for this mode,
  213. * with the panel scaling set up to source from the H/VDisplay
  214. * of the original mode.
  215. */
  216. if (intel_dvo->panel_fixed_mode != NULL) {
  217. #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
  218. C(hdisplay);
  219. C(hsync_start);
  220. C(hsync_end);
  221. C(htotal);
  222. C(vdisplay);
  223. C(vsync_start);
  224. C(vsync_end);
  225. C(vtotal);
  226. C(clock);
  227. #undef C
  228. drm_mode_set_crtcinfo(adjusted_mode, 0);
  229. }
  230. return true;
  231. }
  232. static void intel_dvo_mode_set(struct intel_encoder *encoder)
  233. {
  234. struct drm_device *dev = encoder->base.dev;
  235. struct drm_i915_private *dev_priv = dev->dev_private;
  236. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  237. struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
  238. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  239. int pipe = crtc->pipe;
  240. u32 dvo_val;
  241. u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
  242. switch (dvo_reg) {
  243. case DVOA:
  244. default:
  245. dvo_srcdim_reg = DVOA_SRCDIM;
  246. break;
  247. case DVOB:
  248. dvo_srcdim_reg = DVOB_SRCDIM;
  249. break;
  250. case DVOC:
  251. dvo_srcdim_reg = DVOC_SRCDIM;
  252. break;
  253. }
  254. intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
  255. &crtc->config.requested_mode,
  256. adjusted_mode);
  257. /* Save the data order, since I don't know what it should be set to. */
  258. dvo_val = I915_READ(dvo_reg) &
  259. (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
  260. dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
  261. DVO_BLANK_ACTIVE_HIGH;
  262. if (pipe == 1)
  263. dvo_val |= DVO_PIPE_B_SELECT;
  264. dvo_val |= DVO_PIPE_STALL;
  265. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  266. dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
  267. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  268. dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
  269. /*I915_WRITE(DVOB_SRCDIM,
  270. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  271. (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
  272. I915_WRITE(dvo_srcdim_reg,
  273. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  274. (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
  275. /*I915_WRITE(DVOB, dvo_val);*/
  276. I915_WRITE(dvo_reg, dvo_val);
  277. }
  278. /**
  279. * Detect the output connection on our DVO device.
  280. *
  281. * Unimplemented.
  282. */
  283. static enum drm_connector_status
  284. intel_dvo_detect(struct drm_connector *connector, bool force)
  285. {
  286. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  287. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  288. connector->base.id, drm_get_connector_name(connector));
  289. return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
  290. }
  291. static int intel_dvo_get_modes(struct drm_connector *connector)
  292. {
  293. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  294. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  295. /* We should probably have an i2c driver get_modes function for those
  296. * devices which will have a fixed set of modes determined by the chip
  297. * (TV-out, for example), but for now with just TMDS and LVDS,
  298. * that's not the case.
  299. */
  300. intel_ddc_get_modes(connector,
  301. intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
  302. if (!list_empty(&connector->probed_modes))
  303. return 1;
  304. if (intel_dvo->panel_fixed_mode != NULL) {
  305. struct drm_display_mode *mode;
  306. mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
  307. if (mode) {
  308. drm_mode_probed_add(connector, mode);
  309. return 1;
  310. }
  311. }
  312. return 0;
  313. }
  314. static void intel_dvo_destroy(struct drm_connector *connector)
  315. {
  316. drm_connector_cleanup(connector);
  317. kfree(connector);
  318. }
  319. static const struct drm_connector_funcs intel_dvo_connector_funcs = {
  320. .dpms = intel_dvo_dpms,
  321. .detect = intel_dvo_detect,
  322. .destroy = intel_dvo_destroy,
  323. .fill_modes = drm_helper_probe_single_connector_modes,
  324. };
  325. static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
  326. .mode_valid = intel_dvo_mode_valid,
  327. .get_modes = intel_dvo_get_modes,
  328. .best_encoder = intel_best_encoder,
  329. };
  330. static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
  331. {
  332. struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
  333. if (intel_dvo->dev.dev_ops->destroy)
  334. intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
  335. kfree(intel_dvo->panel_fixed_mode);
  336. intel_encoder_destroy(encoder);
  337. }
  338. static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
  339. .destroy = intel_dvo_enc_destroy,
  340. };
  341. /**
  342. * Attempts to get a fixed panel timing for LVDS (currently only the i830).
  343. *
  344. * Other chips with DVO LVDS will need to extend this to deal with the LVDS
  345. * chip being on DVOB/C and having multiple pipes.
  346. */
  347. static struct drm_display_mode *
  348. intel_dvo_get_current_mode(struct drm_connector *connector)
  349. {
  350. struct drm_device *dev = connector->dev;
  351. struct drm_i915_private *dev_priv = dev->dev_private;
  352. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  353. uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
  354. struct drm_display_mode *mode = NULL;
  355. /* If the DVO port is active, that'll be the LVDS, so we can pull out
  356. * its timings to get how the BIOS set up the panel.
  357. */
  358. if (dvo_val & DVO_ENABLE) {
  359. struct drm_crtc *crtc;
  360. int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
  361. crtc = intel_get_crtc_for_pipe(dev, pipe);
  362. if (crtc) {
  363. mode = intel_crtc_mode_get(dev, crtc);
  364. if (mode) {
  365. mode->type |= DRM_MODE_TYPE_PREFERRED;
  366. if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
  367. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  368. if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
  369. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  370. }
  371. }
  372. }
  373. return mode;
  374. }
  375. void intel_dvo_init(struct drm_device *dev)
  376. {
  377. struct drm_i915_private *dev_priv = dev->dev_private;
  378. struct intel_encoder *intel_encoder;
  379. struct intel_dvo *intel_dvo;
  380. struct intel_connector *intel_connector;
  381. int i;
  382. int encoder_type = DRM_MODE_ENCODER_NONE;
  383. intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
  384. if (!intel_dvo)
  385. return;
  386. intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
  387. if (!intel_connector) {
  388. kfree(intel_dvo);
  389. return;
  390. }
  391. intel_encoder = &intel_dvo->base;
  392. drm_encoder_init(dev, &intel_encoder->base,
  393. &intel_dvo_enc_funcs, encoder_type);
  394. intel_encoder->disable = intel_disable_dvo;
  395. intel_encoder->enable = intel_enable_dvo;
  396. intel_encoder->get_hw_state = intel_dvo_get_hw_state;
  397. intel_encoder->get_config = intel_dvo_get_config;
  398. intel_encoder->compute_config = intel_dvo_compute_config;
  399. intel_encoder->mode_set = intel_dvo_mode_set;
  400. intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
  401. /* Now, try to find a controller */
  402. for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
  403. struct drm_connector *connector = &intel_connector->base;
  404. const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
  405. struct i2c_adapter *i2c;
  406. int gpio;
  407. bool dvoinit;
  408. /* Allow the I2C driver info to specify the GPIO to be used in
  409. * special cases, but otherwise default to what's defined
  410. * in the spec.
  411. */
  412. if (intel_gmbus_is_port_valid(dvo->gpio))
  413. gpio = dvo->gpio;
  414. else if (dvo->type == INTEL_DVO_CHIP_LVDS)
  415. gpio = GMBUS_PORT_SSC;
  416. else
  417. gpio = GMBUS_PORT_DPB;
  418. /* Set up the I2C bus necessary for the chip we're probing.
  419. * It appears that everything is on GPIOE except for panels
  420. * on i830 laptops, which are on GPIOB (DVOA).
  421. */
  422. i2c = intel_gmbus_get_adapter(dev_priv, gpio);
  423. intel_dvo->dev = *dvo;
  424. /* GMBUS NAK handling seems to be unstable, hence let the
  425. * transmitter detection run in bit banging mode for now.
  426. */
  427. intel_gmbus_force_bit(i2c, true);
  428. dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
  429. intel_gmbus_force_bit(i2c, false);
  430. if (!dvoinit)
  431. continue;
  432. intel_encoder->type = INTEL_OUTPUT_DVO;
  433. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  434. switch (dvo->type) {
  435. case INTEL_DVO_CHIP_TMDS:
  436. intel_encoder->cloneable = true;
  437. drm_connector_init(dev, connector,
  438. &intel_dvo_connector_funcs,
  439. DRM_MODE_CONNECTOR_DVII);
  440. encoder_type = DRM_MODE_ENCODER_TMDS;
  441. break;
  442. case INTEL_DVO_CHIP_LVDS:
  443. intel_encoder->cloneable = false;
  444. drm_connector_init(dev, connector,
  445. &intel_dvo_connector_funcs,
  446. DRM_MODE_CONNECTOR_LVDS);
  447. encoder_type = DRM_MODE_ENCODER_LVDS;
  448. break;
  449. }
  450. drm_connector_helper_add(connector,
  451. &intel_dvo_connector_helper_funcs);
  452. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  453. connector->interlace_allowed = false;
  454. connector->doublescan_allowed = false;
  455. intel_connector_attach_encoder(intel_connector, intel_encoder);
  456. if (dvo->type == INTEL_DVO_CHIP_LVDS) {
  457. /* For our LVDS chipsets, we should hopefully be able
  458. * to dig the fixed panel mode out of the BIOS data.
  459. * However, it's in a different format from the BIOS
  460. * data on chipsets with integrated LVDS (stored in AIM
  461. * headers, likely), so for now, just get the current
  462. * mode being output through DVO.
  463. */
  464. intel_dvo->panel_fixed_mode =
  465. intel_dvo_get_current_mode(connector);
  466. intel_dvo->panel_wants_dither = true;
  467. }
  468. drm_sysfs_connector_add(connector);
  469. return;
  470. }
  471. drm_encoder_cleanup(&intel_encoder->base);
  472. kfree(intel_dvo);
  473. kfree(intel_connector);
  474. }