cdv_intel_crt.c 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324
  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/i2c.h>
  27. #include <drm/drmP.h>
  28. #include "intel_bios.h"
  29. #include "psb_drv.h"
  30. #include "psb_intel_drv.h"
  31. #include "psb_intel_reg.h"
  32. #include "power.h"
  33. #include "cdv_device.h"
  34. #include <linux/pm_runtime.h>
  35. static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
  36. {
  37. struct drm_device *dev = encoder->dev;
  38. u32 temp, reg;
  39. reg = ADPA;
  40. temp = REG_READ(reg);
  41. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  42. temp &= ~ADPA_DAC_ENABLE;
  43. switch (mode) {
  44. case DRM_MODE_DPMS_ON:
  45. temp |= ADPA_DAC_ENABLE;
  46. break;
  47. case DRM_MODE_DPMS_STANDBY:
  48. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  49. break;
  50. case DRM_MODE_DPMS_SUSPEND:
  51. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  52. break;
  53. case DRM_MODE_DPMS_OFF:
  54. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  55. break;
  56. }
  57. REG_WRITE(reg, temp);
  58. }
  59. static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
  60. struct drm_display_mode *mode)
  61. {
  62. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  63. return MODE_NO_DBLESCAN;
  64. /* The lowest clock for CDV is 20000KHz */
  65. if (mode->clock < 20000)
  66. return MODE_CLOCK_LOW;
  67. /* The max clock for CDV is 355 instead of 400 */
  68. if (mode->clock > 355000)
  69. return MODE_CLOCK_HIGH;
  70. return MODE_OK;
  71. }
  72. static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder,
  73. const struct drm_display_mode *mode,
  74. struct drm_display_mode *adjusted_mode)
  75. {
  76. return true;
  77. }
  78. static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
  79. struct drm_display_mode *mode,
  80. struct drm_display_mode *adjusted_mode)
  81. {
  82. struct drm_device *dev = encoder->dev;
  83. struct drm_crtc *crtc = encoder->crtc;
  84. struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
  85. int dpll_md_reg;
  86. u32 adpa, dpll_md;
  87. u32 adpa_reg;
  88. if (gma_crtc->pipe == 0)
  89. dpll_md_reg = DPLL_A_MD;
  90. else
  91. dpll_md_reg = DPLL_B_MD;
  92. adpa_reg = ADPA;
  93. /*
  94. * Disable separate mode multiplier used when cloning SDVO to CRT
  95. * XXX this needs to be adjusted when we really are cloning
  96. */
  97. {
  98. dpll_md = REG_READ(dpll_md_reg);
  99. REG_WRITE(dpll_md_reg,
  100. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  101. }
  102. adpa = 0;
  103. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  104. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  105. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  106. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  107. if (gma_crtc->pipe == 0)
  108. adpa |= ADPA_PIPE_A_SELECT;
  109. else
  110. adpa |= ADPA_PIPE_B_SELECT;
  111. REG_WRITE(adpa_reg, adpa);
  112. }
  113. /**
  114. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  115. *
  116. * \return true if CRT is connected.
  117. * \return false if CRT is disconnected.
  118. */
  119. static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
  120. bool force)
  121. {
  122. struct drm_device *dev = connector->dev;
  123. u32 hotplug_en;
  124. int i, tries = 0, ret = false;
  125. u32 orig;
  126. /*
  127. * On a CDV thep, CRT detect sequence need to be done twice
  128. * to get a reliable result.
  129. */
  130. tries = 2;
  131. orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
  132. hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
  133. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  134. hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
  135. hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
  136. for (i = 0; i < tries ; i++) {
  137. unsigned long timeout;
  138. /* turn on the FORCE_DETECT */
  139. REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  140. timeout = jiffies + msecs_to_jiffies(1000);
  141. /* wait for FORCE_DETECT to go off */
  142. do {
  143. if (!(REG_READ(PORT_HOTPLUG_EN) &
  144. CRT_HOTPLUG_FORCE_DETECT))
  145. break;
  146. msleep(1);
  147. } while (time_after(timeout, jiffies));
  148. }
  149. if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
  150. CRT_HOTPLUG_MONITOR_NONE)
  151. ret = true;
  152. /* clear the interrupt we just generated, if any */
  153. REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
  154. /* and put the bits back */
  155. REG_WRITE(PORT_HOTPLUG_EN, orig);
  156. return ret;
  157. }
  158. static enum drm_connector_status cdv_intel_crt_detect(
  159. struct drm_connector *connector, bool force)
  160. {
  161. if (cdv_intel_crt_detect_hotplug(connector, force))
  162. return connector_status_connected;
  163. else
  164. return connector_status_disconnected;
  165. }
  166. static void cdv_intel_crt_destroy(struct drm_connector *connector)
  167. {
  168. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  169. psb_intel_i2c_destroy(gma_encoder->ddc_bus);
  170. drm_sysfs_connector_remove(connector);
  171. drm_connector_cleanup(connector);
  172. kfree(connector);
  173. }
  174. static int cdv_intel_crt_get_modes(struct drm_connector *connector)
  175. {
  176. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  177. return psb_intel_ddc_get_modes(connector,
  178. &gma_encoder->ddc_bus->adapter);
  179. }
  180. static int cdv_intel_crt_set_property(struct drm_connector *connector,
  181. struct drm_property *property,
  182. uint64_t value)
  183. {
  184. return 0;
  185. }
  186. /*
  187. * Routines for controlling stuff on the analog port
  188. */
  189. static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
  190. .dpms = cdv_intel_crt_dpms,
  191. .mode_fixup = cdv_intel_crt_mode_fixup,
  192. .prepare = gma_encoder_prepare,
  193. .commit = gma_encoder_commit,
  194. .mode_set = cdv_intel_crt_mode_set,
  195. };
  196. static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
  197. .dpms = drm_helper_connector_dpms,
  198. .detect = cdv_intel_crt_detect,
  199. .fill_modes = drm_helper_probe_single_connector_modes,
  200. .destroy = cdv_intel_crt_destroy,
  201. .set_property = cdv_intel_crt_set_property,
  202. };
  203. static const struct drm_connector_helper_funcs
  204. cdv_intel_crt_connector_helper_funcs = {
  205. .mode_valid = cdv_intel_crt_mode_valid,
  206. .get_modes = cdv_intel_crt_get_modes,
  207. .best_encoder = gma_best_encoder,
  208. };
  209. static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
  210. {
  211. drm_encoder_cleanup(encoder);
  212. }
  213. static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
  214. .destroy = cdv_intel_crt_enc_destroy,
  215. };
  216. void cdv_intel_crt_init(struct drm_device *dev,
  217. struct psb_intel_mode_device *mode_dev)
  218. {
  219. struct gma_connector *gma_connector;
  220. struct gma_encoder *gma_encoder;
  221. struct drm_connector *connector;
  222. struct drm_encoder *encoder;
  223. u32 i2c_reg;
  224. gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
  225. if (!gma_encoder)
  226. return;
  227. gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
  228. if (!gma_connector)
  229. goto failed_connector;
  230. connector = &gma_connector->base;
  231. connector->polled = DRM_CONNECTOR_POLL_HPD;
  232. drm_connector_init(dev, connector,
  233. &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  234. encoder = &gma_encoder->base;
  235. drm_encoder_init(dev, encoder,
  236. &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
  237. gma_connector_attach_encoder(gma_connector, gma_encoder);
  238. /* Set up the DDC bus. */
  239. i2c_reg = GPIOA;
  240. /* Remove the following code for CDV */
  241. /*
  242. if (dev_priv->crt_ddc_bus != 0)
  243. i2c_reg = dev_priv->crt_ddc_bus;
  244. }*/
  245. gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
  246. i2c_reg, "CRTDDC_A");
  247. if (!gma_encoder->ddc_bus) {
  248. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  249. "failed.\n");
  250. goto failed_ddc;
  251. }
  252. gma_encoder->type = INTEL_OUTPUT_ANALOG;
  253. /*
  254. psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
  255. psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
  256. */
  257. connector->interlace_allowed = 0;
  258. connector->doublescan_allowed = 0;
  259. drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
  260. drm_connector_helper_add(connector,
  261. &cdv_intel_crt_connector_helper_funcs);
  262. drm_sysfs_connector_add(connector);
  263. return;
  264. failed_ddc:
  265. drm_encoder_cleanup(&gma_encoder->base);
  266. drm_connector_cleanup(&gma_connector->base);
  267. kfree(gma_connector);
  268. failed_connector:
  269. kfree(gma_encoder);
  270. return;
  271. }