exynos_drm_ipp.c 47 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986
  1. /*
  2. * Copyright (C) 2012 Samsung Electronics Co.Ltd
  3. * Authors:
  4. * Eunchul Kim <chulspro.kim@samsung.com>
  5. * Jinyoung Jeon <jy0.jeon@samsung.com>
  6. * Sangmin Lee <lsmin.lee@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/types.h>
  17. #include <linux/clk.h>
  18. #include <linux/pm_runtime.h>
  19. #include <plat/map-base.h>
  20. #include <drm/drmP.h>
  21. #include <drm/exynos_drm.h>
  22. #include "exynos_drm_drv.h"
  23. #include "exynos_drm_gem.h"
  24. #include "exynos_drm_ipp.h"
  25. #include "exynos_drm_iommu.h"
  26. /*
  27. * IPP stands for Image Post Processing and
  28. * supports image scaler/rotator and input/output DMA operations.
  29. * using FIMC, GSC, Rotator, so on.
  30. * IPP is integration device driver of same attribute h/w
  31. */
  32. /*
  33. * TODO
  34. * 1. expand command control id.
  35. * 2. integrate property and config.
  36. * 3. removed send_event id check routine.
  37. * 4. compare send_event id if needed.
  38. * 5. free subdrv_remove notifier callback list if needed.
  39. * 6. need to check subdrv_open about multi-open.
  40. * 7. need to power_on implement power and sysmmu ctrl.
  41. */
  42. #define get_ipp_context(dev) platform_get_drvdata(to_platform_device(dev))
  43. #define ipp_is_m2m_cmd(c) (c == IPP_CMD_M2M)
  44. /* platform device pointer for ipp device. */
  45. static struct platform_device *exynos_drm_ipp_pdev;
  46. /*
  47. * A structure of event.
  48. *
  49. * @base: base of event.
  50. * @event: ipp event.
  51. */
  52. struct drm_exynos_ipp_send_event {
  53. struct drm_pending_event base;
  54. struct drm_exynos_ipp_event event;
  55. };
  56. /*
  57. * A structure of memory node.
  58. *
  59. * @list: list head to memory queue information.
  60. * @ops_id: id of operations.
  61. * @prop_id: id of property.
  62. * @buf_id: id of buffer.
  63. * @buf_info: gem objects and dma address, size.
  64. * @filp: a pointer to drm_file.
  65. */
  66. struct drm_exynos_ipp_mem_node {
  67. struct list_head list;
  68. enum drm_exynos_ops_id ops_id;
  69. u32 prop_id;
  70. u32 buf_id;
  71. struct drm_exynos_ipp_buf_info buf_info;
  72. struct drm_file *filp;
  73. };
  74. /*
  75. * A structure of ipp context.
  76. *
  77. * @subdrv: prepare initialization using subdrv.
  78. * @ipp_lock: lock for synchronization of access to ipp_idr.
  79. * @prop_lock: lock for synchronization of access to prop_idr.
  80. * @ipp_idr: ipp driver idr.
  81. * @prop_idr: property idr.
  82. * @event_workq: event work queue.
  83. * @cmd_workq: command work queue.
  84. */
  85. struct ipp_context {
  86. struct exynos_drm_subdrv subdrv;
  87. struct mutex ipp_lock;
  88. struct mutex prop_lock;
  89. struct idr ipp_idr;
  90. struct idr prop_idr;
  91. struct workqueue_struct *event_workq;
  92. struct workqueue_struct *cmd_workq;
  93. };
  94. static LIST_HEAD(exynos_drm_ippdrv_list);
  95. static DEFINE_MUTEX(exynos_drm_ippdrv_lock);
  96. static BLOCKING_NOTIFIER_HEAD(exynos_drm_ippnb_list);
  97. int exynos_platform_device_ipp_register(void)
  98. {
  99. struct platform_device *pdev;
  100. if (exynos_drm_ipp_pdev)
  101. return -EEXIST;
  102. pdev = platform_device_register_simple("exynos-drm-ipp", -1, NULL, 0);
  103. if (IS_ERR(pdev))
  104. return PTR_ERR(pdev);
  105. exynos_drm_ipp_pdev = pdev;
  106. return 0;
  107. }
  108. void exynos_platform_device_ipp_unregister(void)
  109. {
  110. if (exynos_drm_ipp_pdev) {
  111. platform_device_unregister(exynos_drm_ipp_pdev);
  112. exynos_drm_ipp_pdev = NULL;
  113. }
  114. }
  115. int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv)
  116. {
  117. if (!ippdrv)
  118. return -EINVAL;
  119. mutex_lock(&exynos_drm_ippdrv_lock);
  120. list_add_tail(&ippdrv->drv_list, &exynos_drm_ippdrv_list);
  121. mutex_unlock(&exynos_drm_ippdrv_lock);
  122. return 0;
  123. }
  124. int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv)
  125. {
  126. if (!ippdrv)
  127. return -EINVAL;
  128. mutex_lock(&exynos_drm_ippdrv_lock);
  129. list_del(&ippdrv->drv_list);
  130. mutex_unlock(&exynos_drm_ippdrv_lock);
  131. return 0;
  132. }
  133. static int ipp_create_id(struct idr *id_idr, struct mutex *lock, void *obj,
  134. u32 *idp)
  135. {
  136. int ret;
  137. /* do the allocation under our mutexlock */
  138. mutex_lock(lock);
  139. ret = idr_alloc(id_idr, obj, 1, 0, GFP_KERNEL);
  140. mutex_unlock(lock);
  141. if (ret < 0)
  142. return ret;
  143. *idp = ret;
  144. return 0;
  145. }
  146. static void *ipp_find_obj(struct idr *id_idr, struct mutex *lock, u32 id)
  147. {
  148. void *obj;
  149. DRM_DEBUG_KMS("id[%d]\n", id);
  150. mutex_lock(lock);
  151. /* find object using handle */
  152. obj = idr_find(id_idr, id);
  153. if (!obj) {
  154. DRM_ERROR("failed to find object.\n");
  155. mutex_unlock(lock);
  156. return ERR_PTR(-ENODEV);
  157. }
  158. mutex_unlock(lock);
  159. return obj;
  160. }
  161. static inline bool ipp_check_dedicated(struct exynos_drm_ippdrv *ippdrv,
  162. enum drm_exynos_ipp_cmd cmd)
  163. {
  164. /*
  165. * check dedicated flag and WB, OUTPUT operation with
  166. * power on state.
  167. */
  168. if (ippdrv->dedicated || (!ipp_is_m2m_cmd(cmd) &&
  169. !pm_runtime_suspended(ippdrv->dev)))
  170. return true;
  171. return false;
  172. }
  173. static struct exynos_drm_ippdrv *ipp_find_driver(struct ipp_context *ctx,
  174. struct drm_exynos_ipp_property *property)
  175. {
  176. struct exynos_drm_ippdrv *ippdrv;
  177. u32 ipp_id = property->ipp_id;
  178. DRM_DEBUG_KMS("ipp_id[%d]\n", ipp_id);
  179. if (ipp_id) {
  180. /* find ipp driver using idr */
  181. ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock,
  182. ipp_id);
  183. if (IS_ERR(ippdrv)) {
  184. DRM_ERROR("not found ipp%d driver.\n", ipp_id);
  185. return ippdrv;
  186. }
  187. /*
  188. * WB, OUTPUT opertion not supported multi-operation.
  189. * so, make dedicated state at set property ioctl.
  190. * when ipp driver finished operations, clear dedicated flags.
  191. */
  192. if (ipp_check_dedicated(ippdrv, property->cmd)) {
  193. DRM_ERROR("already used choose device.\n");
  194. return ERR_PTR(-EBUSY);
  195. }
  196. /*
  197. * This is necessary to find correct device in ipp drivers.
  198. * ipp drivers have different abilities,
  199. * so need to check property.
  200. */
  201. if (ippdrv->check_property &&
  202. ippdrv->check_property(ippdrv->dev, property)) {
  203. DRM_ERROR("not support property.\n");
  204. return ERR_PTR(-EINVAL);
  205. }
  206. return ippdrv;
  207. } else {
  208. /*
  209. * This case is search all ipp driver for finding.
  210. * user application don't set ipp_id in this case,
  211. * so ipp subsystem search correct driver in driver list.
  212. */
  213. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  214. if (ipp_check_dedicated(ippdrv, property->cmd)) {
  215. DRM_DEBUG_KMS("used device.\n");
  216. continue;
  217. }
  218. if (ippdrv->check_property &&
  219. ippdrv->check_property(ippdrv->dev, property)) {
  220. DRM_DEBUG_KMS("not support property.\n");
  221. continue;
  222. }
  223. return ippdrv;
  224. }
  225. DRM_ERROR("not support ipp driver operations.\n");
  226. }
  227. return ERR_PTR(-ENODEV);
  228. }
  229. static struct exynos_drm_ippdrv *ipp_find_drv_by_handle(u32 prop_id)
  230. {
  231. struct exynos_drm_ippdrv *ippdrv;
  232. struct drm_exynos_ipp_cmd_node *c_node;
  233. int count = 0;
  234. DRM_DEBUG_KMS("prop_id[%d]\n", prop_id);
  235. if (list_empty(&exynos_drm_ippdrv_list)) {
  236. DRM_DEBUG_KMS("ippdrv_list is empty.\n");
  237. return ERR_PTR(-ENODEV);
  238. }
  239. /*
  240. * This case is search ipp driver by prop_id handle.
  241. * sometimes, ipp subsystem find driver by prop_id.
  242. * e.g PAUSE state, queue buf, command contro.
  243. */
  244. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  245. DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]\n", count++, (int)ippdrv);
  246. if (!list_empty(&ippdrv->cmd_list)) {
  247. list_for_each_entry(c_node, &ippdrv->cmd_list, list)
  248. if (c_node->property.prop_id == prop_id)
  249. return ippdrv;
  250. }
  251. }
  252. return ERR_PTR(-ENODEV);
  253. }
  254. int exynos_drm_ipp_get_property(struct drm_device *drm_dev, void *data,
  255. struct drm_file *file)
  256. {
  257. struct drm_exynos_file_private *file_priv = file->driver_priv;
  258. struct exynos_drm_ipp_private *priv = file_priv->ipp_priv;
  259. struct device *dev = priv->dev;
  260. struct ipp_context *ctx = get_ipp_context(dev);
  261. struct drm_exynos_ipp_prop_list *prop_list = data;
  262. struct exynos_drm_ippdrv *ippdrv;
  263. int count = 0;
  264. if (!ctx) {
  265. DRM_ERROR("invalid context.\n");
  266. return -EINVAL;
  267. }
  268. if (!prop_list) {
  269. DRM_ERROR("invalid property parameter.\n");
  270. return -EINVAL;
  271. }
  272. DRM_DEBUG_KMS("ipp_id[%d]\n", prop_list->ipp_id);
  273. if (!prop_list->ipp_id) {
  274. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list)
  275. count++;
  276. /*
  277. * Supports ippdrv list count for user application.
  278. * First step user application getting ippdrv count.
  279. * and second step getting ippdrv capability using ipp_id.
  280. */
  281. prop_list->count = count;
  282. } else {
  283. /*
  284. * Getting ippdrv capability by ipp_id.
  285. * some deivce not supported wb, output interface.
  286. * so, user application detect correct ipp driver
  287. * using this ioctl.
  288. */
  289. ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock,
  290. prop_list->ipp_id);
  291. if (IS_ERR(ippdrv)) {
  292. DRM_ERROR("not found ipp%d driver.\n",
  293. prop_list->ipp_id);
  294. return PTR_ERR(ippdrv);
  295. }
  296. prop_list = ippdrv->prop_list;
  297. }
  298. return 0;
  299. }
  300. static void ipp_print_property(struct drm_exynos_ipp_property *property,
  301. int idx)
  302. {
  303. struct drm_exynos_ipp_config *config = &property->config[idx];
  304. struct drm_exynos_pos *pos = &config->pos;
  305. struct drm_exynos_sz *sz = &config->sz;
  306. DRM_DEBUG_KMS("prop_id[%d]ops[%s]fmt[0x%x]\n",
  307. property->prop_id, idx ? "dst" : "src", config->fmt);
  308. DRM_DEBUG_KMS("pos[%d %d %d %d]sz[%d %d]f[%d]r[%d]\n",
  309. pos->x, pos->y, pos->w, pos->h,
  310. sz->hsize, sz->vsize, config->flip, config->degree);
  311. }
  312. static int ipp_find_and_set_property(struct drm_exynos_ipp_property *property)
  313. {
  314. struct exynos_drm_ippdrv *ippdrv;
  315. struct drm_exynos_ipp_cmd_node *c_node;
  316. u32 prop_id = property->prop_id;
  317. DRM_DEBUG_KMS("prop_id[%d]\n", prop_id);
  318. ippdrv = ipp_find_drv_by_handle(prop_id);
  319. if (IS_ERR(ippdrv)) {
  320. DRM_ERROR("failed to get ipp driver.\n");
  321. return -EINVAL;
  322. }
  323. /*
  324. * Find command node using command list in ippdrv.
  325. * when we find this command no using prop_id.
  326. * return property information set in this command node.
  327. */
  328. list_for_each_entry(c_node, &ippdrv->cmd_list, list) {
  329. if ((c_node->property.prop_id == prop_id) &&
  330. (c_node->state == IPP_STATE_STOP)) {
  331. DRM_DEBUG_KMS("found cmd[%d]ippdrv[0x%x]\n",
  332. property->cmd, (int)ippdrv);
  333. c_node->property = *property;
  334. return 0;
  335. }
  336. }
  337. DRM_ERROR("failed to search property.\n");
  338. return -EINVAL;
  339. }
  340. static struct drm_exynos_ipp_cmd_work *ipp_create_cmd_work(void)
  341. {
  342. struct drm_exynos_ipp_cmd_work *cmd_work;
  343. cmd_work = kzalloc(sizeof(*cmd_work), GFP_KERNEL);
  344. if (!cmd_work)
  345. return ERR_PTR(-ENOMEM);
  346. INIT_WORK((struct work_struct *)cmd_work, ipp_sched_cmd);
  347. return cmd_work;
  348. }
  349. static struct drm_exynos_ipp_event_work *ipp_create_event_work(void)
  350. {
  351. struct drm_exynos_ipp_event_work *event_work;
  352. event_work = kzalloc(sizeof(*event_work), GFP_KERNEL);
  353. if (!event_work)
  354. return ERR_PTR(-ENOMEM);
  355. INIT_WORK((struct work_struct *)event_work, ipp_sched_event);
  356. return event_work;
  357. }
  358. int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data,
  359. struct drm_file *file)
  360. {
  361. struct drm_exynos_file_private *file_priv = file->driver_priv;
  362. struct exynos_drm_ipp_private *priv = file_priv->ipp_priv;
  363. struct device *dev = priv->dev;
  364. struct ipp_context *ctx = get_ipp_context(dev);
  365. struct drm_exynos_ipp_property *property = data;
  366. struct exynos_drm_ippdrv *ippdrv;
  367. struct drm_exynos_ipp_cmd_node *c_node;
  368. int ret, i;
  369. if (!ctx) {
  370. DRM_ERROR("invalid context.\n");
  371. return -EINVAL;
  372. }
  373. if (!property) {
  374. DRM_ERROR("invalid property parameter.\n");
  375. return -EINVAL;
  376. }
  377. /*
  378. * This is log print for user application property.
  379. * user application set various property.
  380. */
  381. for_each_ipp_ops(i)
  382. ipp_print_property(property, i);
  383. /*
  384. * set property ioctl generated new prop_id.
  385. * but in this case already asigned prop_id using old set property.
  386. * e.g PAUSE state. this case supports find current prop_id and use it
  387. * instead of allocation.
  388. */
  389. if (property->prop_id) {
  390. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  391. return ipp_find_and_set_property(property);
  392. }
  393. /* find ipp driver using ipp id */
  394. ippdrv = ipp_find_driver(ctx, property);
  395. if (IS_ERR(ippdrv)) {
  396. DRM_ERROR("failed to get ipp driver.\n");
  397. return -EINVAL;
  398. }
  399. /* allocate command node */
  400. c_node = kzalloc(sizeof(*c_node), GFP_KERNEL);
  401. if (!c_node)
  402. return -ENOMEM;
  403. /* create property id */
  404. ret = ipp_create_id(&ctx->prop_idr, &ctx->prop_lock, c_node,
  405. &property->prop_id);
  406. if (ret) {
  407. DRM_ERROR("failed to create id.\n");
  408. goto err_clear;
  409. }
  410. DRM_DEBUG_KMS("created prop_id[%d]cmd[%d]ippdrv[0x%x]\n",
  411. property->prop_id, property->cmd, (int)ippdrv);
  412. /* stored property information and ippdrv in private data */
  413. c_node->priv = priv;
  414. c_node->property = *property;
  415. c_node->state = IPP_STATE_IDLE;
  416. c_node->start_work = ipp_create_cmd_work();
  417. if (IS_ERR(c_node->start_work)) {
  418. DRM_ERROR("failed to create start work.\n");
  419. goto err_clear;
  420. }
  421. c_node->stop_work = ipp_create_cmd_work();
  422. if (IS_ERR(c_node->stop_work)) {
  423. DRM_ERROR("failed to create stop work.\n");
  424. goto err_free_start;
  425. }
  426. c_node->event_work = ipp_create_event_work();
  427. if (IS_ERR(c_node->event_work)) {
  428. DRM_ERROR("failed to create event work.\n");
  429. goto err_free_stop;
  430. }
  431. mutex_init(&c_node->cmd_lock);
  432. mutex_init(&c_node->mem_lock);
  433. mutex_init(&c_node->event_lock);
  434. init_completion(&c_node->start_complete);
  435. init_completion(&c_node->stop_complete);
  436. for_each_ipp_ops(i)
  437. INIT_LIST_HEAD(&c_node->mem_list[i]);
  438. INIT_LIST_HEAD(&c_node->event_list);
  439. list_splice_init(&priv->event_list, &c_node->event_list);
  440. list_add_tail(&c_node->list, &ippdrv->cmd_list);
  441. /* make dedicated state without m2m */
  442. if (!ipp_is_m2m_cmd(property->cmd))
  443. ippdrv->dedicated = true;
  444. return 0;
  445. err_free_stop:
  446. kfree(c_node->stop_work);
  447. err_free_start:
  448. kfree(c_node->start_work);
  449. err_clear:
  450. kfree(c_node);
  451. return ret;
  452. }
  453. static void ipp_clean_cmd_node(struct drm_exynos_ipp_cmd_node *c_node)
  454. {
  455. /* delete list */
  456. list_del(&c_node->list);
  457. /* destroy mutex */
  458. mutex_destroy(&c_node->cmd_lock);
  459. mutex_destroy(&c_node->mem_lock);
  460. mutex_destroy(&c_node->event_lock);
  461. /* free command node */
  462. kfree(c_node->start_work);
  463. kfree(c_node->stop_work);
  464. kfree(c_node->event_work);
  465. kfree(c_node);
  466. }
  467. static int ipp_check_mem_list(struct drm_exynos_ipp_cmd_node *c_node)
  468. {
  469. struct drm_exynos_ipp_property *property = &c_node->property;
  470. struct drm_exynos_ipp_mem_node *m_node;
  471. struct list_head *head;
  472. int ret, i, count[EXYNOS_DRM_OPS_MAX] = { 0, };
  473. mutex_lock(&c_node->mem_lock);
  474. for_each_ipp_ops(i) {
  475. /* source/destination memory list */
  476. head = &c_node->mem_list[i];
  477. if (list_empty(head)) {
  478. DRM_DEBUG_KMS("%s memory empty.\n", i ? "dst" : "src");
  479. continue;
  480. }
  481. /* find memory node entry */
  482. list_for_each_entry(m_node, head, list) {
  483. DRM_DEBUG_KMS("%s,count[%d]m_node[0x%x]\n",
  484. i ? "dst" : "src", count[i], (int)m_node);
  485. count[i]++;
  486. }
  487. }
  488. DRM_DEBUG_KMS("min[%d]max[%d]\n",
  489. min(count[EXYNOS_DRM_OPS_SRC], count[EXYNOS_DRM_OPS_DST]),
  490. max(count[EXYNOS_DRM_OPS_SRC], count[EXYNOS_DRM_OPS_DST]));
  491. /*
  492. * M2M operations should be need paired memory address.
  493. * so, need to check minimum count about src, dst.
  494. * other case not use paired memory, so use maximum count
  495. */
  496. if (ipp_is_m2m_cmd(property->cmd))
  497. ret = min(count[EXYNOS_DRM_OPS_SRC],
  498. count[EXYNOS_DRM_OPS_DST]);
  499. else
  500. ret = max(count[EXYNOS_DRM_OPS_SRC],
  501. count[EXYNOS_DRM_OPS_DST]);
  502. mutex_unlock(&c_node->mem_lock);
  503. return ret;
  504. }
  505. static struct drm_exynos_ipp_mem_node
  506. *ipp_find_mem_node(struct drm_exynos_ipp_cmd_node *c_node,
  507. struct drm_exynos_ipp_queue_buf *qbuf)
  508. {
  509. struct drm_exynos_ipp_mem_node *m_node;
  510. struct list_head *head;
  511. int count = 0;
  512. DRM_DEBUG_KMS("buf_id[%d]\n", qbuf->buf_id);
  513. /* source/destination memory list */
  514. head = &c_node->mem_list[qbuf->ops_id];
  515. /* find memory node from memory list */
  516. list_for_each_entry(m_node, head, list) {
  517. DRM_DEBUG_KMS("count[%d]m_node[0x%x]\n", count++, (int)m_node);
  518. /* compare buffer id */
  519. if (m_node->buf_id == qbuf->buf_id)
  520. return m_node;
  521. }
  522. return NULL;
  523. }
  524. static int ipp_set_mem_node(struct exynos_drm_ippdrv *ippdrv,
  525. struct drm_exynos_ipp_cmd_node *c_node,
  526. struct drm_exynos_ipp_mem_node *m_node)
  527. {
  528. struct exynos_drm_ipp_ops *ops = NULL;
  529. int ret = 0;
  530. DRM_DEBUG_KMS("node[0x%x]\n", (int)m_node);
  531. if (!m_node) {
  532. DRM_ERROR("invalid queue node.\n");
  533. return -EFAULT;
  534. }
  535. mutex_lock(&c_node->mem_lock);
  536. DRM_DEBUG_KMS("ops_id[%d]\n", m_node->ops_id);
  537. /* get operations callback */
  538. ops = ippdrv->ops[m_node->ops_id];
  539. if (!ops) {
  540. DRM_ERROR("not support ops.\n");
  541. ret = -EFAULT;
  542. goto err_unlock;
  543. }
  544. /* set address and enable irq */
  545. if (ops->set_addr) {
  546. ret = ops->set_addr(ippdrv->dev, &m_node->buf_info,
  547. m_node->buf_id, IPP_BUF_ENQUEUE);
  548. if (ret) {
  549. DRM_ERROR("failed to set addr.\n");
  550. goto err_unlock;
  551. }
  552. }
  553. err_unlock:
  554. mutex_unlock(&c_node->mem_lock);
  555. return ret;
  556. }
  557. static struct drm_exynos_ipp_mem_node
  558. *ipp_get_mem_node(struct drm_device *drm_dev,
  559. struct drm_file *file,
  560. struct drm_exynos_ipp_cmd_node *c_node,
  561. struct drm_exynos_ipp_queue_buf *qbuf)
  562. {
  563. struct drm_exynos_ipp_mem_node *m_node;
  564. struct drm_exynos_ipp_buf_info buf_info;
  565. void *addr;
  566. int i;
  567. mutex_lock(&c_node->mem_lock);
  568. m_node = kzalloc(sizeof(*m_node), GFP_KERNEL);
  569. if (!m_node)
  570. goto err_unlock;
  571. /* clear base address for error handling */
  572. memset(&buf_info, 0x0, sizeof(buf_info));
  573. /* operations, buffer id */
  574. m_node->ops_id = qbuf->ops_id;
  575. m_node->prop_id = qbuf->prop_id;
  576. m_node->buf_id = qbuf->buf_id;
  577. DRM_DEBUG_KMS("m_node[0x%x]ops_id[%d]\n", (int)m_node, qbuf->ops_id);
  578. DRM_DEBUG_KMS("prop_id[%d]buf_id[%d]\n", qbuf->prop_id, m_node->buf_id);
  579. for_each_ipp_planar(i) {
  580. DRM_DEBUG_KMS("i[%d]handle[0x%x]\n", i, qbuf->handle[i]);
  581. /* get dma address by handle */
  582. if (qbuf->handle[i]) {
  583. addr = exynos_drm_gem_get_dma_addr(drm_dev,
  584. qbuf->handle[i], file);
  585. if (IS_ERR(addr)) {
  586. DRM_ERROR("failed to get addr.\n");
  587. goto err_clear;
  588. }
  589. buf_info.handles[i] = qbuf->handle[i];
  590. buf_info.base[i] = *(dma_addr_t *) addr;
  591. DRM_DEBUG_KMS("i[%d]base[0x%x]hd[0x%x]\n",
  592. i, buf_info.base[i], (int)buf_info.handles[i]);
  593. }
  594. }
  595. m_node->filp = file;
  596. m_node->buf_info = buf_info;
  597. list_add_tail(&m_node->list, &c_node->mem_list[qbuf->ops_id]);
  598. mutex_unlock(&c_node->mem_lock);
  599. return m_node;
  600. err_clear:
  601. kfree(m_node);
  602. err_unlock:
  603. mutex_unlock(&c_node->mem_lock);
  604. return ERR_PTR(-EFAULT);
  605. }
  606. static int ipp_put_mem_node(struct drm_device *drm_dev,
  607. struct drm_exynos_ipp_cmd_node *c_node,
  608. struct drm_exynos_ipp_mem_node *m_node)
  609. {
  610. int i;
  611. DRM_DEBUG_KMS("node[0x%x]\n", (int)m_node);
  612. if (!m_node) {
  613. DRM_ERROR("invalid dequeue node.\n");
  614. return -EFAULT;
  615. }
  616. if (list_empty(&m_node->list)) {
  617. DRM_ERROR("empty memory node.\n");
  618. return -ENOMEM;
  619. }
  620. mutex_lock(&c_node->mem_lock);
  621. DRM_DEBUG_KMS("ops_id[%d]\n", m_node->ops_id);
  622. /* put gem buffer */
  623. for_each_ipp_planar(i) {
  624. unsigned long handle = m_node->buf_info.handles[i];
  625. if (handle)
  626. exynos_drm_gem_put_dma_addr(drm_dev, handle,
  627. m_node->filp);
  628. }
  629. /* delete list in queue */
  630. list_del(&m_node->list);
  631. kfree(m_node);
  632. mutex_unlock(&c_node->mem_lock);
  633. return 0;
  634. }
  635. static void ipp_free_event(struct drm_pending_event *event)
  636. {
  637. kfree(event);
  638. }
  639. static int ipp_get_event(struct drm_device *drm_dev,
  640. struct drm_file *file,
  641. struct drm_exynos_ipp_cmd_node *c_node,
  642. struct drm_exynos_ipp_queue_buf *qbuf)
  643. {
  644. struct drm_exynos_ipp_send_event *e;
  645. unsigned long flags;
  646. DRM_DEBUG_KMS("ops_id[%d]buf_id[%d]\n", qbuf->ops_id, qbuf->buf_id);
  647. e = kzalloc(sizeof(*e), GFP_KERNEL);
  648. if (!e) {
  649. spin_lock_irqsave(&drm_dev->event_lock, flags);
  650. file->event_space += sizeof(e->event);
  651. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  652. return -ENOMEM;
  653. }
  654. /* make event */
  655. e->event.base.type = DRM_EXYNOS_IPP_EVENT;
  656. e->event.base.length = sizeof(e->event);
  657. e->event.user_data = qbuf->user_data;
  658. e->event.prop_id = qbuf->prop_id;
  659. e->event.buf_id[EXYNOS_DRM_OPS_DST] = qbuf->buf_id;
  660. e->base.event = &e->event.base;
  661. e->base.file_priv = file;
  662. e->base.destroy = ipp_free_event;
  663. list_add_tail(&e->base.link, &c_node->event_list);
  664. return 0;
  665. }
  666. static void ipp_put_event(struct drm_exynos_ipp_cmd_node *c_node,
  667. struct drm_exynos_ipp_queue_buf *qbuf)
  668. {
  669. struct drm_exynos_ipp_send_event *e, *te;
  670. int count = 0;
  671. if (list_empty(&c_node->event_list)) {
  672. DRM_DEBUG_KMS("event_list is empty.\n");
  673. return;
  674. }
  675. list_for_each_entry_safe(e, te, &c_node->event_list, base.link) {
  676. DRM_DEBUG_KMS("count[%d]e[0x%x]\n", count++, (int)e);
  677. /*
  678. * quf == NULL condition means all event deletion.
  679. * stop operations want to delete all event list.
  680. * another case delete only same buf id.
  681. */
  682. if (!qbuf) {
  683. /* delete list */
  684. list_del(&e->base.link);
  685. kfree(e);
  686. }
  687. /* compare buffer id */
  688. if (qbuf && (qbuf->buf_id ==
  689. e->event.buf_id[EXYNOS_DRM_OPS_DST])) {
  690. /* delete list */
  691. list_del(&e->base.link);
  692. kfree(e);
  693. return;
  694. }
  695. }
  696. }
  697. static void ipp_handle_cmd_work(struct device *dev,
  698. struct exynos_drm_ippdrv *ippdrv,
  699. struct drm_exynos_ipp_cmd_work *cmd_work,
  700. struct drm_exynos_ipp_cmd_node *c_node)
  701. {
  702. struct ipp_context *ctx = get_ipp_context(dev);
  703. cmd_work->ippdrv = ippdrv;
  704. cmd_work->c_node = c_node;
  705. queue_work(ctx->cmd_workq, (struct work_struct *)cmd_work);
  706. }
  707. static int ipp_queue_buf_with_run(struct device *dev,
  708. struct drm_exynos_ipp_cmd_node *c_node,
  709. struct drm_exynos_ipp_mem_node *m_node,
  710. struct drm_exynos_ipp_queue_buf *qbuf)
  711. {
  712. struct exynos_drm_ippdrv *ippdrv;
  713. struct drm_exynos_ipp_property *property;
  714. struct exynos_drm_ipp_ops *ops;
  715. int ret;
  716. ippdrv = ipp_find_drv_by_handle(qbuf->prop_id);
  717. if (IS_ERR(ippdrv)) {
  718. DRM_ERROR("failed to get ipp driver.\n");
  719. return -EFAULT;
  720. }
  721. ops = ippdrv->ops[qbuf->ops_id];
  722. if (!ops) {
  723. DRM_ERROR("failed to get ops.\n");
  724. return -EFAULT;
  725. }
  726. property = &c_node->property;
  727. if (c_node->state != IPP_STATE_START) {
  728. DRM_DEBUG_KMS("bypass for invalid state.\n");
  729. return 0;
  730. }
  731. if (!ipp_check_mem_list(c_node)) {
  732. DRM_DEBUG_KMS("empty memory.\n");
  733. return 0;
  734. }
  735. /*
  736. * If set destination buffer and enabled clock,
  737. * then m2m operations need start operations at queue_buf
  738. */
  739. if (ipp_is_m2m_cmd(property->cmd)) {
  740. struct drm_exynos_ipp_cmd_work *cmd_work = c_node->start_work;
  741. cmd_work->ctrl = IPP_CTRL_PLAY;
  742. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  743. } else {
  744. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  745. if (ret) {
  746. DRM_ERROR("failed to set m node.\n");
  747. return ret;
  748. }
  749. }
  750. return 0;
  751. }
  752. static void ipp_clean_queue_buf(struct drm_device *drm_dev,
  753. struct drm_exynos_ipp_cmd_node *c_node,
  754. struct drm_exynos_ipp_queue_buf *qbuf)
  755. {
  756. struct drm_exynos_ipp_mem_node *m_node, *tm_node;
  757. if (!list_empty(&c_node->mem_list[qbuf->ops_id])) {
  758. /* delete list */
  759. list_for_each_entry_safe(m_node, tm_node,
  760. &c_node->mem_list[qbuf->ops_id], list) {
  761. if (m_node->buf_id == qbuf->buf_id &&
  762. m_node->ops_id == qbuf->ops_id)
  763. ipp_put_mem_node(drm_dev, c_node, m_node);
  764. }
  765. }
  766. }
  767. int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, void *data,
  768. struct drm_file *file)
  769. {
  770. struct drm_exynos_file_private *file_priv = file->driver_priv;
  771. struct exynos_drm_ipp_private *priv = file_priv->ipp_priv;
  772. struct device *dev = priv->dev;
  773. struct ipp_context *ctx = get_ipp_context(dev);
  774. struct drm_exynos_ipp_queue_buf *qbuf = data;
  775. struct drm_exynos_ipp_cmd_node *c_node;
  776. struct drm_exynos_ipp_mem_node *m_node;
  777. int ret;
  778. if (!qbuf) {
  779. DRM_ERROR("invalid buf parameter.\n");
  780. return -EINVAL;
  781. }
  782. if (qbuf->ops_id >= EXYNOS_DRM_OPS_MAX) {
  783. DRM_ERROR("invalid ops parameter.\n");
  784. return -EINVAL;
  785. }
  786. DRM_DEBUG_KMS("prop_id[%d]ops_id[%s]buf_id[%d]buf_type[%d]\n",
  787. qbuf->prop_id, qbuf->ops_id ? "dst" : "src",
  788. qbuf->buf_id, qbuf->buf_type);
  789. /* find command node */
  790. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock,
  791. qbuf->prop_id);
  792. if (IS_ERR(c_node)) {
  793. DRM_ERROR("failed to get command node.\n");
  794. return PTR_ERR(c_node);
  795. }
  796. /* buffer control */
  797. switch (qbuf->buf_type) {
  798. case IPP_BUF_ENQUEUE:
  799. /* get memory node */
  800. m_node = ipp_get_mem_node(drm_dev, file, c_node, qbuf);
  801. if (IS_ERR(m_node)) {
  802. DRM_ERROR("failed to get m_node.\n");
  803. return PTR_ERR(m_node);
  804. }
  805. /*
  806. * first step get event for destination buffer.
  807. * and second step when M2M case run with destination buffer
  808. * if needed.
  809. */
  810. if (qbuf->ops_id == EXYNOS_DRM_OPS_DST) {
  811. /* get event for destination buffer */
  812. ret = ipp_get_event(drm_dev, file, c_node, qbuf);
  813. if (ret) {
  814. DRM_ERROR("failed to get event.\n");
  815. goto err_clean_node;
  816. }
  817. /*
  818. * M2M case run play control for streaming feature.
  819. * other case set address and waiting.
  820. */
  821. ret = ipp_queue_buf_with_run(dev, c_node, m_node, qbuf);
  822. if (ret) {
  823. DRM_ERROR("failed to run command.\n");
  824. goto err_clean_node;
  825. }
  826. }
  827. break;
  828. case IPP_BUF_DEQUEUE:
  829. mutex_lock(&c_node->cmd_lock);
  830. /* put event for destination buffer */
  831. if (qbuf->ops_id == EXYNOS_DRM_OPS_DST)
  832. ipp_put_event(c_node, qbuf);
  833. ipp_clean_queue_buf(drm_dev, c_node, qbuf);
  834. mutex_unlock(&c_node->cmd_lock);
  835. break;
  836. default:
  837. DRM_ERROR("invalid buffer control.\n");
  838. return -EINVAL;
  839. }
  840. return 0;
  841. err_clean_node:
  842. DRM_ERROR("clean memory nodes.\n");
  843. ipp_clean_queue_buf(drm_dev, c_node, qbuf);
  844. return ret;
  845. }
  846. static bool exynos_drm_ipp_check_valid(struct device *dev,
  847. enum drm_exynos_ipp_ctrl ctrl, enum drm_exynos_ipp_state state)
  848. {
  849. if (ctrl != IPP_CTRL_PLAY) {
  850. if (pm_runtime_suspended(dev)) {
  851. DRM_ERROR("pm:runtime_suspended.\n");
  852. goto err_status;
  853. }
  854. }
  855. switch (ctrl) {
  856. case IPP_CTRL_PLAY:
  857. if (state != IPP_STATE_IDLE)
  858. goto err_status;
  859. break;
  860. case IPP_CTRL_STOP:
  861. if (state == IPP_STATE_STOP)
  862. goto err_status;
  863. break;
  864. case IPP_CTRL_PAUSE:
  865. if (state != IPP_STATE_START)
  866. goto err_status;
  867. break;
  868. case IPP_CTRL_RESUME:
  869. if (state != IPP_STATE_STOP)
  870. goto err_status;
  871. break;
  872. default:
  873. DRM_ERROR("invalid state.\n");
  874. goto err_status;
  875. }
  876. return true;
  877. err_status:
  878. DRM_ERROR("invalid status:ctrl[%d]state[%d]\n", ctrl, state);
  879. return false;
  880. }
  881. int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev, void *data,
  882. struct drm_file *file)
  883. {
  884. struct drm_exynos_file_private *file_priv = file->driver_priv;
  885. struct exynos_drm_ipp_private *priv = file_priv->ipp_priv;
  886. struct exynos_drm_ippdrv *ippdrv = NULL;
  887. struct device *dev = priv->dev;
  888. struct ipp_context *ctx = get_ipp_context(dev);
  889. struct drm_exynos_ipp_cmd_ctrl *cmd_ctrl = data;
  890. struct drm_exynos_ipp_cmd_work *cmd_work;
  891. struct drm_exynos_ipp_cmd_node *c_node;
  892. if (!ctx) {
  893. DRM_ERROR("invalid context.\n");
  894. return -EINVAL;
  895. }
  896. if (!cmd_ctrl) {
  897. DRM_ERROR("invalid control parameter.\n");
  898. return -EINVAL;
  899. }
  900. DRM_DEBUG_KMS("ctrl[%d]prop_id[%d]\n",
  901. cmd_ctrl->ctrl, cmd_ctrl->prop_id);
  902. ippdrv = ipp_find_drv_by_handle(cmd_ctrl->prop_id);
  903. if (IS_ERR(ippdrv)) {
  904. DRM_ERROR("failed to get ipp driver.\n");
  905. return PTR_ERR(ippdrv);
  906. }
  907. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock,
  908. cmd_ctrl->prop_id);
  909. if (IS_ERR(c_node)) {
  910. DRM_ERROR("invalid command node list.\n");
  911. return PTR_ERR(c_node);
  912. }
  913. if (!exynos_drm_ipp_check_valid(ippdrv->dev, cmd_ctrl->ctrl,
  914. c_node->state)) {
  915. DRM_ERROR("invalid state.\n");
  916. return -EINVAL;
  917. }
  918. switch (cmd_ctrl->ctrl) {
  919. case IPP_CTRL_PLAY:
  920. if (pm_runtime_suspended(ippdrv->dev))
  921. pm_runtime_get_sync(ippdrv->dev);
  922. c_node->state = IPP_STATE_START;
  923. cmd_work = c_node->start_work;
  924. cmd_work->ctrl = cmd_ctrl->ctrl;
  925. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  926. c_node->state = IPP_STATE_START;
  927. break;
  928. case IPP_CTRL_STOP:
  929. cmd_work = c_node->stop_work;
  930. cmd_work->ctrl = cmd_ctrl->ctrl;
  931. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  932. if (!wait_for_completion_timeout(&c_node->stop_complete,
  933. msecs_to_jiffies(300))) {
  934. DRM_ERROR("timeout stop:prop_id[%d]\n",
  935. c_node->property.prop_id);
  936. }
  937. c_node->state = IPP_STATE_STOP;
  938. ippdrv->dedicated = false;
  939. ipp_clean_cmd_node(c_node);
  940. if (list_empty(&ippdrv->cmd_list))
  941. pm_runtime_put_sync(ippdrv->dev);
  942. break;
  943. case IPP_CTRL_PAUSE:
  944. cmd_work = c_node->stop_work;
  945. cmd_work->ctrl = cmd_ctrl->ctrl;
  946. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  947. if (!wait_for_completion_timeout(&c_node->stop_complete,
  948. msecs_to_jiffies(200))) {
  949. DRM_ERROR("timeout stop:prop_id[%d]\n",
  950. c_node->property.prop_id);
  951. }
  952. c_node->state = IPP_STATE_STOP;
  953. break;
  954. case IPP_CTRL_RESUME:
  955. c_node->state = IPP_STATE_START;
  956. cmd_work = c_node->start_work;
  957. cmd_work->ctrl = cmd_ctrl->ctrl;
  958. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  959. break;
  960. default:
  961. DRM_ERROR("could not support this state currently.\n");
  962. return -EINVAL;
  963. }
  964. DRM_DEBUG_KMS("done ctrl[%d]prop_id[%d]\n",
  965. cmd_ctrl->ctrl, cmd_ctrl->prop_id);
  966. return 0;
  967. }
  968. int exynos_drm_ippnb_register(struct notifier_block *nb)
  969. {
  970. return blocking_notifier_chain_register(
  971. &exynos_drm_ippnb_list, nb);
  972. }
  973. int exynos_drm_ippnb_unregister(struct notifier_block *nb)
  974. {
  975. return blocking_notifier_chain_unregister(
  976. &exynos_drm_ippnb_list, nb);
  977. }
  978. int exynos_drm_ippnb_send_event(unsigned long val, void *v)
  979. {
  980. return blocking_notifier_call_chain(
  981. &exynos_drm_ippnb_list, val, v);
  982. }
  983. static int ipp_set_property(struct exynos_drm_ippdrv *ippdrv,
  984. struct drm_exynos_ipp_property *property)
  985. {
  986. struct exynos_drm_ipp_ops *ops = NULL;
  987. bool swap = false;
  988. int ret, i;
  989. if (!property) {
  990. DRM_ERROR("invalid property parameter.\n");
  991. return -EINVAL;
  992. }
  993. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  994. /* reset h/w block */
  995. if (ippdrv->reset &&
  996. ippdrv->reset(ippdrv->dev)) {
  997. DRM_ERROR("failed to reset.\n");
  998. return -EINVAL;
  999. }
  1000. /* set source,destination operations */
  1001. for_each_ipp_ops(i) {
  1002. struct drm_exynos_ipp_config *config =
  1003. &property->config[i];
  1004. ops = ippdrv->ops[i];
  1005. if (!ops || !config) {
  1006. DRM_ERROR("not support ops and config.\n");
  1007. return -EINVAL;
  1008. }
  1009. /* set format */
  1010. if (ops->set_fmt) {
  1011. ret = ops->set_fmt(ippdrv->dev, config->fmt);
  1012. if (ret) {
  1013. DRM_ERROR("not support format.\n");
  1014. return ret;
  1015. }
  1016. }
  1017. /* set transform for rotation, flip */
  1018. if (ops->set_transf) {
  1019. ret = ops->set_transf(ippdrv->dev, config->degree,
  1020. config->flip, &swap);
  1021. if (ret) {
  1022. DRM_ERROR("not support tranf.\n");
  1023. return -EINVAL;
  1024. }
  1025. }
  1026. /* set size */
  1027. if (ops->set_size) {
  1028. ret = ops->set_size(ippdrv->dev, swap, &config->pos,
  1029. &config->sz);
  1030. if (ret) {
  1031. DRM_ERROR("not support size.\n");
  1032. return ret;
  1033. }
  1034. }
  1035. }
  1036. return 0;
  1037. }
  1038. static int ipp_start_property(struct exynos_drm_ippdrv *ippdrv,
  1039. struct drm_exynos_ipp_cmd_node *c_node)
  1040. {
  1041. struct drm_exynos_ipp_mem_node *m_node;
  1042. struct drm_exynos_ipp_property *property = &c_node->property;
  1043. struct list_head *head;
  1044. int ret, i;
  1045. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  1046. /* store command info in ippdrv */
  1047. ippdrv->c_node = c_node;
  1048. if (!ipp_check_mem_list(c_node)) {
  1049. DRM_DEBUG_KMS("empty memory.\n");
  1050. return -ENOMEM;
  1051. }
  1052. /* set current property in ippdrv */
  1053. ret = ipp_set_property(ippdrv, property);
  1054. if (ret) {
  1055. DRM_ERROR("failed to set property.\n");
  1056. ippdrv->c_node = NULL;
  1057. return ret;
  1058. }
  1059. /* check command */
  1060. switch (property->cmd) {
  1061. case IPP_CMD_M2M:
  1062. for_each_ipp_ops(i) {
  1063. /* source/destination memory list */
  1064. head = &c_node->mem_list[i];
  1065. m_node = list_first_entry(head,
  1066. struct drm_exynos_ipp_mem_node, list);
  1067. if (!m_node) {
  1068. DRM_ERROR("failed to get node.\n");
  1069. ret = -EFAULT;
  1070. return ret;
  1071. }
  1072. DRM_DEBUG_KMS("m_node[0x%x]\n", (int)m_node);
  1073. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1074. if (ret) {
  1075. DRM_ERROR("failed to set m node.\n");
  1076. return ret;
  1077. }
  1078. }
  1079. break;
  1080. case IPP_CMD_WB:
  1081. /* destination memory list */
  1082. head = &c_node->mem_list[EXYNOS_DRM_OPS_DST];
  1083. list_for_each_entry(m_node, head, list) {
  1084. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1085. if (ret) {
  1086. DRM_ERROR("failed to set m node.\n");
  1087. return ret;
  1088. }
  1089. }
  1090. break;
  1091. case IPP_CMD_OUTPUT:
  1092. /* source memory list */
  1093. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1094. list_for_each_entry(m_node, head, list) {
  1095. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1096. if (ret) {
  1097. DRM_ERROR("failed to set m node.\n");
  1098. return ret;
  1099. }
  1100. }
  1101. break;
  1102. default:
  1103. DRM_ERROR("invalid operations.\n");
  1104. return -EINVAL;
  1105. }
  1106. DRM_DEBUG_KMS("cmd[%d]\n", property->cmd);
  1107. /* start operations */
  1108. if (ippdrv->start) {
  1109. ret = ippdrv->start(ippdrv->dev, property->cmd);
  1110. if (ret) {
  1111. DRM_ERROR("failed to start ops.\n");
  1112. return ret;
  1113. }
  1114. }
  1115. return 0;
  1116. }
  1117. static int ipp_stop_property(struct drm_device *drm_dev,
  1118. struct exynos_drm_ippdrv *ippdrv,
  1119. struct drm_exynos_ipp_cmd_node *c_node)
  1120. {
  1121. struct drm_exynos_ipp_mem_node *m_node, *tm_node;
  1122. struct drm_exynos_ipp_property *property = &c_node->property;
  1123. struct list_head *head;
  1124. int ret = 0, i;
  1125. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  1126. /* put event */
  1127. ipp_put_event(c_node, NULL);
  1128. /* check command */
  1129. switch (property->cmd) {
  1130. case IPP_CMD_M2M:
  1131. for_each_ipp_ops(i) {
  1132. /* source/destination memory list */
  1133. head = &c_node->mem_list[i];
  1134. if (list_empty(head)) {
  1135. DRM_DEBUG_KMS("mem_list is empty.\n");
  1136. break;
  1137. }
  1138. list_for_each_entry_safe(m_node, tm_node,
  1139. head, list) {
  1140. ret = ipp_put_mem_node(drm_dev, c_node,
  1141. m_node);
  1142. if (ret) {
  1143. DRM_ERROR("failed to put m_node.\n");
  1144. goto err_clear;
  1145. }
  1146. }
  1147. }
  1148. break;
  1149. case IPP_CMD_WB:
  1150. /* destination memory list */
  1151. head = &c_node->mem_list[EXYNOS_DRM_OPS_DST];
  1152. if (list_empty(head)) {
  1153. DRM_DEBUG_KMS("mem_list is empty.\n");
  1154. break;
  1155. }
  1156. list_for_each_entry_safe(m_node, tm_node, head, list) {
  1157. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1158. if (ret) {
  1159. DRM_ERROR("failed to put m_node.\n");
  1160. goto err_clear;
  1161. }
  1162. }
  1163. break;
  1164. case IPP_CMD_OUTPUT:
  1165. /* source memory list */
  1166. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1167. if (list_empty(head)) {
  1168. DRM_DEBUG_KMS("mem_list is empty.\n");
  1169. break;
  1170. }
  1171. list_for_each_entry_safe(m_node, tm_node, head, list) {
  1172. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1173. if (ret) {
  1174. DRM_ERROR("failed to put m_node.\n");
  1175. goto err_clear;
  1176. }
  1177. }
  1178. break;
  1179. default:
  1180. DRM_ERROR("invalid operations.\n");
  1181. ret = -EINVAL;
  1182. goto err_clear;
  1183. }
  1184. err_clear:
  1185. /* stop operations */
  1186. if (ippdrv->stop)
  1187. ippdrv->stop(ippdrv->dev, property->cmd);
  1188. return ret;
  1189. }
  1190. void ipp_sched_cmd(struct work_struct *work)
  1191. {
  1192. struct drm_exynos_ipp_cmd_work *cmd_work =
  1193. (struct drm_exynos_ipp_cmd_work *)work;
  1194. struct exynos_drm_ippdrv *ippdrv;
  1195. struct drm_exynos_ipp_cmd_node *c_node;
  1196. struct drm_exynos_ipp_property *property;
  1197. int ret;
  1198. ippdrv = cmd_work->ippdrv;
  1199. if (!ippdrv) {
  1200. DRM_ERROR("invalid ippdrv list.\n");
  1201. return;
  1202. }
  1203. c_node = cmd_work->c_node;
  1204. if (!c_node) {
  1205. DRM_ERROR("invalid command node list.\n");
  1206. return;
  1207. }
  1208. mutex_lock(&c_node->cmd_lock);
  1209. property = &c_node->property;
  1210. switch (cmd_work->ctrl) {
  1211. case IPP_CTRL_PLAY:
  1212. case IPP_CTRL_RESUME:
  1213. ret = ipp_start_property(ippdrv, c_node);
  1214. if (ret) {
  1215. DRM_ERROR("failed to start property:prop_id[%d]\n",
  1216. c_node->property.prop_id);
  1217. goto err_unlock;
  1218. }
  1219. /*
  1220. * M2M case supports wait_completion of transfer.
  1221. * because M2M case supports single unit operation
  1222. * with multiple queue.
  1223. * M2M need to wait completion of data transfer.
  1224. */
  1225. if (ipp_is_m2m_cmd(property->cmd)) {
  1226. if (!wait_for_completion_timeout
  1227. (&c_node->start_complete, msecs_to_jiffies(200))) {
  1228. DRM_ERROR("timeout event:prop_id[%d]\n",
  1229. c_node->property.prop_id);
  1230. goto err_unlock;
  1231. }
  1232. }
  1233. break;
  1234. case IPP_CTRL_STOP:
  1235. case IPP_CTRL_PAUSE:
  1236. ret = ipp_stop_property(ippdrv->drm_dev, ippdrv,
  1237. c_node);
  1238. if (ret) {
  1239. DRM_ERROR("failed to stop property.\n");
  1240. goto err_unlock;
  1241. }
  1242. complete(&c_node->stop_complete);
  1243. break;
  1244. default:
  1245. DRM_ERROR("unknown control type\n");
  1246. break;
  1247. }
  1248. DRM_DEBUG_KMS("ctrl[%d] done.\n", cmd_work->ctrl);
  1249. err_unlock:
  1250. mutex_unlock(&c_node->cmd_lock);
  1251. }
  1252. static int ipp_send_event(struct exynos_drm_ippdrv *ippdrv,
  1253. struct drm_exynos_ipp_cmd_node *c_node, int *buf_id)
  1254. {
  1255. struct drm_device *drm_dev = ippdrv->drm_dev;
  1256. struct drm_exynos_ipp_property *property = &c_node->property;
  1257. struct drm_exynos_ipp_mem_node *m_node;
  1258. struct drm_exynos_ipp_queue_buf qbuf;
  1259. struct drm_exynos_ipp_send_event *e;
  1260. struct list_head *head;
  1261. struct timeval now;
  1262. unsigned long flags;
  1263. u32 tbuf_id[EXYNOS_DRM_OPS_MAX] = {0, };
  1264. int ret, i;
  1265. for_each_ipp_ops(i)
  1266. DRM_DEBUG_KMS("%s buf_id[%d]\n", i ? "dst" : "src", buf_id[i]);
  1267. if (!drm_dev) {
  1268. DRM_ERROR("failed to get drm_dev.\n");
  1269. return -EINVAL;
  1270. }
  1271. if (!property) {
  1272. DRM_ERROR("failed to get property.\n");
  1273. return -EINVAL;
  1274. }
  1275. if (list_empty(&c_node->event_list)) {
  1276. DRM_DEBUG_KMS("event list is empty.\n");
  1277. return 0;
  1278. }
  1279. if (!ipp_check_mem_list(c_node)) {
  1280. DRM_DEBUG_KMS("empty memory.\n");
  1281. return 0;
  1282. }
  1283. /* check command */
  1284. switch (property->cmd) {
  1285. case IPP_CMD_M2M:
  1286. for_each_ipp_ops(i) {
  1287. /* source/destination memory list */
  1288. head = &c_node->mem_list[i];
  1289. m_node = list_first_entry(head,
  1290. struct drm_exynos_ipp_mem_node, list);
  1291. if (!m_node) {
  1292. DRM_ERROR("empty memory node.\n");
  1293. return -ENOMEM;
  1294. }
  1295. tbuf_id[i] = m_node->buf_id;
  1296. DRM_DEBUG_KMS("%s buf_id[%d]\n",
  1297. i ? "dst" : "src", tbuf_id[i]);
  1298. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1299. if (ret)
  1300. DRM_ERROR("failed to put m_node.\n");
  1301. }
  1302. break;
  1303. case IPP_CMD_WB:
  1304. /* clear buf for finding */
  1305. memset(&qbuf, 0x0, sizeof(qbuf));
  1306. qbuf.ops_id = EXYNOS_DRM_OPS_DST;
  1307. qbuf.buf_id = buf_id[EXYNOS_DRM_OPS_DST];
  1308. /* get memory node entry */
  1309. m_node = ipp_find_mem_node(c_node, &qbuf);
  1310. if (!m_node) {
  1311. DRM_ERROR("empty memory node.\n");
  1312. return -ENOMEM;
  1313. }
  1314. tbuf_id[EXYNOS_DRM_OPS_DST] = m_node->buf_id;
  1315. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1316. if (ret)
  1317. DRM_ERROR("failed to put m_node.\n");
  1318. break;
  1319. case IPP_CMD_OUTPUT:
  1320. /* source memory list */
  1321. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1322. m_node = list_first_entry(head,
  1323. struct drm_exynos_ipp_mem_node, list);
  1324. if (!m_node) {
  1325. DRM_ERROR("empty memory node.\n");
  1326. return -ENOMEM;
  1327. }
  1328. tbuf_id[EXYNOS_DRM_OPS_SRC] = m_node->buf_id;
  1329. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1330. if (ret)
  1331. DRM_ERROR("failed to put m_node.\n");
  1332. break;
  1333. default:
  1334. DRM_ERROR("invalid operations.\n");
  1335. return -EINVAL;
  1336. }
  1337. if (tbuf_id[EXYNOS_DRM_OPS_DST] != buf_id[EXYNOS_DRM_OPS_DST])
  1338. DRM_ERROR("failed to match buf_id[%d %d]prop_id[%d]\n",
  1339. tbuf_id[1], buf_id[1], property->prop_id);
  1340. /*
  1341. * command node have event list of destination buffer
  1342. * If destination buffer enqueue to mem list,
  1343. * then we make event and link to event list tail.
  1344. * so, we get first event for first enqueued buffer.
  1345. */
  1346. e = list_first_entry(&c_node->event_list,
  1347. struct drm_exynos_ipp_send_event, base.link);
  1348. if (!e) {
  1349. DRM_ERROR("empty event.\n");
  1350. return -EINVAL;
  1351. }
  1352. do_gettimeofday(&now);
  1353. DRM_DEBUG_KMS("tv_sec[%ld]tv_usec[%ld]\n", now.tv_sec, now.tv_usec);
  1354. e->event.tv_sec = now.tv_sec;
  1355. e->event.tv_usec = now.tv_usec;
  1356. e->event.prop_id = property->prop_id;
  1357. /* set buffer id about source destination */
  1358. for_each_ipp_ops(i)
  1359. e->event.buf_id[i] = tbuf_id[i];
  1360. spin_lock_irqsave(&drm_dev->event_lock, flags);
  1361. list_move_tail(&e->base.link, &e->base.file_priv->event_list);
  1362. wake_up_interruptible(&e->base.file_priv->event_wait);
  1363. spin_unlock_irqrestore(&drm_dev->event_lock, flags);
  1364. DRM_DEBUG_KMS("done cmd[%d]prop_id[%d]buf_id[%d]\n",
  1365. property->cmd, property->prop_id, tbuf_id[EXYNOS_DRM_OPS_DST]);
  1366. return 0;
  1367. }
  1368. void ipp_sched_event(struct work_struct *work)
  1369. {
  1370. struct drm_exynos_ipp_event_work *event_work =
  1371. (struct drm_exynos_ipp_event_work *)work;
  1372. struct exynos_drm_ippdrv *ippdrv;
  1373. struct drm_exynos_ipp_cmd_node *c_node;
  1374. int ret;
  1375. if (!event_work) {
  1376. DRM_ERROR("failed to get event_work.\n");
  1377. return;
  1378. }
  1379. DRM_DEBUG_KMS("buf_id[%d]\n", event_work->buf_id[EXYNOS_DRM_OPS_DST]);
  1380. ippdrv = event_work->ippdrv;
  1381. if (!ippdrv) {
  1382. DRM_ERROR("failed to get ipp driver.\n");
  1383. return;
  1384. }
  1385. c_node = ippdrv->c_node;
  1386. if (!c_node) {
  1387. DRM_ERROR("failed to get command node.\n");
  1388. return;
  1389. }
  1390. /*
  1391. * IPP supports command thread, event thread synchronization.
  1392. * If IPP close immediately from user land, then IPP make
  1393. * synchronization with command thread, so make complete event.
  1394. * or going out operations.
  1395. */
  1396. if (c_node->state != IPP_STATE_START) {
  1397. DRM_DEBUG_KMS("bypass state[%d]prop_id[%d]\n",
  1398. c_node->state, c_node->property.prop_id);
  1399. goto err_completion;
  1400. }
  1401. mutex_lock(&c_node->event_lock);
  1402. ret = ipp_send_event(ippdrv, c_node, event_work->buf_id);
  1403. if (ret) {
  1404. DRM_ERROR("failed to send event.\n");
  1405. goto err_completion;
  1406. }
  1407. err_completion:
  1408. if (ipp_is_m2m_cmd(c_node->property.cmd))
  1409. complete(&c_node->start_complete);
  1410. mutex_unlock(&c_node->event_lock);
  1411. }
  1412. static int ipp_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
  1413. {
  1414. struct ipp_context *ctx = get_ipp_context(dev);
  1415. struct exynos_drm_ippdrv *ippdrv;
  1416. int ret, count = 0;
  1417. /* get ipp driver entry */
  1418. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1419. ippdrv->drm_dev = drm_dev;
  1420. ret = ipp_create_id(&ctx->ipp_idr, &ctx->ipp_lock, ippdrv,
  1421. &ippdrv->ipp_id);
  1422. if (ret) {
  1423. DRM_ERROR("failed to create id.\n");
  1424. goto err_idr;
  1425. }
  1426. DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]ipp_id[%d]\n",
  1427. count++, (int)ippdrv, ippdrv->ipp_id);
  1428. if (ippdrv->ipp_id == 0) {
  1429. DRM_ERROR("failed to get ipp_id[%d]\n",
  1430. ippdrv->ipp_id);
  1431. goto err_idr;
  1432. }
  1433. /* store parent device for node */
  1434. ippdrv->parent_dev = dev;
  1435. /* store event work queue and handler */
  1436. ippdrv->event_workq = ctx->event_workq;
  1437. ippdrv->sched_event = ipp_sched_event;
  1438. INIT_LIST_HEAD(&ippdrv->cmd_list);
  1439. if (is_drm_iommu_supported(drm_dev)) {
  1440. ret = drm_iommu_attach_device(drm_dev, ippdrv->dev);
  1441. if (ret) {
  1442. DRM_ERROR("failed to activate iommu\n");
  1443. goto err_iommu;
  1444. }
  1445. }
  1446. }
  1447. return 0;
  1448. err_iommu:
  1449. /* get ipp driver entry */
  1450. list_for_each_entry_reverse(ippdrv, &exynos_drm_ippdrv_list, drv_list)
  1451. if (is_drm_iommu_supported(drm_dev))
  1452. drm_iommu_detach_device(drm_dev, ippdrv->dev);
  1453. err_idr:
  1454. idr_destroy(&ctx->ipp_idr);
  1455. idr_destroy(&ctx->prop_idr);
  1456. return ret;
  1457. }
  1458. static void ipp_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
  1459. {
  1460. struct exynos_drm_ippdrv *ippdrv;
  1461. /* get ipp driver entry */
  1462. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1463. if (is_drm_iommu_supported(drm_dev))
  1464. drm_iommu_detach_device(drm_dev, ippdrv->dev);
  1465. ippdrv->drm_dev = NULL;
  1466. exynos_drm_ippdrv_unregister(ippdrv);
  1467. }
  1468. }
  1469. static int ipp_subdrv_open(struct drm_device *drm_dev, struct device *dev,
  1470. struct drm_file *file)
  1471. {
  1472. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1473. struct exynos_drm_ipp_private *priv;
  1474. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1475. if (!priv)
  1476. return -ENOMEM;
  1477. priv->dev = dev;
  1478. file_priv->ipp_priv = priv;
  1479. INIT_LIST_HEAD(&priv->event_list);
  1480. DRM_DEBUG_KMS("done priv[0x%x]\n", (int)priv);
  1481. return 0;
  1482. }
  1483. static void ipp_subdrv_close(struct drm_device *drm_dev, struct device *dev,
  1484. struct drm_file *file)
  1485. {
  1486. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1487. struct exynos_drm_ipp_private *priv = file_priv->ipp_priv;
  1488. struct exynos_drm_ippdrv *ippdrv = NULL;
  1489. struct drm_exynos_ipp_cmd_node *c_node, *tc_node;
  1490. int count = 0;
  1491. DRM_DEBUG_KMS("for priv[0x%x]\n", (int)priv);
  1492. if (list_empty(&exynos_drm_ippdrv_list)) {
  1493. DRM_DEBUG_KMS("ippdrv_list is empty.\n");
  1494. goto err_clear;
  1495. }
  1496. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1497. if (list_empty(&ippdrv->cmd_list))
  1498. continue;
  1499. list_for_each_entry_safe(c_node, tc_node,
  1500. &ippdrv->cmd_list, list) {
  1501. DRM_DEBUG_KMS("count[%d]ippdrv[0x%x]\n",
  1502. count++, (int)ippdrv);
  1503. if (c_node->priv == priv) {
  1504. /*
  1505. * userland goto unnormal state. process killed.
  1506. * and close the file.
  1507. * so, IPP didn't called stop cmd ctrl.
  1508. * so, we are make stop operation in this state.
  1509. */
  1510. if (c_node->state == IPP_STATE_START) {
  1511. ipp_stop_property(drm_dev, ippdrv,
  1512. c_node);
  1513. c_node->state = IPP_STATE_STOP;
  1514. }
  1515. ippdrv->dedicated = false;
  1516. ipp_clean_cmd_node(c_node);
  1517. if (list_empty(&ippdrv->cmd_list))
  1518. pm_runtime_put_sync(ippdrv->dev);
  1519. }
  1520. }
  1521. }
  1522. err_clear:
  1523. kfree(priv);
  1524. return;
  1525. }
  1526. static int ipp_probe(struct platform_device *pdev)
  1527. {
  1528. struct device *dev = &pdev->dev;
  1529. struct ipp_context *ctx;
  1530. struct exynos_drm_subdrv *subdrv;
  1531. int ret;
  1532. ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
  1533. if (!ctx)
  1534. return -ENOMEM;
  1535. mutex_init(&ctx->ipp_lock);
  1536. mutex_init(&ctx->prop_lock);
  1537. idr_init(&ctx->ipp_idr);
  1538. idr_init(&ctx->prop_idr);
  1539. /*
  1540. * create single thread for ipp event
  1541. * IPP supports event thread for IPP drivers.
  1542. * IPP driver send event_work to this thread.
  1543. * and IPP event thread send event to user process.
  1544. */
  1545. ctx->event_workq = create_singlethread_workqueue("ipp_event");
  1546. if (!ctx->event_workq) {
  1547. dev_err(dev, "failed to create event workqueue\n");
  1548. return -EINVAL;
  1549. }
  1550. /*
  1551. * create single thread for ipp command
  1552. * IPP supports command thread for user process.
  1553. * user process make command node using set property ioctl.
  1554. * and make start_work and send this work to command thread.
  1555. * and then this command thread start property.
  1556. */
  1557. ctx->cmd_workq = create_singlethread_workqueue("ipp_cmd");
  1558. if (!ctx->cmd_workq) {
  1559. dev_err(dev, "failed to create cmd workqueue\n");
  1560. ret = -EINVAL;
  1561. goto err_event_workq;
  1562. }
  1563. /* set sub driver informations */
  1564. subdrv = &ctx->subdrv;
  1565. subdrv->dev = dev;
  1566. subdrv->probe = ipp_subdrv_probe;
  1567. subdrv->remove = ipp_subdrv_remove;
  1568. subdrv->open = ipp_subdrv_open;
  1569. subdrv->close = ipp_subdrv_close;
  1570. platform_set_drvdata(pdev, ctx);
  1571. ret = exynos_drm_subdrv_register(subdrv);
  1572. if (ret < 0) {
  1573. DRM_ERROR("failed to register drm ipp device.\n");
  1574. goto err_cmd_workq;
  1575. }
  1576. dev_info(dev, "drm ipp registered successfully.\n");
  1577. return 0;
  1578. err_cmd_workq:
  1579. destroy_workqueue(ctx->cmd_workq);
  1580. err_event_workq:
  1581. destroy_workqueue(ctx->event_workq);
  1582. return ret;
  1583. }
  1584. static int ipp_remove(struct platform_device *pdev)
  1585. {
  1586. struct ipp_context *ctx = platform_get_drvdata(pdev);
  1587. /* unregister sub driver */
  1588. exynos_drm_subdrv_unregister(&ctx->subdrv);
  1589. /* remove,destroy ipp idr */
  1590. idr_destroy(&ctx->ipp_idr);
  1591. idr_destroy(&ctx->prop_idr);
  1592. mutex_destroy(&ctx->ipp_lock);
  1593. mutex_destroy(&ctx->prop_lock);
  1594. /* destroy command, event work queue */
  1595. destroy_workqueue(ctx->cmd_workq);
  1596. destroy_workqueue(ctx->event_workq);
  1597. return 0;
  1598. }
  1599. static int ipp_power_ctrl(struct ipp_context *ctx, bool enable)
  1600. {
  1601. DRM_DEBUG_KMS("enable[%d]\n", enable);
  1602. return 0;
  1603. }
  1604. #ifdef CONFIG_PM_SLEEP
  1605. static int ipp_suspend(struct device *dev)
  1606. {
  1607. struct ipp_context *ctx = get_ipp_context(dev);
  1608. if (pm_runtime_suspended(dev))
  1609. return 0;
  1610. return ipp_power_ctrl(ctx, false);
  1611. }
  1612. static int ipp_resume(struct device *dev)
  1613. {
  1614. struct ipp_context *ctx = get_ipp_context(dev);
  1615. if (!pm_runtime_suspended(dev))
  1616. return ipp_power_ctrl(ctx, true);
  1617. return 0;
  1618. }
  1619. #endif
  1620. #ifdef CONFIG_PM_RUNTIME
  1621. static int ipp_runtime_suspend(struct device *dev)
  1622. {
  1623. struct ipp_context *ctx = get_ipp_context(dev);
  1624. return ipp_power_ctrl(ctx, false);
  1625. }
  1626. static int ipp_runtime_resume(struct device *dev)
  1627. {
  1628. struct ipp_context *ctx = get_ipp_context(dev);
  1629. return ipp_power_ctrl(ctx, true);
  1630. }
  1631. #endif
  1632. static const struct dev_pm_ops ipp_pm_ops = {
  1633. SET_SYSTEM_SLEEP_PM_OPS(ipp_suspend, ipp_resume)
  1634. SET_RUNTIME_PM_OPS(ipp_runtime_suspend, ipp_runtime_resume, NULL)
  1635. };
  1636. struct platform_driver ipp_driver = {
  1637. .probe = ipp_probe,
  1638. .remove = ipp_remove,
  1639. .driver = {
  1640. .name = "exynos-drm-ipp",
  1641. .owner = THIS_MODULE,
  1642. .pm = &ipp_pm_ops,
  1643. },
  1644. };