nouveau_fence.c 13 KB

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  1. /*
  2. * Copyright (C) 2007 Ben Skeggs.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_ramht.h"
  30. #include "nouveau_dma.h"
  31. #define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
  32. #define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17)
  33. struct nouveau_fence {
  34. struct nouveau_channel *channel;
  35. struct kref refcount;
  36. struct list_head entry;
  37. uint32_t sequence;
  38. bool signalled;
  39. void (*work)(void *priv, bool signalled);
  40. void *priv;
  41. };
  42. struct nouveau_semaphore {
  43. struct kref ref;
  44. struct drm_device *dev;
  45. struct drm_mm_node *mem;
  46. };
  47. static inline struct nouveau_fence *
  48. nouveau_fence(void *sync_obj)
  49. {
  50. return (struct nouveau_fence *)sync_obj;
  51. }
  52. static void
  53. nouveau_fence_del(struct kref *ref)
  54. {
  55. struct nouveau_fence *fence =
  56. container_of(ref, struct nouveau_fence, refcount);
  57. nouveau_channel_ref(NULL, &fence->channel);
  58. kfree(fence);
  59. }
  60. void
  61. nouveau_fence_update(struct nouveau_channel *chan)
  62. {
  63. struct drm_device *dev = chan->dev;
  64. struct nouveau_fence *tmp, *fence;
  65. uint32_t sequence;
  66. spin_lock(&chan->fence.lock);
  67. if (USE_REFCNT(dev))
  68. sequence = nvchan_rd32(chan, 0x48);
  69. else
  70. sequence = atomic_read(&chan->fence.last_sequence_irq);
  71. if (chan->fence.sequence_ack == sequence)
  72. goto out;
  73. chan->fence.sequence_ack = sequence;
  74. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  75. sequence = fence->sequence;
  76. fence->signalled = true;
  77. list_del(&fence->entry);
  78. if (unlikely(fence->work))
  79. fence->work(fence->priv, true);
  80. kref_put(&fence->refcount, nouveau_fence_del);
  81. if (sequence == chan->fence.sequence_ack)
  82. break;
  83. }
  84. out:
  85. spin_unlock(&chan->fence.lock);
  86. }
  87. int
  88. nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
  89. bool emit)
  90. {
  91. struct nouveau_fence *fence;
  92. int ret = 0;
  93. fence = kzalloc(sizeof(*fence), GFP_KERNEL);
  94. if (!fence)
  95. return -ENOMEM;
  96. kref_init(&fence->refcount);
  97. nouveau_channel_ref(chan, &fence->channel);
  98. if (emit)
  99. ret = nouveau_fence_emit(fence);
  100. if (ret)
  101. nouveau_fence_unref(&fence);
  102. *pfence = fence;
  103. return ret;
  104. }
  105. struct nouveau_channel *
  106. nouveau_fence_channel(struct nouveau_fence *fence)
  107. {
  108. return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
  109. }
  110. int
  111. nouveau_fence_emit(struct nouveau_fence *fence)
  112. {
  113. struct nouveau_channel *chan = fence->channel;
  114. struct drm_device *dev = chan->dev;
  115. int ret;
  116. ret = RING_SPACE(chan, 2);
  117. if (ret)
  118. return ret;
  119. if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
  120. nouveau_fence_update(chan);
  121. BUG_ON(chan->fence.sequence ==
  122. chan->fence.sequence_ack - 1);
  123. }
  124. fence->sequence = ++chan->fence.sequence;
  125. kref_get(&fence->refcount);
  126. spin_lock(&chan->fence.lock);
  127. list_add_tail(&fence->entry, &chan->fence.pending);
  128. spin_unlock(&chan->fence.lock);
  129. BEGIN_RING(chan, NvSubSw, USE_REFCNT(dev) ? 0x0050 : 0x0150, 1);
  130. OUT_RING(chan, fence->sequence);
  131. FIRE_RING(chan);
  132. return 0;
  133. }
  134. void
  135. nouveau_fence_work(struct nouveau_fence *fence,
  136. void (*work)(void *priv, bool signalled),
  137. void *priv)
  138. {
  139. BUG_ON(fence->work);
  140. spin_lock(&fence->channel->fence.lock);
  141. if (fence->signalled) {
  142. work(priv, true);
  143. } else {
  144. fence->work = work;
  145. fence->priv = priv;
  146. }
  147. spin_unlock(&fence->channel->fence.lock);
  148. }
  149. void
  150. __nouveau_fence_unref(void **sync_obj)
  151. {
  152. struct nouveau_fence *fence = nouveau_fence(*sync_obj);
  153. if (fence)
  154. kref_put(&fence->refcount, nouveau_fence_del);
  155. *sync_obj = NULL;
  156. }
  157. void *
  158. __nouveau_fence_ref(void *sync_obj)
  159. {
  160. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  161. kref_get(&fence->refcount);
  162. return sync_obj;
  163. }
  164. bool
  165. __nouveau_fence_signalled(void *sync_obj, void *sync_arg)
  166. {
  167. struct nouveau_fence *fence = nouveau_fence(sync_obj);
  168. struct nouveau_channel *chan = fence->channel;
  169. if (fence->signalled)
  170. return true;
  171. nouveau_fence_update(chan);
  172. return fence->signalled;
  173. }
  174. int
  175. __nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
  176. {
  177. unsigned long timeout = jiffies + (3 * DRM_HZ);
  178. unsigned long sleep_time = jiffies + 1;
  179. int ret = 0;
  180. while (1) {
  181. if (__nouveau_fence_signalled(sync_obj, sync_arg))
  182. break;
  183. if (time_after_eq(jiffies, timeout)) {
  184. ret = -EBUSY;
  185. break;
  186. }
  187. __set_current_state(intr ? TASK_INTERRUPTIBLE
  188. : TASK_UNINTERRUPTIBLE);
  189. if (lazy && time_after_eq(jiffies, sleep_time))
  190. schedule_timeout(1);
  191. if (intr && signal_pending(current)) {
  192. ret = -ERESTARTSYS;
  193. break;
  194. }
  195. }
  196. __set_current_state(TASK_RUNNING);
  197. return ret;
  198. }
  199. static struct nouveau_semaphore *
  200. alloc_semaphore(struct drm_device *dev)
  201. {
  202. struct drm_nouveau_private *dev_priv = dev->dev_private;
  203. struct nouveau_semaphore *sema;
  204. int ret;
  205. if (!USE_SEMA(dev))
  206. return NULL;
  207. sema = kmalloc(sizeof(*sema), GFP_KERNEL);
  208. if (!sema)
  209. goto fail;
  210. ret = drm_mm_pre_get(&dev_priv->fence.heap);
  211. if (ret)
  212. goto fail;
  213. spin_lock(&dev_priv->fence.lock);
  214. sema->mem = drm_mm_search_free(&dev_priv->fence.heap, 4, 0, 0);
  215. if (sema->mem)
  216. sema->mem = drm_mm_get_block_atomic(sema->mem, 4, 0);
  217. spin_unlock(&dev_priv->fence.lock);
  218. if (!sema->mem)
  219. goto fail;
  220. kref_init(&sema->ref);
  221. sema->dev = dev;
  222. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 0);
  223. return sema;
  224. fail:
  225. kfree(sema);
  226. return NULL;
  227. }
  228. static void
  229. free_semaphore(struct kref *ref)
  230. {
  231. struct nouveau_semaphore *sema =
  232. container_of(ref, struct nouveau_semaphore, ref);
  233. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  234. spin_lock(&dev_priv->fence.lock);
  235. drm_mm_put_block(sema->mem);
  236. spin_unlock(&dev_priv->fence.lock);
  237. kfree(sema);
  238. }
  239. static void
  240. semaphore_work(void *priv, bool signalled)
  241. {
  242. struct nouveau_semaphore *sema = priv;
  243. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  244. if (unlikely(!signalled))
  245. nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
  246. kref_put(&sema->ref, free_semaphore);
  247. }
  248. static int
  249. emit_semaphore(struct nouveau_channel *chan, int method,
  250. struct nouveau_semaphore *sema)
  251. {
  252. struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
  253. struct nouveau_fence *fence;
  254. bool smart = (dev_priv->card_type >= NV_50);
  255. int ret;
  256. ret = RING_SPACE(chan, smart ? 8 : 4);
  257. if (ret)
  258. return ret;
  259. if (smart) {
  260. BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
  261. OUT_RING(chan, NvSema);
  262. }
  263. BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
  264. OUT_RING(chan, sema->mem->start);
  265. if (smart && method == NV_SW_SEMAPHORE_ACQUIRE) {
  266. /*
  267. * NV50 tries to be too smart and context-switch
  268. * between semaphores instead of doing a "first come,
  269. * first served" strategy like previous cards
  270. * do.
  271. *
  272. * That's bad because the ACQUIRE latency can get as
  273. * large as the PFIFO context time slice in the
  274. * typical DRI2 case where you have several
  275. * outstanding semaphores at the same moment.
  276. *
  277. * If we're going to ACQUIRE, force the card to
  278. * context switch before, just in case the matching
  279. * RELEASE is already scheduled to be executed in
  280. * another channel.
  281. */
  282. BEGIN_RING(chan, NvSubSw, NV_SW_YIELD, 1);
  283. OUT_RING(chan, 0);
  284. }
  285. BEGIN_RING(chan, NvSubSw, method, 1);
  286. OUT_RING(chan, 1);
  287. if (smart && method == NV_SW_SEMAPHORE_RELEASE) {
  288. /*
  289. * Force the card to context switch, there may be
  290. * another channel waiting for the semaphore we just
  291. * released.
  292. */
  293. BEGIN_RING(chan, NvSubSw, NV_SW_YIELD, 1);
  294. OUT_RING(chan, 0);
  295. }
  296. /* Delay semaphore destruction until its work is done */
  297. ret = nouveau_fence_new(chan, &fence, true);
  298. if (ret)
  299. return ret;
  300. kref_get(&sema->ref);
  301. nouveau_fence_work(fence, semaphore_work, sema);
  302. nouveau_fence_unref(&fence);
  303. return 0;
  304. }
  305. int
  306. nouveau_fence_sync(struct nouveau_fence *fence,
  307. struct nouveau_channel *wchan)
  308. {
  309. struct nouveau_channel *chan = nouveau_fence_channel(fence);
  310. struct drm_device *dev = wchan->dev;
  311. struct nouveau_semaphore *sema;
  312. int ret = 0;
  313. if (likely(!chan || chan == wchan ||
  314. nouveau_fence_signalled(fence)))
  315. goto out;
  316. sema = alloc_semaphore(dev);
  317. if (!sema) {
  318. /* Early card or broken userspace, fall back to
  319. * software sync. */
  320. ret = nouveau_fence_wait(fence, true, false);
  321. goto out;
  322. }
  323. /* try to take chan's mutex, if we can't take it right away
  324. * we have to fallback to software sync to prevent locking
  325. * order issues
  326. */
  327. if (!mutex_trylock(&chan->mutex)) {
  328. ret = nouveau_fence_wait(fence, true, false);
  329. goto out_unref;
  330. }
  331. /* Make wchan wait until it gets signalled */
  332. ret = emit_semaphore(wchan, NV_SW_SEMAPHORE_ACQUIRE, sema);
  333. if (ret)
  334. goto out_unlock;
  335. /* Signal the semaphore from chan */
  336. ret = emit_semaphore(chan, NV_SW_SEMAPHORE_RELEASE, sema);
  337. out_unlock:
  338. mutex_unlock(&chan->mutex);
  339. out_unref:
  340. kref_put(&sema->ref, free_semaphore);
  341. out:
  342. if (chan)
  343. nouveau_channel_put_unlocked(&chan);
  344. return ret;
  345. }
  346. int
  347. __nouveau_fence_flush(void *sync_obj, void *sync_arg)
  348. {
  349. return 0;
  350. }
  351. int
  352. nouveau_fence_channel_init(struct nouveau_channel *chan)
  353. {
  354. struct drm_device *dev = chan->dev;
  355. struct drm_nouveau_private *dev_priv = dev->dev_private;
  356. struct nouveau_gpuobj *obj = NULL;
  357. int ret;
  358. /* Create an NV_SW object for various sync purposes */
  359. ret = nouveau_gpuobj_gr_new(chan, NV_SW, &obj);
  360. if (ret)
  361. return ret;
  362. ret = nouveau_ramht_insert(chan, NvSw, obj);
  363. nouveau_gpuobj_ref(NULL, &obj);
  364. if (ret)
  365. return ret;
  366. ret = RING_SPACE(chan, 2);
  367. if (ret)
  368. return ret;
  369. BEGIN_RING(chan, NvSubSw, 0, 1);
  370. OUT_RING(chan, NvSw);
  371. /* Create a DMA object for the shared cross-channel sync area. */
  372. if (USE_SEMA(dev)) {
  373. struct drm_mm_node *mem = dev_priv->fence.bo->bo.mem.mm_node;
  374. ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
  375. mem->start << PAGE_SHIFT,
  376. mem->size << PAGE_SHIFT,
  377. NV_MEM_ACCESS_RW,
  378. NV_MEM_TARGET_VRAM, &obj);
  379. if (ret)
  380. return ret;
  381. ret = nouveau_ramht_insert(chan, NvSema, obj);
  382. nouveau_gpuobj_ref(NULL, &obj);
  383. if (ret)
  384. return ret;
  385. ret = RING_SPACE(chan, 2);
  386. if (ret)
  387. return ret;
  388. BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
  389. OUT_RING(chan, NvSema);
  390. }
  391. FIRE_RING(chan);
  392. INIT_LIST_HEAD(&chan->fence.pending);
  393. spin_lock_init(&chan->fence.lock);
  394. atomic_set(&chan->fence.last_sequence_irq, 0);
  395. return 0;
  396. }
  397. void
  398. nouveau_fence_channel_fini(struct nouveau_channel *chan)
  399. {
  400. struct nouveau_fence *tmp, *fence;
  401. spin_lock(&chan->fence.lock);
  402. list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
  403. fence->signalled = true;
  404. list_del(&fence->entry);
  405. if (unlikely(fence->work))
  406. fence->work(fence->priv, false);
  407. kref_put(&fence->refcount, nouveau_fence_del);
  408. }
  409. spin_unlock(&chan->fence.lock);
  410. }
  411. int
  412. nouveau_fence_init(struct drm_device *dev)
  413. {
  414. struct drm_nouveau_private *dev_priv = dev->dev_private;
  415. int ret;
  416. /* Create a shared VRAM heap for cross-channel sync. */
  417. if (USE_SEMA(dev)) {
  418. ret = nouveau_bo_new(dev, NULL, 4096, 0, TTM_PL_FLAG_VRAM,
  419. 0, 0, false, true, &dev_priv->fence.bo);
  420. if (ret)
  421. return ret;
  422. ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
  423. if (ret)
  424. goto fail;
  425. ret = nouveau_bo_map(dev_priv->fence.bo);
  426. if (ret)
  427. goto fail;
  428. ret = drm_mm_init(&dev_priv->fence.heap, 0,
  429. dev_priv->fence.bo->bo.mem.size);
  430. if (ret)
  431. goto fail;
  432. spin_lock_init(&dev_priv->fence.lock);
  433. }
  434. return 0;
  435. fail:
  436. nouveau_bo_unmap(dev_priv->fence.bo);
  437. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  438. return ret;
  439. }
  440. void
  441. nouveau_fence_fini(struct drm_device *dev)
  442. {
  443. struct drm_nouveau_private *dev_priv = dev->dev_private;
  444. if (USE_SEMA(dev)) {
  445. drm_mm_takedown(&dev_priv->fence.heap);
  446. nouveau_bo_unmap(dev_priv->fence.bo);
  447. nouveau_bo_unpin(dev_priv->fence.bo);
  448. nouveau_bo_ref(NULL, &dev_priv->fence.bo);
  449. }
  450. }