nouveau_drv.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465
  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include "drmP.h"
  26. #include "drm.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_fb.h"
  31. #include "nouveau_fbcon.h"
  32. #include "nouveau_pm.h"
  33. #include "nv50_display.h"
  34. #include "drm_pciids.h"
  35. MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
  36. int nouveau_agpmode = -1;
  37. module_param_named(agpmode, nouveau_agpmode, int, 0400);
  38. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  39. static int nouveau_modeset = -1; /* kms */
  40. module_param_named(modeset, nouveau_modeset, int, 0400);
  41. MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  42. char *nouveau_vbios;
  43. module_param_named(vbios, nouveau_vbios, charp, 0400);
  44. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  45. int nouveau_vram_pushbuf;
  46. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  47. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  48. int nouveau_vram_notify = 0;
  49. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  50. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  51. int nouveau_duallink = 1;
  52. module_param_named(duallink, nouveau_duallink, int, 0400);
  53. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  54. int nouveau_uscript_lvds = -1;
  55. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  56. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  57. int nouveau_uscript_tmds = -1;
  58. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  59. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  60. int nouveau_ignorelid = 0;
  61. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  62. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  63. int nouveau_noaccel = 0;
  64. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  65. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  66. int nouveau_nofbaccel = 0;
  67. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  68. MODULE_PARM_DESC(force_post, "Force POST");
  69. int nouveau_force_post = 0;
  70. module_param_named(force_post, nouveau_force_post, int, 0400);
  71. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  72. int nouveau_override_conntype = 0;
  73. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  74. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  75. int nouveau_tv_disable = 0;
  76. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  77. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  78. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  79. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  80. "\t\tDefault: PAL\n"
  81. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  82. char *nouveau_tv_norm;
  83. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  84. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  85. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  86. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  87. "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  88. int nouveau_reg_debug;
  89. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  90. MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
  91. char *nouveau_perflvl;
  92. module_param_named(perflvl, nouveau_perflvl, charp, 0400);
  93. MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
  94. int nouveau_perflvl_wr;
  95. module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
  96. MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
  97. int nouveau_msi;
  98. module_param_named(msi, nouveau_msi, int, 0400);
  99. int nouveau_fbpercrtc;
  100. #if 0
  101. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  102. #endif
  103. static struct pci_device_id pciidlist[] = {
  104. {
  105. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  106. .class = PCI_BASE_CLASS_DISPLAY << 16,
  107. .class_mask = 0xff << 16,
  108. },
  109. {
  110. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  111. .class = PCI_BASE_CLASS_DISPLAY << 16,
  112. .class_mask = 0xff << 16,
  113. },
  114. {}
  115. };
  116. MODULE_DEVICE_TABLE(pci, pciidlist);
  117. static struct drm_driver driver;
  118. static int __devinit
  119. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  120. {
  121. return drm_get_pci_dev(pdev, ent, &driver);
  122. }
  123. static void
  124. nouveau_pci_remove(struct pci_dev *pdev)
  125. {
  126. struct drm_device *dev = pci_get_drvdata(pdev);
  127. drm_put_dev(dev);
  128. }
  129. int
  130. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  131. {
  132. struct drm_device *dev = pci_get_drvdata(pdev);
  133. struct drm_nouveau_private *dev_priv = dev->dev_private;
  134. struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
  135. struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
  136. struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
  137. struct nouveau_channel *chan;
  138. struct drm_crtc *crtc;
  139. int ret, i;
  140. if (pm_state.event == PM_EVENT_PRETHAW)
  141. return 0;
  142. NV_INFO(dev, "Disabling fbcon acceleration...\n");
  143. nouveau_fbcon_save_disable_accel(dev);
  144. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  145. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  146. struct nouveau_framebuffer *nouveau_fb;
  147. nouveau_fb = nouveau_framebuffer(crtc->fb);
  148. if (!nouveau_fb || !nouveau_fb->nvbo)
  149. continue;
  150. nouveau_bo_unpin(nouveau_fb->nvbo);
  151. }
  152. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  153. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  154. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  155. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  156. }
  157. NV_INFO(dev, "Evicting buffers...\n");
  158. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  159. NV_INFO(dev, "Idling channels...\n");
  160. for (i = 0; i < pfifo->channels; i++) {
  161. chan = dev_priv->channels.ptr[i];
  162. if (chan && chan->pushbuf_bo)
  163. nouveau_channel_idle(chan);
  164. }
  165. pgraph->fifo_access(dev, false);
  166. nouveau_wait_for_idle(dev);
  167. pfifo->reassign(dev, false);
  168. pfifo->disable(dev);
  169. pfifo->unload_context(dev);
  170. pgraph->unload_context(dev);
  171. ret = pinstmem->suspend(dev);
  172. if (ret) {
  173. NV_ERROR(dev, "... failed: %d\n", ret);
  174. goto out_abort;
  175. }
  176. NV_INFO(dev, "Suspending GPU objects...\n");
  177. ret = nouveau_gpuobj_suspend(dev);
  178. if (ret) {
  179. NV_ERROR(dev, "... failed: %d\n", ret);
  180. pinstmem->resume(dev);
  181. goto out_abort;
  182. }
  183. NV_INFO(dev, "And we're gone!\n");
  184. pci_save_state(pdev);
  185. if (pm_state.event == PM_EVENT_SUSPEND) {
  186. pci_disable_device(pdev);
  187. pci_set_power_state(pdev, PCI_D3hot);
  188. }
  189. acquire_console_sem();
  190. nouveau_fbcon_set_suspend(dev, 1);
  191. release_console_sem();
  192. nouveau_fbcon_restore_accel(dev);
  193. return 0;
  194. out_abort:
  195. NV_INFO(dev, "Re-enabling acceleration..\n");
  196. pfifo->enable(dev);
  197. pfifo->reassign(dev, true);
  198. pgraph->fifo_access(dev, true);
  199. return ret;
  200. }
  201. int
  202. nouveau_pci_resume(struct pci_dev *pdev)
  203. {
  204. struct drm_device *dev = pci_get_drvdata(pdev);
  205. struct drm_nouveau_private *dev_priv = dev->dev_private;
  206. struct nouveau_engine *engine = &dev_priv->engine;
  207. struct drm_crtc *crtc;
  208. int ret, i;
  209. nouveau_fbcon_save_disable_accel(dev);
  210. NV_INFO(dev, "We're back, enabling device...\n");
  211. pci_set_power_state(pdev, PCI_D0);
  212. pci_restore_state(pdev);
  213. if (pci_enable_device(pdev))
  214. return -1;
  215. pci_set_master(dev->pdev);
  216. /* Make sure the AGP controller is in a consistent state */
  217. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
  218. nouveau_mem_reset_agp(dev);
  219. /* Make the CRTCs accessible */
  220. engine->display.early_init(dev);
  221. NV_INFO(dev, "POSTing device...\n");
  222. ret = nouveau_run_vbios_init(dev);
  223. if (ret)
  224. return ret;
  225. nouveau_pm_resume(dev);
  226. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
  227. ret = nouveau_mem_init_agp(dev);
  228. if (ret) {
  229. NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
  230. return ret;
  231. }
  232. }
  233. NV_INFO(dev, "Restoring GPU objects...\n");
  234. nouveau_gpuobj_resume(dev);
  235. NV_INFO(dev, "Reinitialising engines...\n");
  236. engine->instmem.resume(dev);
  237. engine->mc.init(dev);
  238. engine->timer.init(dev);
  239. engine->fb.init(dev);
  240. engine->graph.init(dev);
  241. engine->crypt.init(dev);
  242. engine->fifo.init(dev);
  243. nouveau_irq_postinstall(dev);
  244. /* Re-write SKIPS, they'll have been lost over the suspend */
  245. if (nouveau_vram_pushbuf) {
  246. struct nouveau_channel *chan;
  247. int j;
  248. for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
  249. chan = dev_priv->channels.ptr[i];
  250. if (!chan || !chan->pushbuf_bo)
  251. continue;
  252. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  253. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  254. }
  255. }
  256. NV_INFO(dev, "Restoring mode...\n");
  257. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  258. struct nouveau_framebuffer *nouveau_fb;
  259. nouveau_fb = nouveau_framebuffer(crtc->fb);
  260. if (!nouveau_fb || !nouveau_fb->nvbo)
  261. continue;
  262. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  263. }
  264. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  265. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  266. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  267. if (!ret)
  268. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  269. if (ret)
  270. NV_ERROR(dev, "Could not pin/map cursor.\n");
  271. }
  272. engine->display.init(dev);
  273. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  274. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  275. nv_crtc->cursor.set_offset(nv_crtc,
  276. nv_crtc->cursor.nvbo->bo.offset -
  277. dev_priv->vm_vram_base);
  278. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  279. nv_crtc->cursor_saved_y);
  280. }
  281. /* Force CLUT to get re-loaded during modeset */
  282. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  283. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  284. nv_crtc->lut.depth = 0;
  285. }
  286. acquire_console_sem();
  287. nouveau_fbcon_set_suspend(dev, 0);
  288. release_console_sem();
  289. nouveau_fbcon_zfill_all(dev);
  290. drm_helper_resume_force_mode(dev);
  291. nouveau_fbcon_restore_accel(dev);
  292. return 0;
  293. }
  294. static struct drm_driver driver = {
  295. .driver_features =
  296. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  297. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  298. DRIVER_MODESET,
  299. .load = nouveau_load,
  300. .firstopen = nouveau_firstopen,
  301. .lastclose = nouveau_lastclose,
  302. .unload = nouveau_unload,
  303. .preclose = nouveau_preclose,
  304. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  305. .debugfs_init = nouveau_debugfs_init,
  306. .debugfs_cleanup = nouveau_debugfs_takedown,
  307. #endif
  308. .irq_preinstall = nouveau_irq_preinstall,
  309. .irq_postinstall = nouveau_irq_postinstall,
  310. .irq_uninstall = nouveau_irq_uninstall,
  311. .irq_handler = nouveau_irq_handler,
  312. .get_vblank_counter = drm_vblank_count,
  313. .enable_vblank = nouveau_vblank_enable,
  314. .disable_vblank = nouveau_vblank_disable,
  315. .reclaim_buffers = drm_core_reclaim_buffers,
  316. .ioctls = nouveau_ioctls,
  317. .fops = {
  318. .owner = THIS_MODULE,
  319. .open = drm_open,
  320. .release = drm_release,
  321. .unlocked_ioctl = drm_ioctl,
  322. .mmap = nouveau_ttm_mmap,
  323. .poll = drm_poll,
  324. .fasync = drm_fasync,
  325. .read = drm_read,
  326. #if defined(CONFIG_COMPAT)
  327. .compat_ioctl = nouveau_compat_ioctl,
  328. #endif
  329. .llseek = noop_llseek,
  330. },
  331. .pci_driver = {
  332. .name = DRIVER_NAME,
  333. .id_table = pciidlist,
  334. .probe = nouveau_pci_probe,
  335. .remove = nouveau_pci_remove,
  336. .suspend = nouveau_pci_suspend,
  337. .resume = nouveau_pci_resume
  338. },
  339. .gem_init_object = nouveau_gem_object_new,
  340. .gem_free_object = nouveau_gem_object_del,
  341. .name = DRIVER_NAME,
  342. .desc = DRIVER_DESC,
  343. #ifdef GIT_REVISION
  344. .date = GIT_REVISION,
  345. #else
  346. .date = DRIVER_DATE,
  347. #endif
  348. .major = DRIVER_MAJOR,
  349. .minor = DRIVER_MINOR,
  350. .patchlevel = DRIVER_PATCHLEVEL,
  351. };
  352. static int __init nouveau_init(void)
  353. {
  354. driver.num_ioctls = nouveau_max_ioctl;
  355. if (nouveau_modeset == -1) {
  356. #ifdef CONFIG_VGA_CONSOLE
  357. if (vgacon_text_force())
  358. nouveau_modeset = 0;
  359. else
  360. #endif
  361. nouveau_modeset = 1;
  362. }
  363. if (!nouveau_modeset)
  364. return 0;
  365. nouveau_register_dsm_handler();
  366. return drm_init(&driver);
  367. }
  368. static void __exit nouveau_exit(void)
  369. {
  370. if (!nouveau_modeset)
  371. return;
  372. drm_exit(&driver);
  373. nouveau_unregister_dsm_handler();
  374. }
  375. module_init(nouveau_init);
  376. module_exit(nouveau_exit);
  377. MODULE_AUTHOR(DRIVER_AUTHOR);
  378. MODULE_DESCRIPTION(DRIVER_DESC);
  379. MODULE_LICENSE("GPL and additional rights");