intel_sdvo.c 78 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  47. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  48. static const char *tv_format_names[] = {
  49. "NTSC_M" , "NTSC_J" , "NTSC_443",
  50. "PAL_B" , "PAL_D" , "PAL_G" ,
  51. "PAL_H" , "PAL_I" , "PAL_M" ,
  52. "PAL_N" , "PAL_NC" , "PAL_60" ,
  53. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  54. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  55. "SECAM_60"
  56. };
  57. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  58. struct intel_sdvo {
  59. struct intel_encoder base;
  60. struct i2c_adapter *i2c;
  61. u8 slave_addr;
  62. struct i2c_adapter ddc;
  63. /* Register for the SDVO device: SDVOB or SDVOC */
  64. int sdvo_reg;
  65. /* Active outputs controlled by this SDVO output */
  66. uint16_t controlled_output;
  67. /*
  68. * Capabilities of the SDVO device returned by
  69. * i830_sdvo_get_capabilities()
  70. */
  71. struct intel_sdvo_caps caps;
  72. /* Pixel clock limitations reported by the SDVO device, in kHz */
  73. int pixel_clock_min, pixel_clock_max;
  74. /*
  75. * For multiple function SDVO device,
  76. * this is for current attached outputs.
  77. */
  78. uint16_t attached_output;
  79. /**
  80. * This is set if we're going to treat the device as TV-out.
  81. *
  82. * While we have these nice friendly flags for output types that ought
  83. * to decide this for us, the S-Video output on our HDMI+S-Video card
  84. * shows up as RGB1 (VGA).
  85. */
  86. bool is_tv;
  87. /* This is for current tv format name */
  88. int tv_format_index;
  89. /**
  90. * This is set if we treat the device as HDMI, instead of DVI.
  91. */
  92. bool is_hdmi;
  93. bool has_audio;
  94. /**
  95. * This is set if we detect output of sdvo device as LVDS and
  96. * have a valid fixed mode to use with the panel.
  97. */
  98. bool is_lvds;
  99. /**
  100. * This is sdvo fixed pannel mode pointer
  101. */
  102. struct drm_display_mode *sdvo_lvds_fixed_mode;
  103. /* DDC bus used by this SDVO encoder */
  104. uint8_t ddc_bus;
  105. /* Input timings for adjusted_mode */
  106. struct intel_sdvo_dtd input_dtd;
  107. };
  108. struct intel_sdvo_connector {
  109. struct intel_connector base;
  110. /* Mark the type of connector */
  111. uint16_t output_flag;
  112. int force_audio;
  113. /* This contains all current supported TV format */
  114. u8 tv_format_supported[TV_FORMAT_NUM];
  115. int format_supported_num;
  116. struct drm_property *tv_format;
  117. struct drm_property *force_audio_property;
  118. /* add the property for the SDVO-TV */
  119. struct drm_property *left;
  120. struct drm_property *right;
  121. struct drm_property *top;
  122. struct drm_property *bottom;
  123. struct drm_property *hpos;
  124. struct drm_property *vpos;
  125. struct drm_property *contrast;
  126. struct drm_property *saturation;
  127. struct drm_property *hue;
  128. struct drm_property *sharpness;
  129. struct drm_property *flicker_filter;
  130. struct drm_property *flicker_filter_adaptive;
  131. struct drm_property *flicker_filter_2d;
  132. struct drm_property *tv_chroma_filter;
  133. struct drm_property *tv_luma_filter;
  134. struct drm_property *dot_crawl;
  135. /* add the property for the SDVO-TV/LVDS */
  136. struct drm_property *brightness;
  137. /* Add variable to record current setting for the above property */
  138. u32 left_margin, right_margin, top_margin, bottom_margin;
  139. /* this is to get the range of margin.*/
  140. u32 max_hscan, max_vscan;
  141. u32 max_hpos, cur_hpos;
  142. u32 max_vpos, cur_vpos;
  143. u32 cur_brightness, max_brightness;
  144. u32 cur_contrast, max_contrast;
  145. u32 cur_saturation, max_saturation;
  146. u32 cur_hue, max_hue;
  147. u32 cur_sharpness, max_sharpness;
  148. u32 cur_flicker_filter, max_flicker_filter;
  149. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  150. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  151. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  152. u32 cur_tv_luma_filter, max_tv_luma_filter;
  153. u32 cur_dot_crawl, max_dot_crawl;
  154. };
  155. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  156. {
  157. return container_of(encoder, struct intel_sdvo, base.base);
  158. }
  159. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  160. {
  161. return container_of(intel_attached_encoder(connector),
  162. struct intel_sdvo, base);
  163. }
  164. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  165. {
  166. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  167. }
  168. static bool
  169. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  170. static bool
  171. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  172. struct intel_sdvo_connector *intel_sdvo_connector,
  173. int type);
  174. static bool
  175. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  176. struct intel_sdvo_connector *intel_sdvo_connector);
  177. /**
  178. * Writes the SDVOB or SDVOC with the given value, but always writes both
  179. * SDVOB and SDVOC to work around apparent hardware issues (according to
  180. * comments in the BIOS).
  181. */
  182. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  183. {
  184. struct drm_device *dev = intel_sdvo->base.base.dev;
  185. struct drm_i915_private *dev_priv = dev->dev_private;
  186. u32 bval = val, cval = val;
  187. int i;
  188. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  189. I915_WRITE(intel_sdvo->sdvo_reg, val);
  190. I915_READ(intel_sdvo->sdvo_reg);
  191. return;
  192. }
  193. if (intel_sdvo->sdvo_reg == SDVOB) {
  194. cval = I915_READ(SDVOC);
  195. } else {
  196. bval = I915_READ(SDVOB);
  197. }
  198. /*
  199. * Write the registers twice for luck. Sometimes,
  200. * writing them only once doesn't appear to 'stick'.
  201. * The BIOS does this too. Yay, magic
  202. */
  203. for (i = 0; i < 2; i++)
  204. {
  205. I915_WRITE(SDVOB, bval);
  206. I915_READ(SDVOB);
  207. I915_WRITE(SDVOC, cval);
  208. I915_READ(SDVOC);
  209. }
  210. }
  211. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  212. {
  213. struct i2c_msg msgs[] = {
  214. {
  215. .addr = intel_sdvo->slave_addr,
  216. .flags = 0,
  217. .len = 1,
  218. .buf = &addr,
  219. },
  220. {
  221. .addr = intel_sdvo->slave_addr,
  222. .flags = I2C_M_RD,
  223. .len = 1,
  224. .buf = ch,
  225. }
  226. };
  227. int ret;
  228. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  229. return true;
  230. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  231. return false;
  232. }
  233. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  234. /** Mapping of command numbers to names, for debug output */
  235. static const struct _sdvo_cmd_name {
  236. u8 cmd;
  237. const char *name;
  238. } sdvo_cmd_names[] = {
  239. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  240. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  241. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  242. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  243. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  244. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  245. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  246. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  247. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  248. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  249. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  250. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  251. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  252. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  282. /* Add the op code for SDVO enhancements */
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  327. /* HDMI op code */
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  348. };
  349. #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
  350. #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
  351. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  352. const void *args, int args_len)
  353. {
  354. int i;
  355. DRM_DEBUG_KMS("%s: W: %02X ",
  356. SDVO_NAME(intel_sdvo), cmd);
  357. for (i = 0; i < args_len; i++)
  358. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  359. for (; i < 8; i++)
  360. DRM_LOG_KMS(" ");
  361. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  362. if (cmd == sdvo_cmd_names[i].cmd) {
  363. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  364. break;
  365. }
  366. }
  367. if (i == ARRAY_SIZE(sdvo_cmd_names))
  368. DRM_LOG_KMS("(%02X)", cmd);
  369. DRM_LOG_KMS("\n");
  370. }
  371. static const char *cmd_status_names[] = {
  372. "Power on",
  373. "Success",
  374. "Not supported",
  375. "Invalid arg",
  376. "Pending",
  377. "Target not specified",
  378. "Scaling not supported"
  379. };
  380. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  381. const void *args, int args_len)
  382. {
  383. u8 buf[args_len*2 + 2], status;
  384. struct i2c_msg msgs[args_len + 3];
  385. int i, ret;
  386. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  387. for (i = 0; i < args_len; i++) {
  388. msgs[i].addr = intel_sdvo->slave_addr;
  389. msgs[i].flags = 0;
  390. msgs[i].len = 2;
  391. msgs[i].buf = buf + 2 *i;
  392. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  393. buf[2*i + 1] = ((u8*)args)[i];
  394. }
  395. msgs[i].addr = intel_sdvo->slave_addr;
  396. msgs[i].flags = 0;
  397. msgs[i].len = 2;
  398. msgs[i].buf = buf + 2*i;
  399. buf[2*i + 0] = SDVO_I2C_OPCODE;
  400. buf[2*i + 1] = cmd;
  401. /* the following two are to read the response */
  402. status = SDVO_I2C_CMD_STATUS;
  403. msgs[i+1].addr = intel_sdvo->slave_addr;
  404. msgs[i+1].flags = 0;
  405. msgs[i+1].len = 1;
  406. msgs[i+1].buf = &status;
  407. msgs[i+2].addr = intel_sdvo->slave_addr;
  408. msgs[i+2].flags = I2C_M_RD;
  409. msgs[i+2].len = 1;
  410. msgs[i+2].buf = &status;
  411. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  412. if (ret < 0) {
  413. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  414. return false;
  415. }
  416. if (ret != i+3) {
  417. /* failure in I2C transfer */
  418. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  419. return false;
  420. }
  421. i = 3;
  422. while (status == SDVO_CMD_STATUS_PENDING && i--) {
  423. if (!intel_sdvo_read_byte(intel_sdvo,
  424. SDVO_I2C_CMD_STATUS,
  425. &status))
  426. return false;
  427. }
  428. if (status != SDVO_CMD_STATUS_SUCCESS) {
  429. DRM_DEBUG_KMS("command returns response %s [%d]\n",
  430. status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
  431. status);
  432. return false;
  433. }
  434. return true;
  435. }
  436. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  437. void *response, int response_len)
  438. {
  439. u8 retry = 5;
  440. u8 status;
  441. int i;
  442. /*
  443. * The documentation states that all commands will be
  444. * processed within 15µs, and that we need only poll
  445. * the status byte a maximum of 3 times in order for the
  446. * command to be complete.
  447. *
  448. * Check 5 times in case the hardware failed to read the docs.
  449. */
  450. do {
  451. if (!intel_sdvo_read_byte(intel_sdvo,
  452. SDVO_I2C_CMD_STATUS,
  453. &status))
  454. return false;
  455. } while (status == SDVO_CMD_STATUS_PENDING && --retry);
  456. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  457. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  458. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  459. else
  460. DRM_LOG_KMS("(??? %d)", status);
  461. if (status != SDVO_CMD_STATUS_SUCCESS)
  462. goto log_fail;
  463. /* Read the command response */
  464. for (i = 0; i < response_len; i++) {
  465. if (!intel_sdvo_read_byte(intel_sdvo,
  466. SDVO_I2C_RETURN_0 + i,
  467. &((u8 *)response)[i]))
  468. goto log_fail;
  469. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  470. }
  471. DRM_LOG_KMS("\n");
  472. return true;
  473. log_fail:
  474. DRM_LOG_KMS("\n");
  475. return false;
  476. }
  477. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  478. {
  479. if (mode->clock >= 100000)
  480. return 1;
  481. else if (mode->clock >= 50000)
  482. return 2;
  483. else
  484. return 4;
  485. }
  486. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  487. u8 ddc_bus)
  488. {
  489. return intel_sdvo_write_cmd(intel_sdvo,
  490. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  491. &ddc_bus, 1);
  492. }
  493. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  494. {
  495. return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
  496. }
  497. static bool
  498. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  499. {
  500. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  501. return false;
  502. return intel_sdvo_read_response(intel_sdvo, value, len);
  503. }
  504. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  505. {
  506. struct intel_sdvo_set_target_input_args targets = {0};
  507. return intel_sdvo_set_value(intel_sdvo,
  508. SDVO_CMD_SET_TARGET_INPUT,
  509. &targets, sizeof(targets));
  510. }
  511. /**
  512. * Return whether each input is trained.
  513. *
  514. * This function is making an assumption about the layout of the response,
  515. * which should be checked against the docs.
  516. */
  517. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  518. {
  519. struct intel_sdvo_get_trained_inputs_response response;
  520. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  521. &response, sizeof(response)))
  522. return false;
  523. *input_1 = response.input0_trained;
  524. *input_2 = response.input1_trained;
  525. return true;
  526. }
  527. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  528. u16 outputs)
  529. {
  530. return intel_sdvo_set_value(intel_sdvo,
  531. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  532. &outputs, sizeof(outputs));
  533. }
  534. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  535. int mode)
  536. {
  537. u8 state = SDVO_ENCODER_STATE_ON;
  538. switch (mode) {
  539. case DRM_MODE_DPMS_ON:
  540. state = SDVO_ENCODER_STATE_ON;
  541. break;
  542. case DRM_MODE_DPMS_STANDBY:
  543. state = SDVO_ENCODER_STATE_STANDBY;
  544. break;
  545. case DRM_MODE_DPMS_SUSPEND:
  546. state = SDVO_ENCODER_STATE_SUSPEND;
  547. break;
  548. case DRM_MODE_DPMS_OFF:
  549. state = SDVO_ENCODER_STATE_OFF;
  550. break;
  551. }
  552. return intel_sdvo_set_value(intel_sdvo,
  553. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  554. }
  555. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  556. int *clock_min,
  557. int *clock_max)
  558. {
  559. struct intel_sdvo_pixel_clock_range clocks;
  560. if (!intel_sdvo_get_value(intel_sdvo,
  561. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  562. &clocks, sizeof(clocks)))
  563. return false;
  564. /* Convert the values from units of 10 kHz to kHz. */
  565. *clock_min = clocks.min * 10;
  566. *clock_max = clocks.max * 10;
  567. return true;
  568. }
  569. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  570. u16 outputs)
  571. {
  572. return intel_sdvo_set_value(intel_sdvo,
  573. SDVO_CMD_SET_TARGET_OUTPUT,
  574. &outputs, sizeof(outputs));
  575. }
  576. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  577. struct intel_sdvo_dtd *dtd)
  578. {
  579. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  580. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  581. }
  582. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  583. struct intel_sdvo_dtd *dtd)
  584. {
  585. return intel_sdvo_set_timing(intel_sdvo,
  586. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  587. }
  588. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  589. struct intel_sdvo_dtd *dtd)
  590. {
  591. return intel_sdvo_set_timing(intel_sdvo,
  592. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  593. }
  594. static bool
  595. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  596. uint16_t clock,
  597. uint16_t width,
  598. uint16_t height)
  599. {
  600. struct intel_sdvo_preferred_input_timing_args args;
  601. memset(&args, 0, sizeof(args));
  602. args.clock = clock;
  603. args.width = width;
  604. args.height = height;
  605. args.interlace = 0;
  606. if (intel_sdvo->is_lvds &&
  607. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  608. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  609. args.scaled = 1;
  610. return intel_sdvo_set_value(intel_sdvo,
  611. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  612. &args, sizeof(args));
  613. }
  614. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  615. struct intel_sdvo_dtd *dtd)
  616. {
  617. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  618. &dtd->part1, sizeof(dtd->part1)) &&
  619. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  620. &dtd->part2, sizeof(dtd->part2));
  621. }
  622. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  623. {
  624. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  625. }
  626. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  627. const struct drm_display_mode *mode)
  628. {
  629. uint16_t width, height;
  630. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  631. uint16_t h_sync_offset, v_sync_offset;
  632. width = mode->crtc_hdisplay;
  633. height = mode->crtc_vdisplay;
  634. /* do some mode translations */
  635. h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
  636. h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
  637. v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
  638. v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
  639. h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
  640. v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
  641. dtd->part1.clock = mode->clock / 10;
  642. dtd->part1.h_active = width & 0xff;
  643. dtd->part1.h_blank = h_blank_len & 0xff;
  644. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  645. ((h_blank_len >> 8) & 0xf);
  646. dtd->part1.v_active = height & 0xff;
  647. dtd->part1.v_blank = v_blank_len & 0xff;
  648. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  649. ((v_blank_len >> 8) & 0xf);
  650. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  651. dtd->part2.h_sync_width = h_sync_len & 0xff;
  652. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  653. (v_sync_len & 0xf);
  654. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  655. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  656. ((v_sync_len & 0x30) >> 4);
  657. dtd->part2.dtd_flags = 0x18;
  658. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  659. dtd->part2.dtd_flags |= 0x2;
  660. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  661. dtd->part2.dtd_flags |= 0x4;
  662. dtd->part2.sdvo_flags = 0;
  663. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  664. dtd->part2.reserved = 0;
  665. }
  666. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  667. const struct intel_sdvo_dtd *dtd)
  668. {
  669. mode->hdisplay = dtd->part1.h_active;
  670. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  671. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  672. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  673. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  674. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  675. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  676. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  677. mode->vdisplay = dtd->part1.v_active;
  678. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  679. mode->vsync_start = mode->vdisplay;
  680. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  681. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  682. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  683. mode->vsync_end = mode->vsync_start +
  684. (dtd->part2.v_sync_off_width & 0xf);
  685. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  686. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  687. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  688. mode->clock = dtd->part1.clock * 10;
  689. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  690. if (dtd->part2.dtd_flags & 0x2)
  691. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  692. if (dtd->part2.dtd_flags & 0x4)
  693. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  694. }
  695. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  696. {
  697. struct intel_sdvo_encode encode;
  698. return intel_sdvo_get_value(intel_sdvo,
  699. SDVO_CMD_GET_SUPP_ENCODE,
  700. &encode, sizeof(encode));
  701. }
  702. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  703. uint8_t mode)
  704. {
  705. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  706. }
  707. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  708. uint8_t mode)
  709. {
  710. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  711. }
  712. #if 0
  713. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  714. {
  715. int i, j;
  716. uint8_t set_buf_index[2];
  717. uint8_t av_split;
  718. uint8_t buf_size;
  719. uint8_t buf[48];
  720. uint8_t *pos;
  721. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  722. for (i = 0; i <= av_split; i++) {
  723. set_buf_index[0] = i; set_buf_index[1] = 0;
  724. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  725. set_buf_index, 2);
  726. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  727. intel_sdvo_read_response(encoder, &buf_size, 1);
  728. pos = buf;
  729. for (j = 0; j <= buf_size; j += 8) {
  730. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  731. NULL, 0);
  732. intel_sdvo_read_response(encoder, pos, 8);
  733. pos += 8;
  734. }
  735. }
  736. }
  737. #endif
  738. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  739. {
  740. struct dip_infoframe avi_if = {
  741. .type = DIP_TYPE_AVI,
  742. .ver = DIP_VERSION_AVI,
  743. .len = DIP_LEN_AVI,
  744. };
  745. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  746. uint8_t set_buf_index[2] = { 1, 0 };
  747. uint64_t *data = (uint64_t *)&avi_if;
  748. unsigned i;
  749. intel_dip_infoframe_csum(&avi_if);
  750. if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
  751. set_buf_index, 2))
  752. return false;
  753. for (i = 0; i < sizeof(avi_if); i += 8) {
  754. if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
  755. data, 8))
  756. return false;
  757. data++;
  758. }
  759. return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
  760. &tx_rate, 1);
  761. }
  762. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  763. {
  764. struct intel_sdvo_tv_format format;
  765. uint32_t format_map;
  766. format_map = 1 << intel_sdvo->tv_format_index;
  767. memset(&format, 0, sizeof(format));
  768. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  769. BUILD_BUG_ON(sizeof(format) != 6);
  770. return intel_sdvo_set_value(intel_sdvo,
  771. SDVO_CMD_SET_TV_FORMAT,
  772. &format, sizeof(format));
  773. }
  774. static bool
  775. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  776. struct drm_display_mode *mode)
  777. {
  778. struct intel_sdvo_dtd output_dtd;
  779. if (!intel_sdvo_set_target_output(intel_sdvo,
  780. intel_sdvo->attached_output))
  781. return false;
  782. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  783. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  784. return false;
  785. return true;
  786. }
  787. static bool
  788. intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
  789. struct drm_display_mode *mode,
  790. struct drm_display_mode *adjusted_mode)
  791. {
  792. /* Reset the input timing to the screen. Assume always input 0. */
  793. if (!intel_sdvo_set_target_input(intel_sdvo))
  794. return false;
  795. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  796. mode->clock / 10,
  797. mode->hdisplay,
  798. mode->vdisplay))
  799. return false;
  800. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  801. &intel_sdvo->input_dtd))
  802. return false;
  803. intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
  804. drm_mode_set_crtcinfo(adjusted_mode, 0);
  805. return true;
  806. }
  807. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  808. struct drm_display_mode *mode,
  809. struct drm_display_mode *adjusted_mode)
  810. {
  811. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  812. int multiplier;
  813. /* We need to construct preferred input timings based on our
  814. * output timings. To do that, we have to set the output
  815. * timings, even though this isn't really the right place in
  816. * the sequence to do it. Oh well.
  817. */
  818. if (intel_sdvo->is_tv) {
  819. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  820. return false;
  821. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  822. mode,
  823. adjusted_mode);
  824. } else if (intel_sdvo->is_lvds) {
  825. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  826. intel_sdvo->sdvo_lvds_fixed_mode))
  827. return false;
  828. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  829. mode,
  830. adjusted_mode);
  831. }
  832. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  833. * SDVO device will factor out the multiplier during mode_set.
  834. */
  835. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  836. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  837. return true;
  838. }
  839. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  840. struct drm_display_mode *mode,
  841. struct drm_display_mode *adjusted_mode)
  842. {
  843. struct drm_device *dev = encoder->dev;
  844. struct drm_i915_private *dev_priv = dev->dev_private;
  845. struct drm_crtc *crtc = encoder->crtc;
  846. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  847. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  848. u32 sdvox;
  849. struct intel_sdvo_in_out_map in_out;
  850. struct intel_sdvo_dtd input_dtd;
  851. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  852. int rate;
  853. if (!mode)
  854. return;
  855. /* First, set the input mapping for the first input to our controlled
  856. * output. This is only correct if we're a single-input device, in
  857. * which case the first input is the output from the appropriate SDVO
  858. * channel on the motherboard. In a two-input device, the first input
  859. * will be SDVOB and the second SDVOC.
  860. */
  861. in_out.in0 = intel_sdvo->attached_output;
  862. in_out.in1 = 0;
  863. intel_sdvo_set_value(intel_sdvo,
  864. SDVO_CMD_SET_IN_OUT_MAP,
  865. &in_out, sizeof(in_out));
  866. /* Set the output timings to the screen */
  867. if (!intel_sdvo_set_target_output(intel_sdvo,
  868. intel_sdvo->attached_output))
  869. return;
  870. /* We have tried to get input timing in mode_fixup, and filled into
  871. * adjusted_mode.
  872. */
  873. if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
  874. input_dtd = intel_sdvo->input_dtd;
  875. } else {
  876. /* Set the output timing to the screen */
  877. if (!intel_sdvo_set_target_output(intel_sdvo,
  878. intel_sdvo->attached_output))
  879. return;
  880. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  881. (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
  882. }
  883. /* Set the input timing to the screen. Assume always input 0. */
  884. if (!intel_sdvo_set_target_input(intel_sdvo))
  885. return;
  886. if (intel_sdvo->is_hdmi &&
  887. !intel_sdvo_set_avi_infoframe(intel_sdvo))
  888. return;
  889. if (intel_sdvo->is_tv &&
  890. !intel_sdvo_set_tv_format(intel_sdvo))
  891. return;
  892. (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
  893. switch (pixel_multiplier) {
  894. default:
  895. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  896. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  897. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  898. }
  899. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  900. return;
  901. /* Set the SDVO control regs. */
  902. if (INTEL_INFO(dev)->gen >= 4) {
  903. sdvox = SDVO_BORDER_ENABLE;
  904. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  905. sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
  906. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  907. sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
  908. } else {
  909. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  910. switch (intel_sdvo->sdvo_reg) {
  911. case SDVOB:
  912. sdvox &= SDVOB_PRESERVE_MASK;
  913. break;
  914. case SDVOC:
  915. sdvox &= SDVOC_PRESERVE_MASK;
  916. break;
  917. }
  918. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  919. }
  920. if (intel_crtc->pipe == 1)
  921. sdvox |= SDVO_PIPE_B_SELECT;
  922. if (intel_sdvo->has_audio)
  923. sdvox |= SDVO_AUDIO_ENABLE;
  924. if (INTEL_INFO(dev)->gen >= 4) {
  925. /* done in crtc_mode_set as the dpll_md reg must be written early */
  926. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  927. /* done in crtc_mode_set as it lives inside the dpll register */
  928. } else {
  929. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  930. }
  931. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
  932. sdvox |= SDVO_STALL_SELECT;
  933. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  934. }
  935. static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
  936. {
  937. struct drm_device *dev = encoder->dev;
  938. struct drm_i915_private *dev_priv = dev->dev_private;
  939. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  940. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  941. u32 temp;
  942. if (mode != DRM_MODE_DPMS_ON) {
  943. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  944. if (0)
  945. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  946. if (mode == DRM_MODE_DPMS_OFF) {
  947. temp = I915_READ(intel_sdvo->sdvo_reg);
  948. if ((temp & SDVO_ENABLE) != 0) {
  949. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  950. }
  951. }
  952. } else {
  953. bool input1, input2;
  954. int i;
  955. u8 status;
  956. temp = I915_READ(intel_sdvo->sdvo_reg);
  957. if ((temp & SDVO_ENABLE) == 0)
  958. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  959. for (i = 0; i < 2; i++)
  960. intel_wait_for_vblank(dev, intel_crtc->pipe);
  961. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  962. /* Warn if the device reported failure to sync.
  963. * A lot of SDVO devices fail to notify of sync, but it's
  964. * a given it the status is a success, we succeeded.
  965. */
  966. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  967. DRM_DEBUG_KMS("First %s output reported failure to "
  968. "sync\n", SDVO_NAME(intel_sdvo));
  969. }
  970. if (0)
  971. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  972. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  973. }
  974. return;
  975. }
  976. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  977. struct drm_display_mode *mode)
  978. {
  979. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  980. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  981. return MODE_NO_DBLESCAN;
  982. if (intel_sdvo->pixel_clock_min > mode->clock)
  983. return MODE_CLOCK_LOW;
  984. if (intel_sdvo->pixel_clock_max < mode->clock)
  985. return MODE_CLOCK_HIGH;
  986. if (intel_sdvo->is_lvds) {
  987. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  988. return MODE_PANEL;
  989. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  990. return MODE_PANEL;
  991. }
  992. return MODE_OK;
  993. }
  994. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  995. {
  996. if (!intel_sdvo_get_value(intel_sdvo,
  997. SDVO_CMD_GET_DEVICE_CAPS,
  998. caps, sizeof(*caps)))
  999. return false;
  1000. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1001. " vendor_id: %d\n"
  1002. " device_id: %d\n"
  1003. " device_rev_id: %d\n"
  1004. " sdvo_version_major: %d\n"
  1005. " sdvo_version_minor: %d\n"
  1006. " sdvo_inputs_mask: %d\n"
  1007. " smooth_scaling: %d\n"
  1008. " sharp_scaling: %d\n"
  1009. " up_scaling: %d\n"
  1010. " down_scaling: %d\n"
  1011. " stall_support: %d\n"
  1012. " output_flags: %d\n",
  1013. caps->vendor_id,
  1014. caps->device_id,
  1015. caps->device_rev_id,
  1016. caps->sdvo_version_major,
  1017. caps->sdvo_version_minor,
  1018. caps->sdvo_inputs_mask,
  1019. caps->smooth_scaling,
  1020. caps->sharp_scaling,
  1021. caps->up_scaling,
  1022. caps->down_scaling,
  1023. caps->stall_support,
  1024. caps->output_flags);
  1025. return true;
  1026. }
  1027. /* No use! */
  1028. #if 0
  1029. struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
  1030. {
  1031. struct drm_connector *connector = NULL;
  1032. struct intel_sdvo *iout = NULL;
  1033. struct intel_sdvo *sdvo;
  1034. /* find the sdvo connector */
  1035. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  1036. iout = to_intel_sdvo(connector);
  1037. if (iout->type != INTEL_OUTPUT_SDVO)
  1038. continue;
  1039. sdvo = iout->dev_priv;
  1040. if (sdvo->sdvo_reg == SDVOB && sdvoB)
  1041. return connector;
  1042. if (sdvo->sdvo_reg == SDVOC && !sdvoB)
  1043. return connector;
  1044. }
  1045. return NULL;
  1046. }
  1047. int intel_sdvo_supports_hotplug(struct drm_connector *connector)
  1048. {
  1049. u8 response[2];
  1050. u8 status;
  1051. struct intel_sdvo *intel_sdvo;
  1052. DRM_DEBUG_KMS("\n");
  1053. if (!connector)
  1054. return 0;
  1055. intel_sdvo = to_intel_sdvo(connector);
  1056. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1057. &response, 2) && response[0];
  1058. }
  1059. void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
  1060. {
  1061. u8 response[2];
  1062. u8 status;
  1063. struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
  1064. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
  1065. intel_sdvo_read_response(intel_sdvo, &response, 2);
  1066. if (on) {
  1067. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
  1068. status = intel_sdvo_read_response(intel_sdvo, &response, 2);
  1069. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
  1070. } else {
  1071. response[0] = 0;
  1072. response[1] = 0;
  1073. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
  1074. }
  1075. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
  1076. intel_sdvo_read_response(intel_sdvo, &response, 2);
  1077. }
  1078. #endif
  1079. static bool
  1080. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1081. {
  1082. int caps = 0;
  1083. if (intel_sdvo->caps.output_flags &
  1084. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
  1085. caps++;
  1086. if (intel_sdvo->caps.output_flags &
  1087. (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
  1088. caps++;
  1089. if (intel_sdvo->caps.output_flags &
  1090. (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
  1091. caps++;
  1092. if (intel_sdvo->caps.output_flags &
  1093. (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
  1094. caps++;
  1095. if (intel_sdvo->caps.output_flags &
  1096. (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
  1097. caps++;
  1098. if (intel_sdvo->caps.output_flags &
  1099. (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
  1100. caps++;
  1101. if (intel_sdvo->caps.output_flags &
  1102. (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
  1103. caps++;
  1104. return (caps > 1);
  1105. }
  1106. static struct edid *
  1107. intel_sdvo_get_edid(struct drm_connector *connector)
  1108. {
  1109. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1110. return drm_get_edid(connector, &sdvo->ddc);
  1111. }
  1112. static struct drm_connector *
  1113. intel_find_analog_connector(struct drm_device *dev)
  1114. {
  1115. struct drm_connector *connector;
  1116. struct intel_sdvo *encoder;
  1117. list_for_each_entry(encoder,
  1118. &dev->mode_config.encoder_list,
  1119. base.base.head) {
  1120. if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
  1121. list_for_each_entry(connector,
  1122. &dev->mode_config.connector_list,
  1123. head) {
  1124. if (&encoder->base ==
  1125. intel_attached_encoder(connector))
  1126. return connector;
  1127. }
  1128. }
  1129. }
  1130. return NULL;
  1131. }
  1132. static int
  1133. intel_analog_is_connected(struct drm_device *dev)
  1134. {
  1135. struct drm_connector *analog_connector;
  1136. analog_connector = intel_find_analog_connector(dev);
  1137. if (!analog_connector)
  1138. return false;
  1139. if (analog_connector->funcs->detect(analog_connector, false) ==
  1140. connector_status_disconnected)
  1141. return false;
  1142. return true;
  1143. }
  1144. /* Mac mini hack -- use the same DDC as the analog connector */
  1145. static struct edid *
  1146. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1147. {
  1148. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1149. if (!intel_analog_is_connected(connector->dev))
  1150. return NULL;
  1151. return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
  1152. }
  1153. enum drm_connector_status
  1154. intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
  1155. {
  1156. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1157. enum drm_connector_status status;
  1158. struct edid *edid;
  1159. edid = intel_sdvo_get_edid(connector);
  1160. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1161. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1162. /*
  1163. * Don't use the 1 as the argument of DDC bus switch to get
  1164. * the EDID. It is used for SDVO SPD ROM.
  1165. */
  1166. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1167. intel_sdvo->ddc_bus = ddc;
  1168. edid = intel_sdvo_get_edid(connector);
  1169. if (edid)
  1170. break;
  1171. }
  1172. /*
  1173. * If we found the EDID on the other bus,
  1174. * assume that is the correct DDC bus.
  1175. */
  1176. if (edid == NULL)
  1177. intel_sdvo->ddc_bus = saved_ddc;
  1178. }
  1179. /*
  1180. * When there is no edid and no monitor is connected with VGA
  1181. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1182. */
  1183. if (edid == NULL)
  1184. edid = intel_sdvo_get_analog_edid(connector);
  1185. status = connector_status_unknown;
  1186. if (edid != NULL) {
  1187. /* DDC bus is shared, match EDID to connector type */
  1188. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1189. status = connector_status_connected;
  1190. intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
  1191. intel_sdvo->has_audio = drm_detect_monitor_audio(edid);
  1192. }
  1193. connector->display_info.raw_edid = NULL;
  1194. kfree(edid);
  1195. }
  1196. if (status == connector_status_connected) {
  1197. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1198. if (intel_sdvo_connector->force_audio)
  1199. intel_sdvo->has_audio = intel_sdvo_connector->force_audio > 0;
  1200. }
  1201. return status;
  1202. }
  1203. static enum drm_connector_status
  1204. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1205. {
  1206. uint16_t response;
  1207. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1208. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1209. enum drm_connector_status ret;
  1210. if (!intel_sdvo_write_cmd(intel_sdvo,
  1211. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1212. return connector_status_unknown;
  1213. if (intel_sdvo->is_tv) {
  1214. /* add 30ms delay when the output type is SDVO-TV */
  1215. mdelay(30);
  1216. }
  1217. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1218. return connector_status_unknown;
  1219. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1220. response & 0xff, response >> 8,
  1221. intel_sdvo_connector->output_flag);
  1222. if (response == 0)
  1223. return connector_status_disconnected;
  1224. intel_sdvo->attached_output = response;
  1225. if ((intel_sdvo_connector->output_flag & response) == 0)
  1226. ret = connector_status_disconnected;
  1227. else if (response & SDVO_TMDS_MASK)
  1228. ret = intel_sdvo_hdmi_sink_detect(connector);
  1229. else
  1230. ret = connector_status_connected;
  1231. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1232. if (ret == connector_status_connected) {
  1233. intel_sdvo->is_tv = false;
  1234. intel_sdvo->is_lvds = false;
  1235. intel_sdvo->base.needs_tv_clock = false;
  1236. if (response & SDVO_TV_MASK) {
  1237. intel_sdvo->is_tv = true;
  1238. intel_sdvo->base.needs_tv_clock = true;
  1239. }
  1240. if (response & SDVO_LVDS_MASK)
  1241. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1242. }
  1243. return ret;
  1244. }
  1245. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1246. {
  1247. struct edid *edid;
  1248. /* set the bus switch and get the modes */
  1249. edid = intel_sdvo_get_edid(connector);
  1250. /*
  1251. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1252. * link between analog and digital outputs. So, if the regular SDVO
  1253. * DDC fails, check to see if the analog output is disconnected, in
  1254. * which case we'll look there for the digital DDC data.
  1255. */
  1256. if (edid == NULL)
  1257. edid = intel_sdvo_get_analog_edid(connector);
  1258. if (edid != NULL) {
  1259. drm_mode_connector_update_edid_property(connector, edid);
  1260. drm_add_edid_modes(connector, edid);
  1261. connector->display_info.raw_edid = NULL;
  1262. kfree(edid);
  1263. }
  1264. }
  1265. /*
  1266. * Set of SDVO TV modes.
  1267. * Note! This is in reply order (see loop in get_tv_modes).
  1268. * XXX: all 60Hz refresh?
  1269. */
  1270. struct drm_display_mode sdvo_tv_modes[] = {
  1271. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1272. 416, 0, 200, 201, 232, 233, 0,
  1273. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1274. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1275. 416, 0, 240, 241, 272, 273, 0,
  1276. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1277. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1278. 496, 0, 300, 301, 332, 333, 0,
  1279. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1280. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1281. 736, 0, 350, 351, 382, 383, 0,
  1282. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1283. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1284. 736, 0, 400, 401, 432, 433, 0,
  1285. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1286. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1287. 736, 0, 480, 481, 512, 513, 0,
  1288. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1289. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1290. 800, 0, 480, 481, 512, 513, 0,
  1291. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1292. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1293. 800, 0, 576, 577, 608, 609, 0,
  1294. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1295. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1296. 816, 0, 350, 351, 382, 383, 0,
  1297. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1298. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1299. 816, 0, 400, 401, 432, 433, 0,
  1300. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1301. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1302. 816, 0, 480, 481, 512, 513, 0,
  1303. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1304. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1305. 816, 0, 540, 541, 572, 573, 0,
  1306. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1307. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1308. 816, 0, 576, 577, 608, 609, 0,
  1309. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1310. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1311. 864, 0, 576, 577, 608, 609, 0,
  1312. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1313. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1314. 896, 0, 600, 601, 632, 633, 0,
  1315. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1316. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1317. 928, 0, 624, 625, 656, 657, 0,
  1318. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1319. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1320. 1016, 0, 766, 767, 798, 799, 0,
  1321. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1322. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1323. 1120, 0, 768, 769, 800, 801, 0,
  1324. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1325. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1326. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1327. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1328. };
  1329. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1330. {
  1331. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1332. struct intel_sdvo_sdtv_resolution_request tv_res;
  1333. uint32_t reply = 0, format_map = 0;
  1334. int i;
  1335. /* Read the list of supported input resolutions for the selected TV
  1336. * format.
  1337. */
  1338. format_map = 1 << intel_sdvo->tv_format_index;
  1339. memcpy(&tv_res, &format_map,
  1340. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1341. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1342. return;
  1343. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1344. if (!intel_sdvo_write_cmd(intel_sdvo,
  1345. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1346. &tv_res, sizeof(tv_res)))
  1347. return;
  1348. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1349. return;
  1350. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1351. if (reply & (1 << i)) {
  1352. struct drm_display_mode *nmode;
  1353. nmode = drm_mode_duplicate(connector->dev,
  1354. &sdvo_tv_modes[i]);
  1355. if (nmode)
  1356. drm_mode_probed_add(connector, nmode);
  1357. }
  1358. }
  1359. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1360. {
  1361. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1362. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1363. struct drm_display_mode *newmode;
  1364. /*
  1365. * Attempt to get the mode list from DDC.
  1366. * Assume that the preferred modes are
  1367. * arranged in priority order.
  1368. */
  1369. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1370. if (list_empty(&connector->probed_modes) == false)
  1371. goto end;
  1372. /* Fetch modes from VBT */
  1373. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1374. newmode = drm_mode_duplicate(connector->dev,
  1375. dev_priv->sdvo_lvds_vbt_mode);
  1376. if (newmode != NULL) {
  1377. /* Guarantee the mode is preferred */
  1378. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1379. DRM_MODE_TYPE_DRIVER);
  1380. drm_mode_probed_add(connector, newmode);
  1381. }
  1382. }
  1383. end:
  1384. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1385. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1386. intel_sdvo->sdvo_lvds_fixed_mode =
  1387. drm_mode_duplicate(connector->dev, newmode);
  1388. drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
  1389. 0);
  1390. intel_sdvo->is_lvds = true;
  1391. break;
  1392. }
  1393. }
  1394. }
  1395. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1396. {
  1397. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1398. if (IS_TV(intel_sdvo_connector))
  1399. intel_sdvo_get_tv_modes(connector);
  1400. else if (IS_LVDS(intel_sdvo_connector))
  1401. intel_sdvo_get_lvds_modes(connector);
  1402. else
  1403. intel_sdvo_get_ddc_modes(connector);
  1404. return !list_empty(&connector->probed_modes);
  1405. }
  1406. static void
  1407. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1408. {
  1409. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1410. struct drm_device *dev = connector->dev;
  1411. if (intel_sdvo_connector->left)
  1412. drm_property_destroy(dev, intel_sdvo_connector->left);
  1413. if (intel_sdvo_connector->right)
  1414. drm_property_destroy(dev, intel_sdvo_connector->right);
  1415. if (intel_sdvo_connector->top)
  1416. drm_property_destroy(dev, intel_sdvo_connector->top);
  1417. if (intel_sdvo_connector->bottom)
  1418. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1419. if (intel_sdvo_connector->hpos)
  1420. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1421. if (intel_sdvo_connector->vpos)
  1422. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1423. if (intel_sdvo_connector->saturation)
  1424. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1425. if (intel_sdvo_connector->contrast)
  1426. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1427. if (intel_sdvo_connector->hue)
  1428. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1429. if (intel_sdvo_connector->sharpness)
  1430. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1431. if (intel_sdvo_connector->flicker_filter)
  1432. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1433. if (intel_sdvo_connector->flicker_filter_2d)
  1434. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1435. if (intel_sdvo_connector->flicker_filter_adaptive)
  1436. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1437. if (intel_sdvo_connector->tv_luma_filter)
  1438. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1439. if (intel_sdvo_connector->tv_chroma_filter)
  1440. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1441. if (intel_sdvo_connector->dot_crawl)
  1442. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1443. if (intel_sdvo_connector->brightness)
  1444. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1445. }
  1446. static void intel_sdvo_destroy(struct drm_connector *connector)
  1447. {
  1448. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1449. if (intel_sdvo_connector->tv_format)
  1450. drm_property_destroy(connector->dev,
  1451. intel_sdvo_connector->tv_format);
  1452. intel_sdvo_destroy_enhance_property(connector);
  1453. drm_sysfs_connector_remove(connector);
  1454. drm_connector_cleanup(connector);
  1455. kfree(connector);
  1456. }
  1457. static int
  1458. intel_sdvo_set_property(struct drm_connector *connector,
  1459. struct drm_property *property,
  1460. uint64_t val)
  1461. {
  1462. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1463. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1464. uint16_t temp_value;
  1465. uint8_t cmd;
  1466. int ret;
  1467. ret = drm_connector_property_set_value(connector, property, val);
  1468. if (ret)
  1469. return ret;
  1470. if (property == intel_sdvo_connector->force_audio_property) {
  1471. if (val == intel_sdvo_connector->force_audio)
  1472. return 0;
  1473. intel_sdvo_connector->force_audio = val;
  1474. if (val > 0 && intel_sdvo->has_audio)
  1475. return 0;
  1476. if (val < 0 && !intel_sdvo->has_audio)
  1477. return 0;
  1478. intel_sdvo->has_audio = val > 0;
  1479. goto done;
  1480. }
  1481. #define CHECK_PROPERTY(name, NAME) \
  1482. if (intel_sdvo_connector->name == property) { \
  1483. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1484. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1485. cmd = SDVO_CMD_SET_##NAME; \
  1486. intel_sdvo_connector->cur_##name = temp_value; \
  1487. goto set_value; \
  1488. }
  1489. if (property == intel_sdvo_connector->tv_format) {
  1490. if (val >= TV_FORMAT_NUM)
  1491. return -EINVAL;
  1492. if (intel_sdvo->tv_format_index ==
  1493. intel_sdvo_connector->tv_format_supported[val])
  1494. return 0;
  1495. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1496. goto done;
  1497. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1498. temp_value = val;
  1499. if (intel_sdvo_connector->left == property) {
  1500. drm_connector_property_set_value(connector,
  1501. intel_sdvo_connector->right, val);
  1502. if (intel_sdvo_connector->left_margin == temp_value)
  1503. return 0;
  1504. intel_sdvo_connector->left_margin = temp_value;
  1505. intel_sdvo_connector->right_margin = temp_value;
  1506. temp_value = intel_sdvo_connector->max_hscan -
  1507. intel_sdvo_connector->left_margin;
  1508. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1509. goto set_value;
  1510. } else if (intel_sdvo_connector->right == property) {
  1511. drm_connector_property_set_value(connector,
  1512. intel_sdvo_connector->left, val);
  1513. if (intel_sdvo_connector->right_margin == temp_value)
  1514. return 0;
  1515. intel_sdvo_connector->left_margin = temp_value;
  1516. intel_sdvo_connector->right_margin = temp_value;
  1517. temp_value = intel_sdvo_connector->max_hscan -
  1518. intel_sdvo_connector->left_margin;
  1519. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1520. goto set_value;
  1521. } else if (intel_sdvo_connector->top == property) {
  1522. drm_connector_property_set_value(connector,
  1523. intel_sdvo_connector->bottom, val);
  1524. if (intel_sdvo_connector->top_margin == temp_value)
  1525. return 0;
  1526. intel_sdvo_connector->top_margin = temp_value;
  1527. intel_sdvo_connector->bottom_margin = temp_value;
  1528. temp_value = intel_sdvo_connector->max_vscan -
  1529. intel_sdvo_connector->top_margin;
  1530. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1531. goto set_value;
  1532. } else if (intel_sdvo_connector->bottom == property) {
  1533. drm_connector_property_set_value(connector,
  1534. intel_sdvo_connector->top, val);
  1535. if (intel_sdvo_connector->bottom_margin == temp_value)
  1536. return 0;
  1537. intel_sdvo_connector->top_margin = temp_value;
  1538. intel_sdvo_connector->bottom_margin = temp_value;
  1539. temp_value = intel_sdvo_connector->max_vscan -
  1540. intel_sdvo_connector->top_margin;
  1541. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1542. goto set_value;
  1543. }
  1544. CHECK_PROPERTY(hpos, HPOS)
  1545. CHECK_PROPERTY(vpos, VPOS)
  1546. CHECK_PROPERTY(saturation, SATURATION)
  1547. CHECK_PROPERTY(contrast, CONTRAST)
  1548. CHECK_PROPERTY(hue, HUE)
  1549. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1550. CHECK_PROPERTY(sharpness, SHARPNESS)
  1551. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1552. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1553. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1554. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1555. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1556. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1557. }
  1558. return -EINVAL; /* unknown property */
  1559. set_value:
  1560. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1561. return -EIO;
  1562. done:
  1563. if (intel_sdvo->base.base.crtc) {
  1564. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1565. drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
  1566. crtc->y, crtc->fb);
  1567. }
  1568. return 0;
  1569. #undef CHECK_PROPERTY
  1570. }
  1571. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1572. .dpms = intel_sdvo_dpms,
  1573. .mode_fixup = intel_sdvo_mode_fixup,
  1574. .prepare = intel_encoder_prepare,
  1575. .mode_set = intel_sdvo_mode_set,
  1576. .commit = intel_encoder_commit,
  1577. };
  1578. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1579. .dpms = drm_helper_connector_dpms,
  1580. .detect = intel_sdvo_detect,
  1581. .fill_modes = drm_helper_probe_single_connector_modes,
  1582. .set_property = intel_sdvo_set_property,
  1583. .destroy = intel_sdvo_destroy,
  1584. };
  1585. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1586. .get_modes = intel_sdvo_get_modes,
  1587. .mode_valid = intel_sdvo_mode_valid,
  1588. .best_encoder = intel_best_encoder,
  1589. };
  1590. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1591. {
  1592. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1593. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1594. drm_mode_destroy(encoder->dev,
  1595. intel_sdvo->sdvo_lvds_fixed_mode);
  1596. i2c_del_adapter(&intel_sdvo->ddc);
  1597. intel_encoder_destroy(encoder);
  1598. }
  1599. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1600. .destroy = intel_sdvo_enc_destroy,
  1601. };
  1602. static void
  1603. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1604. {
  1605. uint16_t mask = 0;
  1606. unsigned int num_bits;
  1607. /* Make a mask of outputs less than or equal to our own priority in the
  1608. * list.
  1609. */
  1610. switch (sdvo->controlled_output) {
  1611. case SDVO_OUTPUT_LVDS1:
  1612. mask |= SDVO_OUTPUT_LVDS1;
  1613. case SDVO_OUTPUT_LVDS0:
  1614. mask |= SDVO_OUTPUT_LVDS0;
  1615. case SDVO_OUTPUT_TMDS1:
  1616. mask |= SDVO_OUTPUT_TMDS1;
  1617. case SDVO_OUTPUT_TMDS0:
  1618. mask |= SDVO_OUTPUT_TMDS0;
  1619. case SDVO_OUTPUT_RGB1:
  1620. mask |= SDVO_OUTPUT_RGB1;
  1621. case SDVO_OUTPUT_RGB0:
  1622. mask |= SDVO_OUTPUT_RGB0;
  1623. break;
  1624. }
  1625. /* Count bits to find what number we are in the priority list. */
  1626. mask &= sdvo->caps.output_flags;
  1627. num_bits = hweight16(mask);
  1628. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1629. if (num_bits > 3)
  1630. num_bits = 3;
  1631. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1632. sdvo->ddc_bus = 1 << num_bits;
  1633. }
  1634. /**
  1635. * Choose the appropriate DDC bus for control bus switch command for this
  1636. * SDVO output based on the controlled output.
  1637. *
  1638. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1639. * outputs, then LVDS outputs.
  1640. */
  1641. static void
  1642. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1643. struct intel_sdvo *sdvo, u32 reg)
  1644. {
  1645. struct sdvo_device_mapping *mapping;
  1646. if (IS_SDVOB(reg))
  1647. mapping = &(dev_priv->sdvo_mappings[0]);
  1648. else
  1649. mapping = &(dev_priv->sdvo_mappings[1]);
  1650. if (mapping->initialized)
  1651. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1652. else
  1653. intel_sdvo_guess_ddc_bus(sdvo);
  1654. }
  1655. static void
  1656. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1657. struct intel_sdvo *sdvo, u32 reg)
  1658. {
  1659. struct sdvo_device_mapping *mapping;
  1660. u8 pin, speed;
  1661. if (IS_SDVOB(reg))
  1662. mapping = &dev_priv->sdvo_mappings[0];
  1663. else
  1664. mapping = &dev_priv->sdvo_mappings[1];
  1665. pin = GMBUS_PORT_DPB;
  1666. speed = GMBUS_RATE_1MHZ >> 8;
  1667. if (mapping->initialized) {
  1668. pin = mapping->i2c_pin;
  1669. speed = mapping->i2c_speed;
  1670. }
  1671. sdvo->i2c = &dev_priv->gmbus[pin].adapter;
  1672. intel_gmbus_set_speed(sdvo->i2c, speed);
  1673. intel_gmbus_force_bit(sdvo->i2c, true);
  1674. }
  1675. static bool
  1676. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1677. {
  1678. int is_hdmi;
  1679. if (!intel_sdvo_check_supp_encode(intel_sdvo))
  1680. return false;
  1681. if (!intel_sdvo_set_target_output(intel_sdvo,
  1682. device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1))
  1683. return false;
  1684. is_hdmi = 0;
  1685. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE, &is_hdmi, 1))
  1686. return false;
  1687. return !!is_hdmi;
  1688. }
  1689. static u8
  1690. intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
  1691. {
  1692. struct drm_i915_private *dev_priv = dev->dev_private;
  1693. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1694. if (IS_SDVOB(sdvo_reg)) {
  1695. my_mapping = &dev_priv->sdvo_mappings[0];
  1696. other_mapping = &dev_priv->sdvo_mappings[1];
  1697. } else {
  1698. my_mapping = &dev_priv->sdvo_mappings[1];
  1699. other_mapping = &dev_priv->sdvo_mappings[0];
  1700. }
  1701. /* If the BIOS described our SDVO device, take advantage of it. */
  1702. if (my_mapping->slave_addr)
  1703. return my_mapping->slave_addr;
  1704. /* If the BIOS only described a different SDVO device, use the
  1705. * address that it isn't using.
  1706. */
  1707. if (other_mapping->slave_addr) {
  1708. if (other_mapping->slave_addr == 0x70)
  1709. return 0x72;
  1710. else
  1711. return 0x70;
  1712. }
  1713. /* No SDVO device info is found for another DVO port,
  1714. * so use mapping assumption we had before BIOS parsing.
  1715. */
  1716. if (IS_SDVOB(sdvo_reg))
  1717. return 0x70;
  1718. else
  1719. return 0x72;
  1720. }
  1721. static void
  1722. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1723. struct intel_sdvo *encoder)
  1724. {
  1725. drm_connector_init(encoder->base.base.dev,
  1726. &connector->base.base,
  1727. &intel_sdvo_connector_funcs,
  1728. connector->base.base.connector_type);
  1729. drm_connector_helper_add(&connector->base.base,
  1730. &intel_sdvo_connector_helper_funcs);
  1731. connector->base.base.interlace_allowed = 0;
  1732. connector->base.base.doublescan_allowed = 0;
  1733. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1734. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1735. drm_sysfs_connector_add(&connector->base.base);
  1736. }
  1737. static void
  1738. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1739. {
  1740. struct drm_device *dev = connector->base.base.dev;
  1741. connector->force_audio_property =
  1742. drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
  1743. if (connector->force_audio_property) {
  1744. connector->force_audio_property->values[0] = -1;
  1745. connector->force_audio_property->values[1] = 1;
  1746. drm_connector_attach_property(&connector->base.base,
  1747. connector->force_audio_property, 0);
  1748. }
  1749. }
  1750. static bool
  1751. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1752. {
  1753. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1754. struct drm_connector *connector;
  1755. struct intel_connector *intel_connector;
  1756. struct intel_sdvo_connector *intel_sdvo_connector;
  1757. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1758. if (!intel_sdvo_connector)
  1759. return false;
  1760. if (device == 0) {
  1761. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1762. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1763. } else if (device == 1) {
  1764. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1765. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1766. }
  1767. intel_connector = &intel_sdvo_connector->base;
  1768. connector = &intel_connector->base;
  1769. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1770. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1771. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1772. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1773. /* enable hdmi encoding mode if supported */
  1774. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  1775. intel_sdvo_set_colorimetry(intel_sdvo,
  1776. SDVO_COLORIMETRY_RGB256);
  1777. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1778. intel_sdvo->is_hdmi = true;
  1779. }
  1780. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1781. (1 << INTEL_ANALOG_CLONE_BIT));
  1782. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1783. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1784. return true;
  1785. }
  1786. static bool
  1787. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1788. {
  1789. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1790. struct drm_connector *connector;
  1791. struct intel_connector *intel_connector;
  1792. struct intel_sdvo_connector *intel_sdvo_connector;
  1793. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1794. if (!intel_sdvo_connector)
  1795. return false;
  1796. intel_connector = &intel_sdvo_connector->base;
  1797. connector = &intel_connector->base;
  1798. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1799. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1800. intel_sdvo->controlled_output |= type;
  1801. intel_sdvo_connector->output_flag = type;
  1802. intel_sdvo->is_tv = true;
  1803. intel_sdvo->base.needs_tv_clock = true;
  1804. intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
  1805. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1806. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1807. goto err;
  1808. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1809. goto err;
  1810. return true;
  1811. err:
  1812. intel_sdvo_destroy(connector);
  1813. return false;
  1814. }
  1815. static bool
  1816. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1817. {
  1818. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1819. struct drm_connector *connector;
  1820. struct intel_connector *intel_connector;
  1821. struct intel_sdvo_connector *intel_sdvo_connector;
  1822. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1823. if (!intel_sdvo_connector)
  1824. return false;
  1825. intel_connector = &intel_sdvo_connector->base;
  1826. connector = &intel_connector->base;
  1827. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1828. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1829. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1830. if (device == 0) {
  1831. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1832. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1833. } else if (device == 1) {
  1834. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1835. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1836. }
  1837. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1838. (1 << INTEL_ANALOG_CLONE_BIT));
  1839. intel_sdvo_connector_init(intel_sdvo_connector,
  1840. intel_sdvo);
  1841. return true;
  1842. }
  1843. static bool
  1844. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1845. {
  1846. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1847. struct drm_connector *connector;
  1848. struct intel_connector *intel_connector;
  1849. struct intel_sdvo_connector *intel_sdvo_connector;
  1850. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1851. if (!intel_sdvo_connector)
  1852. return false;
  1853. intel_connector = &intel_sdvo_connector->base;
  1854. connector = &intel_connector->base;
  1855. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1856. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1857. if (device == 0) {
  1858. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1859. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1860. } else if (device == 1) {
  1861. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1862. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1863. }
  1864. intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
  1865. (1 << INTEL_SDVO_LVDS_CLONE_BIT));
  1866. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1867. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1868. goto err;
  1869. return true;
  1870. err:
  1871. intel_sdvo_destroy(connector);
  1872. return false;
  1873. }
  1874. static bool
  1875. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1876. {
  1877. intel_sdvo->is_tv = false;
  1878. intel_sdvo->base.needs_tv_clock = false;
  1879. intel_sdvo->is_lvds = false;
  1880. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1881. if (flags & SDVO_OUTPUT_TMDS0)
  1882. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1883. return false;
  1884. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1885. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1886. return false;
  1887. /* TV has no XXX1 function block */
  1888. if (flags & SDVO_OUTPUT_SVID0)
  1889. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1890. return false;
  1891. if (flags & SDVO_OUTPUT_CVBS0)
  1892. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1893. return false;
  1894. if (flags & SDVO_OUTPUT_RGB0)
  1895. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1896. return false;
  1897. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1898. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1899. return false;
  1900. if (flags & SDVO_OUTPUT_LVDS0)
  1901. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1902. return false;
  1903. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1904. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1905. return false;
  1906. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1907. unsigned char bytes[2];
  1908. intel_sdvo->controlled_output = 0;
  1909. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1910. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1911. SDVO_NAME(intel_sdvo),
  1912. bytes[0], bytes[1]);
  1913. return false;
  1914. }
  1915. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
  1916. return true;
  1917. }
  1918. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  1919. struct intel_sdvo_connector *intel_sdvo_connector,
  1920. int type)
  1921. {
  1922. struct drm_device *dev = intel_sdvo->base.base.dev;
  1923. struct intel_sdvo_tv_format format;
  1924. uint32_t format_map, i;
  1925. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  1926. return false;
  1927. if (!intel_sdvo_get_value(intel_sdvo,
  1928. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  1929. &format, sizeof(format)))
  1930. return false;
  1931. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  1932. if (format_map == 0)
  1933. return false;
  1934. intel_sdvo_connector->format_supported_num = 0;
  1935. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  1936. if (format_map & (1 << i))
  1937. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  1938. intel_sdvo_connector->tv_format =
  1939. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  1940. "mode", intel_sdvo_connector->format_supported_num);
  1941. if (!intel_sdvo_connector->tv_format)
  1942. return false;
  1943. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  1944. drm_property_add_enum(
  1945. intel_sdvo_connector->tv_format, i,
  1946. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  1947. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  1948. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  1949. intel_sdvo_connector->tv_format, 0);
  1950. return true;
  1951. }
  1952. #define ENHANCEMENT(name, NAME) do { \
  1953. if (enhancements.name) { \
  1954. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  1955. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  1956. return false; \
  1957. intel_sdvo_connector->max_##name = data_value[0]; \
  1958. intel_sdvo_connector->cur_##name = response; \
  1959. intel_sdvo_connector->name = \
  1960. drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
  1961. if (!intel_sdvo_connector->name) return false; \
  1962. intel_sdvo_connector->name->values[0] = 0; \
  1963. intel_sdvo_connector->name->values[1] = data_value[0]; \
  1964. drm_connector_attach_property(connector, \
  1965. intel_sdvo_connector->name, \
  1966. intel_sdvo_connector->cur_##name); \
  1967. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  1968. data_value[0], data_value[1], response); \
  1969. } \
  1970. } while(0)
  1971. static bool
  1972. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  1973. struct intel_sdvo_connector *intel_sdvo_connector,
  1974. struct intel_sdvo_enhancements_reply enhancements)
  1975. {
  1976. struct drm_device *dev = intel_sdvo->base.base.dev;
  1977. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  1978. uint16_t response, data_value[2];
  1979. /* when horizontal overscan is supported, Add the left/right property */
  1980. if (enhancements.overscan_h) {
  1981. if (!intel_sdvo_get_value(intel_sdvo,
  1982. SDVO_CMD_GET_MAX_OVERSCAN_H,
  1983. &data_value, 4))
  1984. return false;
  1985. if (!intel_sdvo_get_value(intel_sdvo,
  1986. SDVO_CMD_GET_OVERSCAN_H,
  1987. &response, 2))
  1988. return false;
  1989. intel_sdvo_connector->max_hscan = data_value[0];
  1990. intel_sdvo_connector->left_margin = data_value[0] - response;
  1991. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  1992. intel_sdvo_connector->left =
  1993. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  1994. "left_margin", 2);
  1995. if (!intel_sdvo_connector->left)
  1996. return false;
  1997. intel_sdvo_connector->left->values[0] = 0;
  1998. intel_sdvo_connector->left->values[1] = data_value[0];
  1999. drm_connector_attach_property(connector,
  2000. intel_sdvo_connector->left,
  2001. intel_sdvo_connector->left_margin);
  2002. intel_sdvo_connector->right =
  2003. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2004. "right_margin", 2);
  2005. if (!intel_sdvo_connector->right)
  2006. return false;
  2007. intel_sdvo_connector->right->values[0] = 0;
  2008. intel_sdvo_connector->right->values[1] = data_value[0];
  2009. drm_connector_attach_property(connector,
  2010. intel_sdvo_connector->right,
  2011. intel_sdvo_connector->right_margin);
  2012. DRM_DEBUG_KMS("h_overscan: max %d, "
  2013. "default %d, current %d\n",
  2014. data_value[0], data_value[1], response);
  2015. }
  2016. if (enhancements.overscan_v) {
  2017. if (!intel_sdvo_get_value(intel_sdvo,
  2018. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2019. &data_value, 4))
  2020. return false;
  2021. if (!intel_sdvo_get_value(intel_sdvo,
  2022. SDVO_CMD_GET_OVERSCAN_V,
  2023. &response, 2))
  2024. return false;
  2025. intel_sdvo_connector->max_vscan = data_value[0];
  2026. intel_sdvo_connector->top_margin = data_value[0] - response;
  2027. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2028. intel_sdvo_connector->top =
  2029. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2030. "top_margin", 2);
  2031. if (!intel_sdvo_connector->top)
  2032. return false;
  2033. intel_sdvo_connector->top->values[0] = 0;
  2034. intel_sdvo_connector->top->values[1] = data_value[0];
  2035. drm_connector_attach_property(connector,
  2036. intel_sdvo_connector->top,
  2037. intel_sdvo_connector->top_margin);
  2038. intel_sdvo_connector->bottom =
  2039. drm_property_create(dev, DRM_MODE_PROP_RANGE,
  2040. "bottom_margin", 2);
  2041. if (!intel_sdvo_connector->bottom)
  2042. return false;
  2043. intel_sdvo_connector->bottom->values[0] = 0;
  2044. intel_sdvo_connector->bottom->values[1] = data_value[0];
  2045. drm_connector_attach_property(connector,
  2046. intel_sdvo_connector->bottom,
  2047. intel_sdvo_connector->bottom_margin);
  2048. DRM_DEBUG_KMS("v_overscan: max %d, "
  2049. "default %d, current %d\n",
  2050. data_value[0], data_value[1], response);
  2051. }
  2052. ENHANCEMENT(hpos, HPOS);
  2053. ENHANCEMENT(vpos, VPOS);
  2054. ENHANCEMENT(saturation, SATURATION);
  2055. ENHANCEMENT(contrast, CONTRAST);
  2056. ENHANCEMENT(hue, HUE);
  2057. ENHANCEMENT(sharpness, SHARPNESS);
  2058. ENHANCEMENT(brightness, BRIGHTNESS);
  2059. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2060. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2061. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2062. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2063. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2064. if (enhancements.dot_crawl) {
  2065. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2066. return false;
  2067. intel_sdvo_connector->max_dot_crawl = 1;
  2068. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2069. intel_sdvo_connector->dot_crawl =
  2070. drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
  2071. if (!intel_sdvo_connector->dot_crawl)
  2072. return false;
  2073. intel_sdvo_connector->dot_crawl->values[0] = 0;
  2074. intel_sdvo_connector->dot_crawl->values[1] = 1;
  2075. drm_connector_attach_property(connector,
  2076. intel_sdvo_connector->dot_crawl,
  2077. intel_sdvo_connector->cur_dot_crawl);
  2078. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2079. }
  2080. return true;
  2081. }
  2082. static bool
  2083. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2084. struct intel_sdvo_connector *intel_sdvo_connector,
  2085. struct intel_sdvo_enhancements_reply enhancements)
  2086. {
  2087. struct drm_device *dev = intel_sdvo->base.base.dev;
  2088. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2089. uint16_t response, data_value[2];
  2090. ENHANCEMENT(brightness, BRIGHTNESS);
  2091. return true;
  2092. }
  2093. #undef ENHANCEMENT
  2094. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2095. struct intel_sdvo_connector *intel_sdvo_connector)
  2096. {
  2097. union {
  2098. struct intel_sdvo_enhancements_reply reply;
  2099. uint16_t response;
  2100. } enhancements;
  2101. enhancements.response = 0;
  2102. intel_sdvo_get_value(intel_sdvo,
  2103. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2104. &enhancements, sizeof(enhancements));
  2105. if (enhancements.response == 0) {
  2106. DRM_DEBUG_KMS("No enhancement is supported\n");
  2107. return true;
  2108. }
  2109. if (IS_TV(intel_sdvo_connector))
  2110. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2111. else if(IS_LVDS(intel_sdvo_connector))
  2112. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2113. else
  2114. return true;
  2115. }
  2116. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2117. struct i2c_msg *msgs,
  2118. int num)
  2119. {
  2120. struct intel_sdvo *sdvo = adapter->algo_data;
  2121. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2122. return -EIO;
  2123. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2124. }
  2125. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2126. {
  2127. struct intel_sdvo *sdvo = adapter->algo_data;
  2128. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2129. }
  2130. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2131. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2132. .functionality = intel_sdvo_ddc_proxy_func
  2133. };
  2134. static bool
  2135. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2136. struct drm_device *dev)
  2137. {
  2138. sdvo->ddc.owner = THIS_MODULE;
  2139. sdvo->ddc.class = I2C_CLASS_DDC;
  2140. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2141. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2142. sdvo->ddc.algo_data = sdvo;
  2143. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2144. return i2c_add_adapter(&sdvo->ddc) == 0;
  2145. }
  2146. bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
  2147. {
  2148. struct drm_i915_private *dev_priv = dev->dev_private;
  2149. struct intel_encoder *intel_encoder;
  2150. struct intel_sdvo *intel_sdvo;
  2151. int i;
  2152. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2153. if (!intel_sdvo)
  2154. return false;
  2155. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2156. kfree(intel_sdvo);
  2157. return false;
  2158. }
  2159. intel_sdvo->sdvo_reg = sdvo_reg;
  2160. intel_encoder = &intel_sdvo->base;
  2161. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2162. /* encoder type will be decided later */
  2163. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2164. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
  2165. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2166. /* Read the regs to test if we can talk to the device */
  2167. for (i = 0; i < 0x40; i++) {
  2168. u8 byte;
  2169. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2170. DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
  2171. IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2172. goto err;
  2173. }
  2174. }
  2175. if (IS_SDVOB(sdvo_reg))
  2176. dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
  2177. else
  2178. dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
  2179. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2180. /* In default case sdvo lvds is false */
  2181. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2182. goto err;
  2183. if (intel_sdvo_output_setup(intel_sdvo,
  2184. intel_sdvo->caps.output_flags) != true) {
  2185. DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
  2186. IS_SDVOB(sdvo_reg) ? 'B' : 'C');
  2187. goto err;
  2188. }
  2189. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2190. /* Set the input timing to the screen. Assume always input 0. */
  2191. if (!intel_sdvo_set_target_input(intel_sdvo))
  2192. goto err;
  2193. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2194. &intel_sdvo->pixel_clock_min,
  2195. &intel_sdvo->pixel_clock_max))
  2196. goto err;
  2197. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2198. "clock range %dMHz - %dMHz, "
  2199. "input 1: %c, input 2: %c, "
  2200. "output 1: %c, output 2: %c\n",
  2201. SDVO_NAME(intel_sdvo),
  2202. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2203. intel_sdvo->caps.device_rev_id,
  2204. intel_sdvo->pixel_clock_min / 1000,
  2205. intel_sdvo->pixel_clock_max / 1000,
  2206. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2207. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2208. /* check currently supported outputs */
  2209. intel_sdvo->caps.output_flags &
  2210. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2211. intel_sdvo->caps.output_flags &
  2212. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2213. return true;
  2214. err:
  2215. drm_encoder_cleanup(&intel_encoder->base);
  2216. i2c_del_adapter(&intel_sdvo->ddc);
  2217. kfree(intel_sdvo);
  2218. return false;
  2219. }