intel_ringbuffer.h 4.3 KB

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  1. #ifndef _INTEL_RINGBUFFER_H_
  2. #define _INTEL_RINGBUFFER_H_
  3. struct intel_hw_status_page {
  4. void *page_addr;
  5. unsigned int gfx_addr;
  6. struct drm_gem_object *obj;
  7. };
  8. #define I915_READ_TAIL(ring) I915_READ(RING_TAIL(ring->mmio_base))
  9. #define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)
  10. #define I915_READ_START(ring) I915_READ(RING_START(ring->mmio_base))
  11. #define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val)
  12. #define I915_READ_HEAD(ring) I915_READ(RING_HEAD(ring->mmio_base))
  13. #define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val)
  14. #define I915_READ_CTL(ring) I915_READ(RING_CTL(ring->mmio_base))
  15. #define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val)
  16. struct drm_i915_gem_execbuffer2;
  17. struct intel_ring_buffer {
  18. const char *name;
  19. enum intel_ring_id {
  20. RING_RENDER = 0x1,
  21. RING_BSD = 0x2,
  22. RING_BLT = 0x4,
  23. } id;
  24. u32 mmio_base;
  25. unsigned long size;
  26. void *virtual_start;
  27. struct drm_device *dev;
  28. struct drm_gem_object *gem_object;
  29. unsigned int head;
  30. unsigned int tail;
  31. int space;
  32. struct intel_hw_status_page status_page;
  33. u32 irq_gem_seqno; /* last seq seem at irq time */
  34. u32 waiting_gem_seqno;
  35. int user_irq_refcount;
  36. void (*user_irq_get)(struct drm_device *dev,
  37. struct intel_ring_buffer *ring);
  38. void (*user_irq_put)(struct drm_device *dev,
  39. struct intel_ring_buffer *ring);
  40. int (*init)(struct drm_device *dev,
  41. struct intel_ring_buffer *ring);
  42. void (*write_tail)(struct drm_device *dev,
  43. struct intel_ring_buffer *ring,
  44. u32 value);
  45. void (*flush)(struct drm_device *dev,
  46. struct intel_ring_buffer *ring,
  47. u32 invalidate_domains,
  48. u32 flush_domains);
  49. u32 (*add_request)(struct drm_device *dev,
  50. struct intel_ring_buffer *ring,
  51. u32 flush_domains);
  52. u32 (*get_seqno)(struct drm_device *dev,
  53. struct intel_ring_buffer *ring);
  54. int (*dispatch_gem_execbuffer)(struct drm_device *dev,
  55. struct intel_ring_buffer *ring,
  56. struct drm_i915_gem_execbuffer2 *exec,
  57. struct drm_clip_rect *cliprects,
  58. uint64_t exec_offset);
  59. void (*cleanup)(struct intel_ring_buffer *ring);
  60. /**
  61. * List of objects currently involved in rendering from the
  62. * ringbuffer.
  63. *
  64. * Includes buffers having the contents of their GPU caches
  65. * flushed, not necessarily primitives. last_rendering_seqno
  66. * represents when the rendering involved will be completed.
  67. *
  68. * A reference is held on the buffer while on this list.
  69. */
  70. struct list_head active_list;
  71. /**
  72. * List of breadcrumbs associated with GPU requests currently
  73. * outstanding.
  74. */
  75. struct list_head request_list;
  76. /**
  77. * List of objects currently pending a GPU write flush.
  78. *
  79. * All elements on this list will belong to either the
  80. * active_list or flushing_list, last_rendering_seqno can
  81. * be used to differentiate between the two elements.
  82. */
  83. struct list_head gpu_write_list;
  84. /**
  85. * Do we have some not yet emitted requests outstanding?
  86. */
  87. bool outstanding_lazy_request;
  88. wait_queue_head_t irq_queue;
  89. drm_local_map_t map;
  90. void *private;
  91. };
  92. static inline u32
  93. intel_read_status_page(struct intel_ring_buffer *ring,
  94. int reg)
  95. {
  96. u32 *regs = ring->status_page.page_addr;
  97. return regs[reg];
  98. }
  99. int intel_init_ring_buffer(struct drm_device *dev,
  100. struct intel_ring_buffer *ring);
  101. void intel_cleanup_ring_buffer(struct drm_device *dev,
  102. struct intel_ring_buffer *ring);
  103. int intel_wait_ring_buffer(struct drm_device *dev,
  104. struct intel_ring_buffer *ring, int n);
  105. void intel_ring_begin(struct drm_device *dev,
  106. struct intel_ring_buffer *ring, int n);
  107. static inline void intel_ring_emit(struct drm_device *dev,
  108. struct intel_ring_buffer *ring,
  109. unsigned int data)
  110. {
  111. unsigned int *virt = ring->virtual_start + ring->tail;
  112. *virt = data;
  113. ring->tail += 4;
  114. }
  115. void intel_ring_advance(struct drm_device *dev,
  116. struct intel_ring_buffer *ring);
  117. u32 intel_ring_get_seqno(struct drm_device *dev,
  118. struct intel_ring_buffer *ring);
  119. int intel_init_render_ring_buffer(struct drm_device *dev);
  120. int intel_init_bsd_ring_buffer(struct drm_device *dev);
  121. int intel_init_blt_ring_buffer(struct drm_device *dev);
  122. u32 intel_ring_get_active_head(struct drm_device *dev,
  123. struct intel_ring_buffer *ring);
  124. void intel_ring_setup_status_page(struct drm_device *dev,
  125. struct intel_ring_buffer *ring);
  126. #endif /* _INTEL_RINGBUFFER_H_ */