mach-mx31_3ds.c 7.1 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/types.h>
  16. #include <linux/init.h>
  17. #include <linux/clk.h>
  18. #include <linux/irq.h>
  19. #include <linux/gpio.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/mfd/mc13783.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/fsl_devices.h>
  25. #include <linux/input/matrix_keypad.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/time.h>
  30. #include <asm/memory.h>
  31. #include <asm/mach/map.h>
  32. #include <mach/common.h>
  33. #include <mach/iomux-mx3.h>
  34. #include <mach/3ds_debugboard.h>
  35. #include "devices-imx31.h"
  36. #include "devices.h"
  37. /* CPLD IRQ line for external uart, external ethernet etc */
  38. #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
  39. /*
  40. * This file contains the board-specific initialization routines.
  41. */
  42. static int mx31_3ds_pins[] = {
  43. /* UART1 */
  44. MX31_PIN_CTS1__CTS1,
  45. MX31_PIN_RTS1__RTS1,
  46. MX31_PIN_TXD1__TXD1,
  47. MX31_PIN_RXD1__RXD1,
  48. IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  49. /* SPI 1 */
  50. MX31_PIN_CSPI2_SCLK__SCLK,
  51. MX31_PIN_CSPI2_MOSI__MOSI,
  52. MX31_PIN_CSPI2_MISO__MISO,
  53. MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  54. MX31_PIN_CSPI2_SS0__SS0,
  55. MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  56. /* MC13783 IRQ */
  57. IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  58. /* USB OTG reset */
  59. IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  60. /* USB OTG */
  61. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  62. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  63. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  64. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  65. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  66. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  67. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  68. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  69. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  70. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  71. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  72. MX31_PIN_USBOTG_STP__USBOTG_STP,
  73. /*Keyboard*/
  74. MX31_PIN_KEY_ROW0_KEY_ROW0,
  75. MX31_PIN_KEY_ROW1_KEY_ROW1,
  76. MX31_PIN_KEY_ROW2_KEY_ROW2,
  77. MX31_PIN_KEY_COL0_KEY_COL0,
  78. MX31_PIN_KEY_COL1_KEY_COL1,
  79. MX31_PIN_KEY_COL2_KEY_COL2,
  80. MX31_PIN_KEY_COL3_KEY_COL3,
  81. };
  82. /*
  83. * Matrix keyboard
  84. */
  85. static const uint32_t mx31_3ds_keymap[] = {
  86. KEY(0, 0, KEY_UP),
  87. KEY(0, 1, KEY_DOWN),
  88. KEY(1, 0, KEY_RIGHT),
  89. KEY(1, 1, KEY_LEFT),
  90. KEY(1, 2, KEY_ENTER),
  91. KEY(2, 0, KEY_F6),
  92. KEY(2, 1, KEY_F8),
  93. KEY(2, 2, KEY_F9),
  94. KEY(2, 3, KEY_F10),
  95. };
  96. static struct matrix_keymap_data mx31_3ds_keymap_data = {
  97. .keymap = mx31_3ds_keymap,
  98. .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
  99. };
  100. /* Regulators */
  101. static struct regulator_init_data pwgtx_init = {
  102. .constraints = {
  103. .boot_on = 1,
  104. .always_on = 1,
  105. },
  106. };
  107. static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
  108. {
  109. .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
  110. .init_data = &pwgtx_init,
  111. }, {
  112. .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
  113. .init_data = &pwgtx_init,
  114. },
  115. };
  116. /* MC13783 */
  117. static struct mc13783_platform_data mc13783_pdata __initdata = {
  118. .regulators = mx31_3ds_regulators,
  119. .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
  120. .flags = MC13783_USE_REGULATOR,
  121. };
  122. /* SPI */
  123. static int spi1_internal_chipselect[] = {
  124. MXC_SPI_CS(0),
  125. MXC_SPI_CS(2),
  126. };
  127. static const struct spi_imx_master spi1_pdata __initconst = {
  128. .chipselect = spi1_internal_chipselect,
  129. .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
  130. };
  131. static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
  132. {
  133. .modalias = "mc13783",
  134. .max_speed_hz = 1000000,
  135. .bus_num = 1,
  136. .chip_select = 1, /* SS2 */
  137. .platform_data = &mc13783_pdata,
  138. .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
  139. .mode = SPI_CS_HIGH,
  140. },
  141. };
  142. /*
  143. * NAND Flash
  144. */
  145. static const struct mxc_nand_platform_data
  146. mx31_3ds_nand_board_info __initconst = {
  147. .width = 1,
  148. .hw_ecc = 1,
  149. #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
  150. .flash_bbt = 1,
  151. #endif
  152. };
  153. /*
  154. * USB OTG
  155. */
  156. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  157. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  158. #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
  159. static int mx31_3ds_usbotg_init(void)
  160. {
  161. int err;
  162. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  163. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  164. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  165. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  166. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  167. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  168. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  169. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  170. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  171. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  172. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  173. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  174. err = gpio_request(USBOTG_RST_B, "otgusb-reset");
  175. if (err) {
  176. pr_err("Failed to request the USB OTG reset gpio\n");
  177. return err;
  178. }
  179. err = gpio_direction_output(USBOTG_RST_B, 0);
  180. if (err) {
  181. pr_err("Failed to drive the USB OTG reset gpio\n");
  182. goto usbotg_free_reset;
  183. }
  184. mdelay(1);
  185. gpio_set_value(USBOTG_RST_B, 1);
  186. return 0;
  187. usbotg_free_reset:
  188. gpio_free(USBOTG_RST_B);
  189. return err;
  190. }
  191. static struct fsl_usb2_platform_data usbotg_pdata = {
  192. .operating_mode = FSL_USB2_DR_DEVICE,
  193. .phy_mode = FSL_USB2_PHY_ULPI,
  194. };
  195. static const struct imxuart_platform_data uart_pdata __initconst = {
  196. .flags = IMXUART_HAVE_RTSCTS,
  197. };
  198. /*
  199. * Set up static virtual mappings.
  200. */
  201. static void __init mx31_3ds_map_io(void)
  202. {
  203. mx31_map_io();
  204. }
  205. /*!
  206. * Board specific initialization.
  207. */
  208. static void __init mxc_board_init(void)
  209. {
  210. mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
  211. "mx31_3ds");
  212. imx31_add_imx_uart0(&uart_pdata);
  213. imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
  214. imx31_add_spi_imx1(&spi1_pdata);
  215. spi_register_board_info(mx31_3ds_spi_devs,
  216. ARRAY_SIZE(mx31_3ds_spi_devs));
  217. mxc_register_device(&imx_kpp_device, &mx31_3ds_keymap_data);
  218. mx31_3ds_usbotg_init();
  219. mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata);
  220. if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
  221. printk(KERN_WARNING "Init of the debug board failed, all "
  222. "devices on the debug board are unusable.\n");
  223. }
  224. static void __init mx31_3ds_timer_init(void)
  225. {
  226. mx31_clocks_init(26000000);
  227. }
  228. static struct sys_timer mx31_3ds_timer = {
  229. .init = mx31_3ds_timer_init,
  230. };
  231. /*
  232. * The following uses standard kernel macros defined in arch.h in order to
  233. * initialize __mach_desc_MX31_3DS data structure.
  234. */
  235. MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
  236. /* Maintainer: Freescale Semiconductor, Inc. */
  237. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  238. .map_io = mx31_3ds_map_io,
  239. .init_irq = mx31_init_irq,
  240. .init_machine = mxc_board_init,
  241. .timer = &mx31_3ds_timer,
  242. MACHINE_END