exynos5440.dtsi 3.0 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. clock: clock-controller@0x160000 {
  16. compatible = "samsung,exynos5440-clock";
  17. reg = <0x160000 0x1000>;
  18. #clock-cells = <1>;
  19. };
  20. gic:interrupt-controller@2E0000 {
  21. compatible = "arm,cortex-a15-gic";
  22. #interrupt-cells = <3>;
  23. interrupt-controller;
  24. reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
  25. };
  26. cpus {
  27. #address-cells = <1>;
  28. #size-cells = <0>;
  29. cpu@0 {
  30. compatible = "arm,cortex-a15";
  31. reg = <0>;
  32. };
  33. cpu@1 {
  34. compatible = "arm,cortex-a15";
  35. reg = <1>;
  36. };
  37. cpu@2 {
  38. compatible = "arm,cortex-a15";
  39. reg = <2>;
  40. };
  41. cpu@3 {
  42. compatible = "arm,cortex-a15";
  43. reg = <3>;
  44. };
  45. };
  46. timer {
  47. compatible = "arm,cortex-a15-timer",
  48. "arm,armv7-timer";
  49. interrupts = <1 13 0xf08>,
  50. <1 14 0xf08>,
  51. <1 11 0xf08>,
  52. <1 10 0xf08>;
  53. clock-frequency = <50000000>;
  54. };
  55. serial@B0000 {
  56. compatible = "samsung,exynos4210-uart";
  57. reg = <0xB0000 0x1000>;
  58. interrupts = <0 2 0>;
  59. };
  60. serial@C0000 {
  61. compatible = "samsung,exynos4210-uart";
  62. reg = <0xC0000 0x1000>;
  63. interrupts = <0 3 0>;
  64. };
  65. spi {
  66. compatible = "samsung,exynos4210-spi";
  67. reg = <0xD0000 0x1000>;
  68. interrupts = <0 4 0>;
  69. tx-dma-channel = <&pdma0 5>; /* preliminary */
  70. rx-dma-channel = <&pdma0 4>; /* preliminary */
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. };
  74. pinctrl {
  75. compatible = "samsung,exynos5440-pinctrl";
  76. reg = <0xE0000 0x1000>;
  77. interrupt-controller;
  78. #interrupt-cells = <2>;
  79. #gpio-cells = <2>;
  80. fan: fan {
  81. samsung,exynos5440-pin-function = <1>;
  82. };
  83. hdd_led0: hdd_led0 {
  84. samsung,exynos5440-pin-function = <2>;
  85. };
  86. hdd_led1: hdd_led1 {
  87. samsung,exynos5440-pin-function = <3>;
  88. };
  89. uart1: uart1 {
  90. samsung,exynos5440-pin-function = <4>;
  91. };
  92. };
  93. i2c@F0000 {
  94. compatible = "samsung,exynos5440-i2c";
  95. reg = <0xF0000 0x1000>;
  96. interrupts = <0 5 0>;
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. };
  100. i2c@100000 {
  101. compatible = "samsung,exynos5440-i2c";
  102. reg = <0x100000 0x1000>;
  103. interrupts = <0 6 0>;
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. };
  107. watchdog {
  108. compatible = "samsung,s3c2410-wdt";
  109. reg = <0x110000 0x1000>;
  110. interrupts = <0 1 0>;
  111. };
  112. amba {
  113. #address-cells = <1>;
  114. #size-cells = <1>;
  115. compatible = "arm,amba-bus";
  116. interrupt-parent = <&gic>;
  117. ranges;
  118. pdma0: pdma@121A0000 {
  119. compatible = "arm,pl330", "arm,primecell";
  120. reg = <0x120000 0x1000>;
  121. interrupts = <0 34 0>;
  122. };
  123. pdma1: pdma@121B0000 {
  124. compatible = "arm,pl330", "arm,primecell";
  125. reg = <0x121000 0x1000>;
  126. interrupts = <0 35 0>;
  127. };
  128. };
  129. rtc {
  130. compatible = "samsung,s3c6410-rtc";
  131. reg = <0x130000 0x1000>;
  132. interrupts = <0 17 0>, <0 16 0>;
  133. };
  134. };