exynos5250.dtsi 15 KB

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  1. /*
  2. * SAMSUNG EXYNOS5250 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
  8. * EXYNOS5250 based board files can include this file and provide
  9. * values for board specfic bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13. * additional nodes can be added to this file.
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. /include/ "skeleton.dtsi"
  20. / {
  21. compatible = "samsung,exynos5250";
  22. interrupt-parent = <&gic>;
  23. aliases {
  24. spi0 = &spi_0;
  25. spi1 = &spi_1;
  26. spi2 = &spi_2;
  27. gsc0 = &gsc_0;
  28. gsc1 = &gsc_1;
  29. gsc2 = &gsc_2;
  30. gsc3 = &gsc_3;
  31. mshc0 = &dwmmc_0;
  32. mshc1 = &dwmmc_1;
  33. mshc2 = &dwmmc_2;
  34. mshc3 = &dwmmc_3;
  35. i2c0 = &i2c_0;
  36. i2c1 = &i2c_1;
  37. i2c2 = &i2c_2;
  38. i2c3 = &i2c_3;
  39. i2c4 = &i2c_4;
  40. i2c5 = &i2c_5;
  41. i2c6 = &i2c_6;
  42. i2c7 = &i2c_7;
  43. i2c8 = &i2c_8;
  44. };
  45. pd_gsc: gsc-power-domain@0x10044000 {
  46. compatible = "samsung,exynos4210-pd";
  47. reg = <0x10044000 0x20>;
  48. };
  49. pd_mfc: mfc-power-domain@0x10044040 {
  50. compatible = "samsung,exynos4210-pd";
  51. reg = <0x10044040 0x20>;
  52. };
  53. clock: clock-controller@0x10010000 {
  54. compatible = "samsung,exynos5250-clock";
  55. reg = <0x10010000 0x30000>;
  56. #clock-cells = <1>;
  57. };
  58. gic:interrupt-controller@10481000 {
  59. compatible = "arm,cortex-a9-gic";
  60. #interrupt-cells = <3>;
  61. interrupt-controller;
  62. reg = <0x10481000 0x1000>, <0x10482000 0x2000>;
  63. };
  64. combiner:interrupt-controller@10440000 {
  65. compatible = "samsung,exynos4210-combiner";
  66. #interrupt-cells = <2>;
  67. interrupt-controller;
  68. samsung,combiner-nr = <32>;
  69. reg = <0x10440000 0x1000>;
  70. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  71. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  72. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  73. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  74. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  75. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  76. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  77. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  78. };
  79. mct@101C0000 {
  80. compatible = "samsung,exynos4210-mct";
  81. reg = <0x101C0000 0x800>;
  82. interrupt-controller;
  83. #interrups-cells = <2>;
  84. interrupt-parent = <&mct_map>;
  85. interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
  86. <4 0>, <5 0>;
  87. mct_map: mct-map {
  88. #interrupt-cells = <2>;
  89. #address-cells = <0>;
  90. #size-cells = <0>;
  91. interrupt-map = <0x0 0 &combiner 23 3>,
  92. <0x1 0 &combiner 23 4>,
  93. <0x2 0 &combiner 25 2>,
  94. <0x3 0 &combiner 25 3>,
  95. <0x4 0 &gic 0 120 0>,
  96. <0x5 0 &gic 0 121 0>;
  97. };
  98. };
  99. watchdog {
  100. compatible = "samsung,s3c2410-wdt";
  101. reg = <0x101D0000 0x100>;
  102. interrupts = <0 42 0>;
  103. };
  104. codec@11000000 {
  105. compatible = "samsung,mfc-v6";
  106. reg = <0x11000000 0x10000>;
  107. interrupts = <0 96 0>;
  108. samsung,power-domain = <&pd_mfc>;
  109. };
  110. rtc {
  111. compatible = "samsung,s3c6410-rtc";
  112. reg = <0x101E0000 0x100>;
  113. interrupts = <0 43 0>, <0 44 0>;
  114. };
  115. tmu@10060000 {
  116. compatible = "samsung,exynos5250-tmu";
  117. reg = <0x10060000 0x100>;
  118. interrupts = <0 65 0>;
  119. };
  120. serial@12C00000 {
  121. compatible = "samsung,exynos4210-uart";
  122. reg = <0x12C00000 0x100>;
  123. interrupts = <0 51 0>;
  124. };
  125. serial@12C10000 {
  126. compatible = "samsung,exynos4210-uart";
  127. reg = <0x12C10000 0x100>;
  128. interrupts = <0 52 0>;
  129. };
  130. serial@12C20000 {
  131. compatible = "samsung,exynos4210-uart";
  132. reg = <0x12C20000 0x100>;
  133. interrupts = <0 53 0>;
  134. };
  135. serial@12C30000 {
  136. compatible = "samsung,exynos4210-uart";
  137. reg = <0x12C30000 0x100>;
  138. interrupts = <0 54 0>;
  139. };
  140. sata@122F0000 {
  141. compatible = "samsung,exynos5-sata-ahci";
  142. reg = <0x122F0000 0x1ff>;
  143. interrupts = <0 115 0>;
  144. };
  145. sata-phy@12170000 {
  146. compatible = "samsung,exynos5-sata-phy";
  147. reg = <0x12170000 0x1ff>;
  148. };
  149. i2c_0: i2c@12C60000 {
  150. compatible = "samsung,s3c2440-i2c";
  151. reg = <0x12C60000 0x100>;
  152. interrupts = <0 56 0>;
  153. #address-cells = <1>;
  154. #size-cells = <0>;
  155. };
  156. i2c_1: i2c@12C70000 {
  157. compatible = "samsung,s3c2440-i2c";
  158. reg = <0x12C70000 0x100>;
  159. interrupts = <0 57 0>;
  160. #address-cells = <1>;
  161. #size-cells = <0>;
  162. };
  163. i2c_2: i2c@12C80000 {
  164. compatible = "samsung,s3c2440-i2c";
  165. reg = <0x12C80000 0x100>;
  166. interrupts = <0 58 0>;
  167. #address-cells = <1>;
  168. #size-cells = <0>;
  169. };
  170. i2c_3: i2c@12C90000 {
  171. compatible = "samsung,s3c2440-i2c";
  172. reg = <0x12C90000 0x100>;
  173. interrupts = <0 59 0>;
  174. #address-cells = <1>;
  175. #size-cells = <0>;
  176. };
  177. i2c_4: i2c@12CA0000 {
  178. compatible = "samsung,s3c2440-i2c";
  179. reg = <0x12CA0000 0x100>;
  180. interrupts = <0 60 0>;
  181. #address-cells = <1>;
  182. #size-cells = <0>;
  183. };
  184. i2c_5: i2c@12CB0000 {
  185. compatible = "samsung,s3c2440-i2c";
  186. reg = <0x12CB0000 0x100>;
  187. interrupts = <0 61 0>;
  188. #address-cells = <1>;
  189. #size-cells = <0>;
  190. };
  191. i2c_6: i2c@12CC0000 {
  192. compatible = "samsung,s3c2440-i2c";
  193. reg = <0x12CC0000 0x100>;
  194. interrupts = <0 62 0>;
  195. #address-cells = <1>;
  196. #size-cells = <0>;
  197. };
  198. i2c_7: i2c@12CD0000 {
  199. compatible = "samsung,s3c2440-i2c";
  200. reg = <0x12CD0000 0x100>;
  201. interrupts = <0 63 0>;
  202. #address-cells = <1>;
  203. #size-cells = <0>;
  204. };
  205. i2c_8: i2c@12CE0000 {
  206. compatible = "samsung,s3c2440-hdmiphy-i2c";
  207. reg = <0x12CE0000 0x1000>;
  208. interrupts = <0 64 0>;
  209. #address-cells = <1>;
  210. #size-cells = <0>;
  211. };
  212. i2c@121D0000 {
  213. compatible = "samsung,exynos5-sata-phy-i2c";
  214. reg = <0x121D0000 0x100>;
  215. #address-cells = <1>;
  216. #size-cells = <0>;
  217. };
  218. spi_0: spi@12d20000 {
  219. compatible = "samsung,exynos4210-spi";
  220. reg = <0x12d20000 0x100>;
  221. interrupts = <0 66 0>;
  222. dmas = <&pdma0 5
  223. &pdma0 4>;
  224. dma-names = "tx", "rx";
  225. #address-cells = <1>;
  226. #size-cells = <0>;
  227. };
  228. spi_1: spi@12d30000 {
  229. compatible = "samsung,exynos4210-spi";
  230. reg = <0x12d30000 0x100>;
  231. interrupts = <0 67 0>;
  232. dmas = <&pdma1 5
  233. &pdma1 4>;
  234. dma-names = "tx", "rx";
  235. #address-cells = <1>;
  236. #size-cells = <0>;
  237. };
  238. spi_2: spi@12d40000 {
  239. compatible = "samsung,exynos4210-spi";
  240. reg = <0x12d40000 0x100>;
  241. interrupts = <0 68 0>;
  242. dmas = <&pdma0 7
  243. &pdma0 6>;
  244. dma-names = "tx", "rx";
  245. #address-cells = <1>;
  246. #size-cells = <0>;
  247. };
  248. dwmmc_0: dwmmc0@12200000 {
  249. compatible = "samsung,exynos5250-dw-mshc";
  250. reg = <0x12200000 0x1000>;
  251. interrupts = <0 75 0>;
  252. #address-cells = <1>;
  253. #size-cells = <0>;
  254. };
  255. dwmmc_1: dwmmc1@12210000 {
  256. compatible = "samsung,exynos5250-dw-mshc";
  257. reg = <0x12210000 0x1000>;
  258. interrupts = <0 76 0>;
  259. #address-cells = <1>;
  260. #size-cells = <0>;
  261. };
  262. dwmmc_2: dwmmc2@12220000 {
  263. compatible = "samsung,exynos5250-dw-mshc";
  264. reg = <0x12220000 0x1000>;
  265. interrupts = <0 77 0>;
  266. #address-cells = <1>;
  267. #size-cells = <0>;
  268. };
  269. dwmmc_3: dwmmc3@12230000 {
  270. compatible = "samsung,exynos5250-dw-mshc";
  271. reg = <0x12230000 0x1000>;
  272. interrupts = <0 78 0>;
  273. #address-cells = <1>;
  274. #size-cells = <0>;
  275. };
  276. i2s0: i2s@03830000 {
  277. compatible = "samsung,i2s-v5";
  278. reg = <0x03830000 0x100>;
  279. dmas = <&pdma0 10
  280. &pdma0 9
  281. &pdma0 8>;
  282. dma-names = "tx", "rx", "tx-sec";
  283. samsung,supports-6ch;
  284. samsung,supports-rstclr;
  285. samsung,supports-secdai;
  286. samsung,idma-addr = <0x03000000>;
  287. };
  288. i2s1: i2s@12D60000 {
  289. compatible = "samsung,i2s-v5";
  290. reg = <0x12D60000 0x100>;
  291. dmas = <&pdma1 12
  292. &pdma1 11>;
  293. dma-names = "tx", "rx";
  294. };
  295. i2s2: i2s@12D70000 {
  296. compatible = "samsung,i2s-v5";
  297. reg = <0x12D70000 0x100>;
  298. dmas = <&pdma0 12
  299. &pdma0 11>;
  300. dma-names = "tx", "rx";
  301. };
  302. usb@12110000 {
  303. compatible = "samsung,exynos4210-ehci";
  304. reg = <0x12110000 0x100>;
  305. interrupts = <0 71 0>;
  306. };
  307. usb@12120000 {
  308. compatible = "samsung,exynos4210-ohci";
  309. reg = <0x12120000 0x100>;
  310. interrupts = <0 71 0>;
  311. };
  312. amba {
  313. #address-cells = <1>;
  314. #size-cells = <1>;
  315. compatible = "arm,amba-bus";
  316. interrupt-parent = <&gic>;
  317. ranges;
  318. pdma0: pdma@121A0000 {
  319. compatible = "arm,pl330", "arm,primecell";
  320. reg = <0x121A0000 0x1000>;
  321. interrupts = <0 34 0>;
  322. #dma-cells = <1>;
  323. #dma-channels = <8>;
  324. #dma-requests = <32>;
  325. };
  326. pdma1: pdma@121B0000 {
  327. compatible = "arm,pl330", "arm,primecell";
  328. reg = <0x121B0000 0x1000>;
  329. interrupts = <0 35 0>;
  330. #dma-cells = <1>;
  331. #dma-channels = <8>;
  332. #dma-requests = <32>;
  333. };
  334. mdma0: mdma@10800000 {
  335. compatible = "arm,pl330", "arm,primecell";
  336. reg = <0x10800000 0x1000>;
  337. interrupts = <0 33 0>;
  338. #dma-cells = <1>;
  339. #dma-channels = <8>;
  340. #dma-requests = <1>;
  341. };
  342. mdma1: mdma@11C10000 {
  343. compatible = "arm,pl330", "arm,primecell";
  344. reg = <0x11C10000 0x1000>;
  345. interrupts = <0 124 0>;
  346. #dma-cells = <1>;
  347. #dma-channels = <8>;
  348. #dma-requests = <1>;
  349. };
  350. };
  351. gpio-controllers {
  352. #address-cells = <1>;
  353. #size-cells = <1>;
  354. gpio-controller;
  355. ranges;
  356. gpa0: gpio-controller@11400000 {
  357. compatible = "samsung,exynos4-gpio";
  358. reg = <0x11400000 0x20>;
  359. #gpio-cells = <4>;
  360. };
  361. gpa1: gpio-controller@11400020 {
  362. compatible = "samsung,exynos4-gpio";
  363. reg = <0x11400020 0x20>;
  364. #gpio-cells = <4>;
  365. };
  366. gpa2: gpio-controller@11400040 {
  367. compatible = "samsung,exynos4-gpio";
  368. reg = <0x11400040 0x20>;
  369. #gpio-cells = <4>;
  370. };
  371. gpb0: gpio-controller@11400060 {
  372. compatible = "samsung,exynos4-gpio";
  373. reg = <0x11400060 0x20>;
  374. #gpio-cells = <4>;
  375. };
  376. gpb1: gpio-controller@11400080 {
  377. compatible = "samsung,exynos4-gpio";
  378. reg = <0x11400080 0x20>;
  379. #gpio-cells = <4>;
  380. };
  381. gpb2: gpio-controller@114000A0 {
  382. compatible = "samsung,exynos4-gpio";
  383. reg = <0x114000A0 0x20>;
  384. #gpio-cells = <4>;
  385. };
  386. gpb3: gpio-controller@114000C0 {
  387. compatible = "samsung,exynos4-gpio";
  388. reg = <0x114000C0 0x20>;
  389. #gpio-cells = <4>;
  390. };
  391. gpc0: gpio-controller@114000E0 {
  392. compatible = "samsung,exynos4-gpio";
  393. reg = <0x114000E0 0x20>;
  394. #gpio-cells = <4>;
  395. };
  396. gpc1: gpio-controller@11400100 {
  397. compatible = "samsung,exynos4-gpio";
  398. reg = <0x11400100 0x20>;
  399. #gpio-cells = <4>;
  400. };
  401. gpc2: gpio-controller@11400120 {
  402. compatible = "samsung,exynos4-gpio";
  403. reg = <0x11400120 0x20>;
  404. #gpio-cells = <4>;
  405. };
  406. gpc3: gpio-controller@11400140 {
  407. compatible = "samsung,exynos4-gpio";
  408. reg = <0x11400140 0x20>;
  409. #gpio-cells = <4>;
  410. };
  411. gpc4: gpio-controller@114002E0 {
  412. compatible = "samsung,exynos4-gpio";
  413. reg = <0x114002E0 0x20>;
  414. #gpio-cells = <4>;
  415. };
  416. gpd0: gpio-controller@11400160 {
  417. compatible = "samsung,exynos4-gpio";
  418. reg = <0x11400160 0x20>;
  419. #gpio-cells = <4>;
  420. };
  421. gpd1: gpio-controller@11400180 {
  422. compatible = "samsung,exynos4-gpio";
  423. reg = <0x11400180 0x20>;
  424. #gpio-cells = <4>;
  425. };
  426. gpy0: gpio-controller@114001A0 {
  427. compatible = "samsung,exynos4-gpio";
  428. reg = <0x114001A0 0x20>;
  429. #gpio-cells = <4>;
  430. };
  431. gpy1: gpio-controller@114001C0 {
  432. compatible = "samsung,exynos4-gpio";
  433. reg = <0x114001C0 0x20>;
  434. #gpio-cells = <4>;
  435. };
  436. gpy2: gpio-controller@114001E0 {
  437. compatible = "samsung,exynos4-gpio";
  438. reg = <0x114001E0 0x20>;
  439. #gpio-cells = <4>;
  440. };
  441. gpy3: gpio-controller@11400200 {
  442. compatible = "samsung,exynos4-gpio";
  443. reg = <0x11400200 0x20>;
  444. #gpio-cells = <4>;
  445. };
  446. gpy4: gpio-controller@11400220 {
  447. compatible = "samsung,exynos4-gpio";
  448. reg = <0x11400220 0x20>;
  449. #gpio-cells = <4>;
  450. };
  451. gpy5: gpio-controller@11400240 {
  452. compatible = "samsung,exynos4-gpio";
  453. reg = <0x11400240 0x20>;
  454. #gpio-cells = <4>;
  455. };
  456. gpy6: gpio-controller@11400260 {
  457. compatible = "samsung,exynos4-gpio";
  458. reg = <0x11400260 0x20>;
  459. #gpio-cells = <4>;
  460. };
  461. gpx0: gpio-controller@11400C00 {
  462. compatible = "samsung,exynos4-gpio";
  463. reg = <0x11400C00 0x20>;
  464. #gpio-cells = <4>;
  465. };
  466. gpx1: gpio-controller@11400C20 {
  467. compatible = "samsung,exynos4-gpio";
  468. reg = <0x11400C20 0x20>;
  469. #gpio-cells = <4>;
  470. };
  471. gpx2: gpio-controller@11400C40 {
  472. compatible = "samsung,exynos4-gpio";
  473. reg = <0x11400C40 0x20>;
  474. #gpio-cells = <4>;
  475. };
  476. gpx3: gpio-controller@11400C60 {
  477. compatible = "samsung,exynos4-gpio";
  478. reg = <0x11400C60 0x20>;
  479. #gpio-cells = <4>;
  480. };
  481. gpe0: gpio-controller@13400000 {
  482. compatible = "samsung,exynos4-gpio";
  483. reg = <0x13400000 0x20>;
  484. #gpio-cells = <4>;
  485. };
  486. gpe1: gpio-controller@13400020 {
  487. compatible = "samsung,exynos4-gpio";
  488. reg = <0x13400020 0x20>;
  489. #gpio-cells = <4>;
  490. };
  491. gpf0: gpio-controller@13400040 {
  492. compatible = "samsung,exynos4-gpio";
  493. reg = <0x13400040 0x20>;
  494. #gpio-cells = <4>;
  495. };
  496. gpf1: gpio-controller@13400060 {
  497. compatible = "samsung,exynos4-gpio";
  498. reg = <0x13400060 0x20>;
  499. #gpio-cells = <4>;
  500. };
  501. gpg0: gpio-controller@13400080 {
  502. compatible = "samsung,exynos4-gpio";
  503. reg = <0x13400080 0x20>;
  504. #gpio-cells = <4>;
  505. };
  506. gpg1: gpio-controller@134000A0 {
  507. compatible = "samsung,exynos4-gpio";
  508. reg = <0x134000A0 0x20>;
  509. #gpio-cells = <4>;
  510. };
  511. gpg2: gpio-controller@134000C0 {
  512. compatible = "samsung,exynos4-gpio";
  513. reg = <0x134000C0 0x20>;
  514. #gpio-cells = <4>;
  515. };
  516. gph0: gpio-controller@134000E0 {
  517. compatible = "samsung,exynos4-gpio";
  518. reg = <0x134000E0 0x20>;
  519. #gpio-cells = <4>;
  520. };
  521. gph1: gpio-controller@13400100 {
  522. compatible = "samsung,exynos4-gpio";
  523. reg = <0x13400100 0x20>;
  524. #gpio-cells = <4>;
  525. };
  526. gpv0: gpio-controller@10D10000 {
  527. compatible = "samsung,exynos4-gpio";
  528. reg = <0x10D10000 0x20>;
  529. #gpio-cells = <4>;
  530. };
  531. gpv1: gpio-controller@10D10020 {
  532. compatible = "samsung,exynos4-gpio";
  533. reg = <0x10D10020 0x20>;
  534. #gpio-cells = <4>;
  535. };
  536. gpv2: gpio-controller@10D10040 {
  537. compatible = "samsung,exynos4-gpio";
  538. reg = <0x10D10060 0x20>;
  539. #gpio-cells = <4>;
  540. };
  541. gpv3: gpio-controller@10D10060 {
  542. compatible = "samsung,exynos4-gpio";
  543. reg = <0x10D10080 0x20>;
  544. #gpio-cells = <4>;
  545. };
  546. gpv4: gpio-controller@10D10080 {
  547. compatible = "samsung,exynos4-gpio";
  548. reg = <0x10D100C0 0x20>;
  549. #gpio-cells = <4>;
  550. };
  551. gpz: gpio-controller@03860000 {
  552. compatible = "samsung,exynos4-gpio";
  553. reg = <0x03860000 0x20>;
  554. #gpio-cells = <4>;
  555. };
  556. };
  557. gsc_0: gsc@0x13e00000 {
  558. compatible = "samsung,exynos5-gsc";
  559. reg = <0x13e00000 0x1000>;
  560. interrupts = <0 85 0>;
  561. samsung,power-domain = <&pd_gsc>;
  562. };
  563. gsc_1: gsc@0x13e10000 {
  564. compatible = "samsung,exynos5-gsc";
  565. reg = <0x13e10000 0x1000>;
  566. interrupts = <0 86 0>;
  567. samsung,power-domain = <&pd_gsc>;
  568. };
  569. gsc_2: gsc@0x13e20000 {
  570. compatible = "samsung,exynos5-gsc";
  571. reg = <0x13e20000 0x1000>;
  572. interrupts = <0 87 0>;
  573. samsung,power-domain = <&pd_gsc>;
  574. };
  575. gsc_3: gsc@0x13e30000 {
  576. compatible = "samsung,exynos5-gsc";
  577. reg = <0x13e30000 0x1000>;
  578. interrupts = <0 88 0>;
  579. samsung,power-domain = <&pd_gsc>;
  580. };
  581. hdmi {
  582. compatible = "samsung,exynos5-hdmi";
  583. reg = <0x14530000 0x70000>;
  584. interrupts = <0 95 0>;
  585. };
  586. mixer {
  587. compatible = "samsung,exynos5-mixer";
  588. reg = <0x14450000 0x10000>;
  589. interrupts = <0 94 0>;
  590. };
  591. dp-controller {
  592. compatible = "samsung,exynos5-dp";
  593. reg = <0x145b0000 0x1000>;
  594. interrupts = <10 3>;
  595. interrupt-parent = <&combiner>;
  596. #address-cells = <1>;
  597. #size-cells = <0>;
  598. dptx-phy {
  599. reg = <0x10040720>;
  600. samsung,enable-mask = <1>;
  601. };
  602. };
  603. };